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Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +01001/*
2 * FB driver for the SSD1289 LCD Controller
3 *
4 * Copyright (C) 2013 Noralf Tronnes
5 *
6 * Init sequence taken from ITDB02_Graph16.cpp - (C)2010-2011 Henning Karlsen
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +010017 */
18
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/gpio.h>
23
24#include "fbtft.h"
25
26#define DRVNAME "fb_ssd1289"
27#define WIDTH 240
28#define HEIGHT 320
29#define DEFAULT_GAMMA "02 03 2 5 7 7 4 2 4 2\n" \
30 "02 03 2 5 7 5 4 2 4 2"
31
32static unsigned reg11 = 0x6040;
33module_param(reg11, uint, 0);
34MODULE_PARM_DESC(reg11, "Register 11h value");
35
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +010036static int init_display(struct fbtft_par *par)
37{
38 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
39
40 par->fbtftops.reset(par);
41
42 if (par->gpio.cs != -1)
43 gpio_set_value(par->gpio.cs, 0); /* Activate chip */
44
45 write_reg(par, 0x00, 0x0001);
46 write_reg(par, 0x03, 0xA8A4);
47 write_reg(par, 0x0C, 0x0000);
48 write_reg(par, 0x0D, 0x080C);
49 write_reg(par, 0x0E, 0x2B00);
50 write_reg(par, 0x1E, 0x00B7);
51 write_reg(par, 0x01,
52 (1 << 13) | (par->bgr << 11) | (1 << 9) | (HEIGHT - 1));
53 write_reg(par, 0x02, 0x0600);
54 write_reg(par, 0x10, 0x0000);
55 write_reg(par, 0x05, 0x0000);
56 write_reg(par, 0x06, 0x0000);
57 write_reg(par, 0x16, 0xEF1C);
58 write_reg(par, 0x17, 0x0003);
59 write_reg(par, 0x07, 0x0233);
60 write_reg(par, 0x0B, 0x0000);
61 write_reg(par, 0x0F, 0x0000);
62 write_reg(par, 0x41, 0x0000);
63 write_reg(par, 0x42, 0x0000);
64 write_reg(par, 0x48, 0x0000);
65 write_reg(par, 0x49, 0x013F);
66 write_reg(par, 0x4A, 0x0000);
67 write_reg(par, 0x4B, 0x0000);
68 write_reg(par, 0x44, 0xEF00);
69 write_reg(par, 0x45, 0x0000);
70 write_reg(par, 0x46, 0x013F);
71 write_reg(par, 0x23, 0x0000);
72 write_reg(par, 0x24, 0x0000);
73 write_reg(par, 0x25, 0x8000);
74 write_reg(par, 0x4f, 0x0000);
75 write_reg(par, 0x4e, 0x0000);
76 write_reg(par, 0x22);
77 return 0;
78}
79
80static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
81{
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +010082 switch (par->info->var.rotate) {
83 /* R4Eh - Set GDDRAM X address counter */
84 /* R4Fh - Set GDDRAM Y address counter */
85 case 0:
86 write_reg(par, 0x4e, xs);
87 write_reg(par, 0x4f, ys);
88 break;
89 case 180:
90 write_reg(par, 0x4e, par->info->var.xres - 1 - xs);
91 write_reg(par, 0x4f, par->info->var.yres - 1 - ys);
92 break;
93 case 270:
94 write_reg(par, 0x4e, par->info->var.yres - 1 - ys);
95 write_reg(par, 0x4f, xs);
96 break;
97 case 90:
98 write_reg(par, 0x4e, ys);
99 write_reg(par, 0x4f, par->info->var.xres - 1 - xs);
100 break;
101 }
102
103 /* R22h - RAM data write */
104 write_reg(par, 0x22);
105}
106
107static int set_var(struct fbtft_par *par)
108{
109 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
110
111 if (par->fbtftops.init_display != init_display) {
112 /* don't risk messing up register 11h */
113 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par,
114 "%s: skipping since custom init_display() is used\n",
115 __func__);
116 return 0;
117 }
118
119 switch (par->info->var.rotate) {
120 case 0:
Geert Uytterhoeven153fe942015-03-20 16:21:58 +0100121 write_reg(par, 0x11, reg11 | 0x30);
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +0100122 break;
123 case 270:
Geert Uytterhoeven153fe942015-03-20 16:21:58 +0100124 write_reg(par, 0x11, reg11 | 0x28);
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +0100125 break;
126 case 180:
Geert Uytterhoeven153fe942015-03-20 16:21:58 +0100127 write_reg(par, 0x11, reg11 | 0x00);
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +0100128 break;
129 case 90:
Geert Uytterhoeven153fe942015-03-20 16:21:58 +0100130 write_reg(par, 0x11, reg11 | 0x18);
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +0100131 break;
132 }
133
134 return 0;
135}
136
137/*
138 Gamma string format:
139 VRP0 VRP1 PRP0 PRP1 PKP0 PKP1 PKP2 PKP3 PKP4 PKP5
140 VRN0 VRN1 PRN0 PRN1 PKN0 PKN1 PKN2 PKN3 PKN4 PKN5
141*/
142#define CURVE(num, idx) curves[num*par->gamma.num_values + idx]
143static int set_gamma(struct fbtft_par *par, unsigned long *curves)
144{
145 unsigned long mask[] = {
Geert Uytterhoeven153fe942015-03-20 16:21:58 +0100146 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
147 0x1f, 0x1f, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07,
148 };
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +0100149 int i, j;
150
151 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "%s()\n", __func__);
152
153 /* apply mask */
154 for (i = 0; i < 2; i++)
155 for (j = 0; j < 10; j++)
156 CURVE(i, j) &= mask[i*par->gamma.num_values + j];
157
158 write_reg(par, 0x0030, CURVE(0, 5) << 8 | CURVE(0, 4));
159 write_reg(par, 0x0031, CURVE(0, 7) << 8 | CURVE(0, 6));
160 write_reg(par, 0x0032, CURVE(0, 9) << 8 | CURVE(0, 8));
161 write_reg(par, 0x0033, CURVE(0, 3) << 8 | CURVE(0, 2));
162 write_reg(par, 0x0034, CURVE(1, 5) << 8 | CURVE(1, 4));
163 write_reg(par, 0x0035, CURVE(1, 7) << 8 | CURVE(1, 6));
164 write_reg(par, 0x0036, CURVE(1, 9) << 8 | CURVE(1, 8));
165 write_reg(par, 0x0037, CURVE(1, 3) << 8 | CURVE(1, 2));
166 write_reg(par, 0x003A, CURVE(0, 1) << 8 | CURVE(0, 0));
167 write_reg(par, 0x003B, CURVE(1, 1) << 8 | CURVE(1, 0));
168
169 return 0;
170}
171#undef CURVE
172
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +0100173static struct fbtft_display display = {
174 .regwidth = 16,
175 .width = WIDTH,
176 .height = HEIGHT,
177 .gamma_num = 2,
178 .gamma_len = 10,
179 .gamma = DEFAULT_GAMMA,
180 .fbtftops = {
181 .init_display = init_display,
182 .set_addr_win = set_addr_win,
183 .set_var = set_var,
184 .set_gamma = set_gamma,
185 },
186};
Anish Bhatt1014c2c2015-09-03 00:53:36 -0700187
Thomas Petazzoni5dc5e4f2014-12-31 10:11:25 +0100188FBTFT_REGISTER_DRIVER(DRVNAME, "solomon,ssd1289", &display);
189
190MODULE_ALIAS("spi:" DRVNAME);
191MODULE_ALIAS("platform:" DRVNAME);
192MODULE_ALIAS("spi:ssd1289");
193MODULE_ALIAS("platform:ssd1289");
194
195MODULE_DESCRIPTION("FB driver for the SSD1289 LCD Controller");
196MODULE_AUTHOR("Noralf Tronnes");
197MODULE_LICENSE("GPL");