blob: 4ccea2130a6cd2b42029522ac2c8c527fba2728f [file] [log] [blame]
Andrew Lunn82bb2da2012-11-17 17:00:45 +01001/ {
2 ocp@f1000000 {
3
4 pinctrl: pinctrl@10000 {
5 compatible = "marvell,88f6282-pinctrl";
6 reg = <0x10000 0x20>;
7
8 pmx_sata0: pmx-sata0 {
9 marvell,pins = "mpp5", "mpp21", "mpp23";
10 marvell,function = "sata0";
11 };
12 pmx_sata1: pmx-sata1 {
13 marvell,pins = "mpp4", "mpp20", "mpp22";
14 marvell,function = "sata1";
15 };
16 pmx_spi: pmx-spi {
17 marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3";
18 marvell,function = "spi";
19 };
20 pmx_twsi0: pmx-twsi0 {
21 marvell,pins = "mpp8", "mpp9";
22 marvell,function = "twsi0";
23 };
24 pmx_uart0: pmx-uart0 {
25 marvell,pins = "mpp10", "mpp11";
26 marvell,function = "uart0";
27 };
28
29 pmx_uart1: pmx-uart1 {
30 marvell,pins = "mpp13", "mpp14";
31 marvell,function = "uart1";
32 };
33 };
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090034
35 i2c@11100 {
36 compatible = "marvell,mv64xxx-i2c";
37 reg = <0x11100 0x20>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <32>;
41 clock-frequency = <100000>;
Nobuhiro Iwamatsu107c21c2013-01-06 11:10:36 +010042 clocks = <&gate_clk 7>;
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090043 status = "disabled";
44 };
Andrew Lunn82bb2da2012-11-17 17:00:45 +010045 };
Nobuhiro Iwamatsu083651f2012-11-23 06:58:34 +090046};