Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Red Hat Inc. |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice shall be included in |
| 12 | * all copies or substantial portions of the Software. |
| 13 | * |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| 21 | * |
| 22 | * Authors: Ben Skeggs |
| 23 | */ |
| 24 | |
| 25 | #include <core/object.h> |
| 26 | #include <core/device.h> |
| 27 | #include <core/client.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 28 | #include <core/option.h> |
| 29 | |
| 30 | #include <core/class.h> |
| 31 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 32 | #include <engine/device.h> |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 33 | |
| 34 | static DEFINE_MUTEX(nv_devices_mutex); |
| 35 | static LIST_HEAD(nv_devices); |
| 36 | |
| 37 | struct nouveau_device * |
| 38 | nouveau_device_find(u64 name) |
| 39 | { |
| 40 | struct nouveau_device *device, *match = NULL; |
| 41 | mutex_lock(&nv_devices_mutex); |
| 42 | list_for_each_entry(device, &nv_devices, head) { |
| 43 | if (device->handle == name) { |
| 44 | match = device; |
| 45 | break; |
| 46 | } |
| 47 | } |
| 48 | mutex_unlock(&nv_devices_mutex); |
| 49 | return match; |
| 50 | } |
| 51 | |
| 52 | /****************************************************************************** |
| 53 | * nouveau_devobj (0x0080): class implementation |
| 54 | *****************************************************************************/ |
| 55 | struct nouveau_devobj { |
| 56 | struct nouveau_parent base; |
| 57 | struct nouveau_object *subdev[NVDEV_SUBDEV_NR]; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 58 | }; |
| 59 | |
| 60 | static const u64 disable_map[] = { |
| 61 | [NVDEV_SUBDEV_VBIOS] = NV_DEVICE_DISABLE_VBIOS, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 62 | [NVDEV_SUBDEV_DEVINIT] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 63 | [NVDEV_SUBDEV_GPIO] = NV_DEVICE_DISABLE_CORE, |
| 64 | [NVDEV_SUBDEV_I2C] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 65 | [NVDEV_SUBDEV_CLOCK] = NV_DEVICE_DISABLE_CORE, |
| 66 | [NVDEV_SUBDEV_MXM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 67 | [NVDEV_SUBDEV_MC] = NV_DEVICE_DISABLE_CORE, |
Martin Peres | a10220b | 2012-11-04 01:01:53 +0100 | [diff] [blame] | 68 | [NVDEV_SUBDEV_BUS] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 69 | [NVDEV_SUBDEV_TIMER] = NV_DEVICE_DISABLE_CORE, |
| 70 | [NVDEV_SUBDEV_FB] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 71 | [NVDEV_SUBDEV_LTCG] = NV_DEVICE_DISABLE_CORE, |
| 72 | [NVDEV_SUBDEV_IBUS] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 73 | [NVDEV_SUBDEV_INSTMEM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 74 | [NVDEV_SUBDEV_VM] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 75 | [NVDEV_SUBDEV_BAR] = NV_DEVICE_DISABLE_CORE, |
| 76 | [NVDEV_SUBDEV_VOLT] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 77 | [NVDEV_SUBDEV_THERM] = NV_DEVICE_DISABLE_CORE, |
| 78 | [NVDEV_ENGINE_DMAOBJ] = NV_DEVICE_DISABLE_CORE, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 79 | [NVDEV_ENGINE_FIFO] = NV_DEVICE_DISABLE_FIFO, |
| 80 | [NVDEV_ENGINE_SW] = NV_DEVICE_DISABLE_FIFO, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 81 | [NVDEV_ENGINE_GR] = NV_DEVICE_DISABLE_GRAPH, |
| 82 | [NVDEV_ENGINE_MPEG] = NV_DEVICE_DISABLE_MPEG, |
| 83 | [NVDEV_ENGINE_ME] = NV_DEVICE_DISABLE_ME, |
| 84 | [NVDEV_ENGINE_VP] = NV_DEVICE_DISABLE_VP, |
| 85 | [NVDEV_ENGINE_CRYPT] = NV_DEVICE_DISABLE_CRYPT, |
| 86 | [NVDEV_ENGINE_BSP] = NV_DEVICE_DISABLE_BSP, |
| 87 | [NVDEV_ENGINE_PPP] = NV_DEVICE_DISABLE_PPP, |
| 88 | [NVDEV_ENGINE_COPY0] = NV_DEVICE_DISABLE_COPY0, |
| 89 | [NVDEV_ENGINE_COPY1] = NV_DEVICE_DISABLE_COPY1, |
| 90 | [NVDEV_ENGINE_UNK1C1] = NV_DEVICE_DISABLE_UNK1C1, |
Ben Skeggs | 206c38a | 2012-11-01 11:09:53 +1000 | [diff] [blame] | 91 | [NVDEV_ENGINE_VENC] = NV_DEVICE_DISABLE_VENC, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 92 | [NVDEV_ENGINE_DISP] = NV_DEVICE_DISABLE_DISP, |
| 93 | [NVDEV_SUBDEV_NR] = 0, |
| 94 | }; |
| 95 | |
| 96 | static int |
| 97 | nouveau_devobj_ctor(struct nouveau_object *parent, |
| 98 | struct nouveau_object *engine, |
| 99 | struct nouveau_oclass *oclass, void *data, u32 size, |
| 100 | struct nouveau_object **pobject) |
| 101 | { |
| 102 | struct nouveau_client *client = nv_client(parent); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 103 | struct nouveau_device *device; |
| 104 | struct nouveau_devobj *devobj; |
| 105 | struct nv_device_class *args = data; |
Marcin Slusarz | 950fbfa | 2012-12-29 16:24:37 +0100 | [diff] [blame] | 106 | u32 boot0, strap; |
| 107 | u64 disable, mmio_base, mmio_size; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 108 | void __iomem *map; |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 109 | int ret, i, c; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 110 | |
| 111 | if (size < sizeof(struct nv_device_class)) |
| 112 | return -EINVAL; |
| 113 | |
| 114 | /* find the device subdev that matches what the client requested */ |
| 115 | device = nv_device(client->device); |
| 116 | if (args->device != ~0) { |
| 117 | device = nouveau_device_find(args->device); |
| 118 | if (!device) |
| 119 | return -ENODEV; |
| 120 | } |
| 121 | |
| 122 | ret = nouveau_parent_create(parent, nv_object(device), oclass, 0, NULL, |
| 123 | (1ULL << NVDEV_ENGINE_DMAOBJ) | |
| 124 | (1ULL << NVDEV_ENGINE_FIFO) | |
| 125 | (1ULL << NVDEV_ENGINE_DISP), &devobj); |
| 126 | *pobject = nv_object(devobj); |
| 127 | if (ret) |
| 128 | return ret; |
| 129 | |
| 130 | mmio_base = pci_resource_start(device->pdev, 0); |
| 131 | mmio_size = pci_resource_len(device->pdev, 0); |
| 132 | |
| 133 | /* translate api disable mask into internal mapping */ |
| 134 | disable = args->debug0; |
| 135 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
| 136 | if (args->disable & disable_map[i]) |
| 137 | disable |= (1ULL << i); |
| 138 | } |
| 139 | |
| 140 | /* identify the chipset, and determine classes of subdev/engines */ |
| 141 | if (!(args->disable & NV_DEVICE_DISABLE_IDENTIFY) && |
| 142 | !device->card_type) { |
| 143 | map = ioremap(mmio_base, 0x102000); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 144 | if (map == NULL) |
| 145 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 146 | |
| 147 | /* switch mmio to cpu's native endianness */ |
| 148 | #ifndef __BIG_ENDIAN |
| 149 | if (ioread32_native(map + 0x000004) != 0x00000000) |
| 150 | #else |
| 151 | if (ioread32_native(map + 0x000004) == 0x00000000) |
| 152 | #endif |
| 153 | iowrite32_native(0x01000001, map + 0x000004); |
| 154 | |
| 155 | /* read boot0 and strapping information */ |
| 156 | boot0 = ioread32_native(map + 0x000000); |
| 157 | strap = ioread32_native(map + 0x101000); |
| 158 | iounmap(map); |
| 159 | |
| 160 | /* determine chipset and derive architecture from it */ |
| 161 | if ((boot0 & 0x0f000000) > 0) { |
| 162 | device->chipset = (boot0 & 0xff00000) >> 20; |
| 163 | switch (device->chipset & 0xf0) { |
| 164 | case 0x10: device->card_type = NV_10; break; |
| 165 | case 0x20: device->card_type = NV_20; break; |
| 166 | case 0x30: device->card_type = NV_30; break; |
| 167 | case 0x40: |
| 168 | case 0x60: device->card_type = NV_40; break; |
| 169 | case 0x50: |
| 170 | case 0x80: |
| 171 | case 0x90: |
| 172 | case 0xa0: device->card_type = NV_50; break; |
| 173 | case 0xc0: device->card_type = NV_C0; break; |
| 174 | case 0xd0: device->card_type = NV_D0; break; |
| 175 | case 0xe0: device->card_type = NV_E0; break; |
| 176 | default: |
| 177 | break; |
| 178 | } |
| 179 | } else |
| 180 | if ((boot0 & 0xff00fff0) == 0x20004000) { |
| 181 | if (boot0 & 0x00f00000) |
| 182 | device->chipset = 0x05; |
| 183 | else |
| 184 | device->chipset = 0x04; |
| 185 | device->card_type = NV_04; |
| 186 | } |
| 187 | |
| 188 | switch (device->card_type) { |
| 189 | case NV_04: ret = nv04_identify(device); break; |
| 190 | case NV_10: ret = nv10_identify(device); break; |
| 191 | case NV_20: ret = nv20_identify(device); break; |
| 192 | case NV_30: ret = nv30_identify(device); break; |
| 193 | case NV_40: ret = nv40_identify(device); break; |
| 194 | case NV_50: ret = nv50_identify(device); break; |
| 195 | case NV_C0: |
| 196 | case NV_D0: ret = nvc0_identify(device); break; |
| 197 | case NV_E0: ret = nve0_identify(device); break; |
| 198 | default: |
| 199 | ret = -EINVAL; |
| 200 | break; |
| 201 | } |
| 202 | |
| 203 | if (ret) { |
| 204 | nv_error(device, "unknown chipset, 0x%08x\n", boot0); |
| 205 | return ret; |
| 206 | } |
| 207 | |
| 208 | nv_info(device, "BOOT0 : 0x%08x\n", boot0); |
Ben Skeggs | 2094dd8 | 2012-07-27 08:28:20 +1000 | [diff] [blame] | 209 | nv_info(device, "Chipset: %s (NV%02X)\n", |
| 210 | device->cname, device->chipset); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 211 | nv_info(device, "Family : NV%02X\n", device->card_type); |
| 212 | |
| 213 | /* determine frequency of timing crystal */ |
| 214 | if ( device->chipset < 0x17 || |
Viktor Novotný | 1f2285d4 | 2012-11-10 19:24:06 +0100 | [diff] [blame] | 215 | (device->chipset >= 0x20 && device->chipset < 0x25)) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 216 | strap &= 0x00000040; |
| 217 | else |
| 218 | strap &= 0x00400040; |
| 219 | |
| 220 | switch (strap) { |
| 221 | case 0x00000000: device->crystal = 13500; break; |
| 222 | case 0x00000040: device->crystal = 14318; break; |
| 223 | case 0x00400000: device->crystal = 27000; break; |
| 224 | case 0x00400040: device->crystal = 25000; break; |
| 225 | } |
| 226 | |
| 227 | nv_debug(device, "crystal freq: %dKHz\n", device->crystal); |
| 228 | } |
| 229 | |
| 230 | if (!(args->disable & NV_DEVICE_DISABLE_MMIO) && |
| 231 | !nv_subdev(device)->mmio) { |
| 232 | nv_subdev(device)->mmio = ioremap(mmio_base, mmio_size); |
| 233 | if (!nv_subdev(device)->mmio) { |
| 234 | nv_error(device, "unable to map device registers\n"); |
Ben Skeggs | 43b1e9c | 2012-08-06 16:31:26 +1000 | [diff] [blame] | 235 | return -ENOMEM; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 236 | } |
| 237 | } |
| 238 | |
| 239 | /* ensure requested subsystems are available for use */ |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame^] | 240 | for (i = 1, c = 1; i < NVDEV_SUBDEV_NR; i++) { |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 241 | if (!(oclass = device->oclass[i]) || (disable & (1ULL << i))) |
| 242 | continue; |
| 243 | |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame^] | 244 | if (device->subdev[i]) { |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 245 | nouveau_object_ref(device->subdev[i], |
| 246 | &devobj->subdev[i]); |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame^] | 247 | continue; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 248 | } |
| 249 | |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame^] | 250 | ret = nouveau_object_ctor(nv_object(device), NULL, |
| 251 | oclass, NULL, i, |
| 252 | &devobj->subdev[i]); |
| 253 | if (ret == -ENODEV) |
| 254 | continue; |
| 255 | if (ret) |
| 256 | return ret; |
| 257 | |
Ben Skeggs | 7234d02 | 2012-10-02 10:30:34 +1000 | [diff] [blame] | 258 | /* note: can't init *any* subdevs until devinit has been run |
| 259 | * due to not knowing exactly what the vbios init tables will |
| 260 | * mess with. devinit also can't be run until all of its |
| 261 | * dependencies have been created. |
| 262 | * |
| 263 | * this code delays init of any subdev until all of devinit's |
| 264 | * dependencies have been created, and then initialises each |
| 265 | * subdev in turn as they're created. |
| 266 | */ |
| 267 | while (i >= NVDEV_SUBDEV_DEVINIT_LAST && c <= i) { |
| 268 | struct nouveau_object *subdev = devobj->subdev[c++]; |
| 269 | if (subdev && !nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 270 | ret = nouveau_object_inc(subdev); |
| 271 | if (ret) |
| 272 | return ret; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame^] | 273 | atomic_dec(&nv_object(device)->usecount); |
| 274 | } else |
| 275 | if (subdev) { |
| 276 | nouveau_subdev_reset(subdev); |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 277 | } |
| 278 | } |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 279 | } |
| 280 | |
| 281 | return 0; |
| 282 | } |
| 283 | |
| 284 | static void |
| 285 | nouveau_devobj_dtor(struct nouveau_object *object) |
| 286 | { |
| 287 | struct nouveau_devobj *devobj = (void *)object; |
| 288 | int i; |
| 289 | |
| 290 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) |
| 291 | nouveau_object_ref(NULL, &devobj->subdev[i]); |
| 292 | |
| 293 | nouveau_parent_destroy(&devobj->base); |
| 294 | } |
| 295 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 296 | static u8 |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 297 | nouveau_devobj_rd08(struct nouveau_object *object, u64 addr) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 298 | { |
| 299 | return nv_rd08(object->engine, addr); |
| 300 | } |
| 301 | |
| 302 | static u16 |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 303 | nouveau_devobj_rd16(struct nouveau_object *object, u64 addr) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 304 | { |
| 305 | return nv_rd16(object->engine, addr); |
| 306 | } |
| 307 | |
| 308 | static u32 |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 309 | nouveau_devobj_rd32(struct nouveau_object *object, u64 addr) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 310 | { |
| 311 | return nv_rd32(object->engine, addr); |
| 312 | } |
| 313 | |
| 314 | static void |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 315 | nouveau_devobj_wr08(struct nouveau_object *object, u64 addr, u8 data) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 316 | { |
| 317 | nv_wr08(object->engine, addr, data); |
| 318 | } |
| 319 | |
| 320 | static void |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 321 | nouveau_devobj_wr16(struct nouveau_object *object, u64 addr, u16 data) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 322 | { |
| 323 | nv_wr16(object->engine, addr, data); |
| 324 | } |
| 325 | |
| 326 | static void |
Ben Skeggs | 0a32241 | 2012-11-17 21:51:30 +1000 | [diff] [blame] | 327 | nouveau_devobj_wr32(struct nouveau_object *object, u64 addr, u32 data) |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 328 | { |
| 329 | nv_wr32(object->engine, addr, data); |
| 330 | } |
| 331 | |
| 332 | static struct nouveau_ofuncs |
| 333 | nouveau_devobj_ofuncs = { |
| 334 | .ctor = nouveau_devobj_ctor, |
| 335 | .dtor = nouveau_devobj_dtor, |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame^] | 336 | .init = _nouveau_parent_init, |
| 337 | .fini = _nouveau_parent_fini, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 338 | .rd08 = nouveau_devobj_rd08, |
| 339 | .rd16 = nouveau_devobj_rd16, |
| 340 | .rd32 = nouveau_devobj_rd32, |
| 341 | .wr08 = nouveau_devobj_wr08, |
| 342 | .wr16 = nouveau_devobj_wr16, |
| 343 | .wr32 = nouveau_devobj_wr32, |
| 344 | }; |
| 345 | |
| 346 | /****************************************************************************** |
| 347 | * nouveau_device: engine functions |
| 348 | *****************************************************************************/ |
Ben Skeggs | 9aecbad | 2013-04-25 17:56:03 +1000 | [diff] [blame] | 349 | static struct nouveau_oclass |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 350 | nouveau_device_sclass[] = { |
| 351 | { 0x0080, &nouveau_devobj_ofuncs }, |
| 352 | {} |
| 353 | }; |
| 354 | |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 355 | static int |
| 356 | nouveau_device_fini(struct nouveau_object *object, bool suspend) |
| 357 | { |
| 358 | struct nouveau_device *device = (void *)object; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame^] | 359 | struct nouveau_object *subdev; |
| 360 | int ret, i; |
| 361 | |
| 362 | for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) { |
| 363 | if ((subdev = device->subdev[i])) { |
| 364 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 365 | ret = nouveau_object_dec(subdev, suspend); |
| 366 | if (ret && suspend) |
| 367 | goto fail; |
| 368 | } |
| 369 | } |
| 370 | } |
| 371 | |
| 372 | ret = 0; |
| 373 | fail: |
| 374 | for (; ret && i < NVDEV_SUBDEV_NR; i++) { |
| 375 | if ((subdev = device->subdev[i])) { |
| 376 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 377 | ret = nouveau_object_inc(subdev); |
| 378 | if (ret) { |
| 379 | /* XXX */ |
| 380 | } |
| 381 | } |
| 382 | } |
| 383 | } |
| 384 | |
| 385 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 386 | } |
| 387 | |
| 388 | static int |
| 389 | nouveau_device_init(struct nouveau_object *object) |
| 390 | { |
| 391 | struct nouveau_device *device = (void *)object; |
Ben Skeggs | 10caad3 | 2013-04-25 11:43:54 +1000 | [diff] [blame^] | 392 | struct nouveau_object *subdev; |
| 393 | int ret, i; |
| 394 | |
| 395 | for (i = 0; i < NVDEV_SUBDEV_NR; i++) { |
| 396 | if ((subdev = device->subdev[i])) { |
| 397 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) { |
| 398 | ret = nouveau_object_inc(subdev); |
| 399 | if (ret) |
| 400 | goto fail; |
| 401 | } else { |
| 402 | nouveau_subdev_reset(subdev); |
| 403 | } |
| 404 | } |
| 405 | } |
| 406 | |
| 407 | ret = 0; |
| 408 | fail: |
| 409 | for (--i; ret && i >= 0; i--) { |
| 410 | if ((subdev = device->subdev[i])) { |
| 411 | if (!nv_iclass(subdev, NV_ENGINE_CLASS)) |
| 412 | nouveau_object_dec(subdev, false); |
| 413 | } |
| 414 | } |
| 415 | |
| 416 | return ret; |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 417 | } |
| 418 | |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 419 | static void |
| 420 | nouveau_device_dtor(struct nouveau_object *object) |
| 421 | { |
| 422 | struct nouveau_device *device = (void *)object; |
| 423 | |
| 424 | mutex_lock(&nv_devices_mutex); |
| 425 | list_del(&device->head); |
| 426 | mutex_unlock(&nv_devices_mutex); |
| 427 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 428 | if (nv_subdev(device)->mmio) |
| 429 | iounmap(nv_subdev(device)->mmio); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 430 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 431 | nouveau_engine_destroy(&device->base); |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 432 | } |
| 433 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 434 | static struct nouveau_oclass |
| 435 | nouveau_device_oclass = { |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 436 | .handle = NV_ENGINE(DEVICE, 0x00), |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 437 | .ofuncs = &(struct nouveau_ofuncs) { |
Ben Skeggs | ebb945a | 2012-07-20 08:17:34 +1000 | [diff] [blame] | 438 | .dtor = nouveau_device_dtor, |
Ben Skeggs | 066a5d0 | 2013-04-25 11:35:18 +1000 | [diff] [blame] | 439 | .init = nouveau_device_init, |
| 440 | .fini = nouveau_device_fini, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 441 | }, |
| 442 | }; |
| 443 | |
| 444 | int |
| 445 | nouveau_device_create_(struct pci_dev *pdev, u64 name, const char *sname, |
| 446 | const char *cfg, const char *dbg, |
| 447 | int length, void **pobject) |
| 448 | { |
| 449 | struct nouveau_device *device; |
| 450 | int ret = -EEXIST; |
| 451 | |
| 452 | mutex_lock(&nv_devices_mutex); |
| 453 | list_for_each_entry(device, &nv_devices, head) { |
| 454 | if (device->handle == name) |
| 455 | goto done; |
| 456 | } |
| 457 | |
Ben Skeggs | dded35d | 2013-04-25 17:23:43 +1000 | [diff] [blame] | 458 | ret = nouveau_engine_create_(NULL, NULL, &nouveau_device_oclass, true, |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 459 | "DEVICE", "device", length, pobject); |
| 460 | device = *pobject; |
| 461 | if (ret) |
| 462 | goto done; |
| 463 | |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 464 | device->pdev = pdev; |
| 465 | device->handle = name; |
| 466 | device->cfgopt = cfg; |
| 467 | device->dbgopt = dbg; |
| 468 | device->name = sname; |
| 469 | |
| 470 | nv_subdev(device)->debug = nouveau_dbgopt(device->dbgopt, "DEVICE"); |
Ben Skeggs | 9aecbad | 2013-04-25 17:56:03 +1000 | [diff] [blame] | 471 | nv_engine(device)->sclass = nouveau_device_sclass; |
Ben Skeggs | 9274f4a | 2012-07-06 07:36:43 +1000 | [diff] [blame] | 472 | list_add(&device->head, &nv_devices); |
| 473 | done: |
| 474 | mutex_unlock(&nv_devices_mutex); |
| 475 | return ret; |
| 476 | } |