blob: 0f80b936e75ec92015d1ebdfb815dfaed14a9909 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Dump R4x00 TLB for debugging purposes.
3 *
4 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
5 * Copyright (C) 1999 by Silicon Graphics, Inc.
6 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07007#include <linux/kernel.h>
8#include <linux/mm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07009
James Hogan137877e2015-05-19 09:50:32 +010010#include <asm/hazards.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <asm/mipsregs.h>
12#include <asm/page.h>
13#include <asm/pgtable.h>
Atsushi Nemoto40df3832007-07-12 00:51:00 +090014#include <asm/tlbdebug.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015
James Hogan3c865dd2015-07-15 16:17:43 +010016void dump_tlb_regs(void)
17{
18 const int field = 2 * sizeof(unsigned long);
19
20 pr_info("Index : %0x\n", read_c0_index());
21 pr_info("PageMask : %0x\n", read_c0_pagemask());
James Hogan4b62fad2016-05-11 15:50:32 +010022 if (cpu_has_guestid)
23 pr_info("GuestCtl1: %0x\n", read_c0_guestctl1());
James Hogan3c865dd2015-07-15 16:17:43 +010024 pr_info("EntryHi : %0*lx\n", field, read_c0_entryhi());
25 pr_info("EntryLo0 : %0*lx\n", field, read_c0_entrylo0());
26 pr_info("EntryLo1 : %0*lx\n", field, read_c0_entrylo1());
27 pr_info("Wired : %0x\n", read_c0_wired());
James Hogan9bd860c2015-07-15 16:17:46 +010028 switch (current_cpu_type()) {
29 case CPU_R10000:
30 case CPU_R12000:
31 case CPU_R14000:
32 case CPU_R16000:
33 pr_info("FrameMask: %0x\n", read_c0_framemask());
34 break;
35 }
James Hogan5d3c3c72015-07-15 16:17:45 +010036 if (cpu_has_small_pages || cpu_has_rixi || cpu_has_xpa)
37 pr_info("PageGrain: %0x\n", read_c0_pagegrain());
James Hogan3c865dd2015-07-15 16:17:43 +010038 if (cpu_has_htw) {
39 pr_info("PWField : %0*lx\n", field, read_c0_pwfield());
40 pr_info("PWSize : %0*lx\n", field, read_c0_pwsize());
41 pr_info("PWCtl : %0x\n", read_c0_pwctl());
42 }
43}
44
Linus Torvalds1da177e2005-04-16 15:20:36 -070045static inline const char *msk2str(unsigned int mask)
46{
47 switch (mask) {
48 case PM_4K: return "4kb";
49 case PM_16K: return "16kb";
50 case PM_64K: return "64kb";
51 case PM_256K: return "256kb";
Ralf Baechlec52399b2009-04-02 14:07:10 +020052#ifdef CONFIG_CPU_CAVIUM_OCTEON
53 case PM_8K: return "8kb";
54 case PM_32K: return "32kb";
55 case PM_128K: return "128kb";
56 case PM_512K: return "512kb";
57 case PM_2M: return "2Mb";
58 case PM_8M: return "8Mb";
59 case PM_32M: return "32Mb";
60#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070061#ifndef CONFIG_CPU_VR41XX
62 case PM_1M: return "1Mb";
63 case PM_4M: return "4Mb";
64 case PM_16M: return "16Mb";
65 case PM_64M: return "64Mb";
66 case PM_256M: return "256Mb";
Shinya Kuribayashi542c1022008-10-24 01:27:57 +090067 case PM_1G: return "1Gb";
Linus Torvalds1da177e2005-04-16 15:20:36 -070068#endif
69 }
Atsushi Nemoto4becef12007-06-02 00:21:30 +090070 return "";
Linus Torvalds1da177e2005-04-16 15:20:36 -070071}
72
Atsushi Nemoto69ed25b2007-06-02 00:30:25 +090073static void dump_tlb(int first, int last)
Linus Torvalds1da177e2005-04-16 15:20:36 -070074{
Atsushi Nemoto4becef12007-06-02 00:21:30 +090075 unsigned long s_entryhi, entryhi, asid;
James Hoganc2bc4352015-05-19 09:50:37 +010076 unsigned long long entrylo0, entrylo1, pa;
James Hogan382208dc2016-05-11 15:50:31 +010077 unsigned int s_index, s_pagemask, s_guestctl1 = 0;
78 unsigned int pagemask, guestctl1 = 0, c0, c1, i;
Paul Burton4edf00a2016-05-06 14:36:23 +010079 unsigned long asidmask = cpu_asid_mask(&current_cpu_data);
80 int asidwidth = DIV_ROUND_UP(ilog2(asidmask) + 1, 4);
James Hogand1ce483e2015-05-19 09:50:33 +010081#ifdef CONFIG_32BIT
James Hogan24ca1d92015-05-19 09:50:38 +010082 bool xpa = cpu_has_xpa && (read_c0_pagegrain() & PG_ELPA);
83 int pwidth = xpa ? 11 : 8;
84 int vwidth = 8;
James Hogand1ce483e2015-05-19 09:50:33 +010085#else
James Hogan24ca1d92015-05-19 09:50:38 +010086 bool xpa = false;
87 int pwidth = 11;
88 int vwidth = 11;
James Hogand1ce483e2015-05-19 09:50:33 +010089#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
Ralf Baechle01422ff2012-10-17 01:01:20 +020091 s_pagemask = read_c0_pagemask();
Linus Torvalds1da177e2005-04-16 15:20:36 -070092 s_entryhi = read_c0_entryhi();
93 s_index = read_c0_index();
Paul Burton4edf00a2016-05-06 14:36:23 +010094 asid = s_entryhi & asidmask;
James Hogan382208dc2016-05-11 15:50:31 +010095 if (cpu_has_guestid)
96 s_guestctl1 = read_c0_guestctl1();
Linus Torvalds1da177e2005-04-16 15:20:36 -070097
98 for (i = first; i <= last; i++) {
99 write_c0_index(i);
James Hogan137877e2015-05-19 09:50:32 +0100100 mtc0_tlbr_hazard();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 tlb_read();
James Hogan137877e2015-05-19 09:50:32 +0100102 tlb_read_hazard();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 pagemask = read_c0_pagemask();
Ralf Baechle70342282013-01-22 12:59:30 +0100104 entryhi = read_c0_entryhi();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105 entrylo0 = read_c0_entrylo0();
106 entrylo1 = read_c0_entrylo1();
James Hogan382208dc2016-05-11 15:50:31 +0100107 if (cpu_has_guestid)
108 guestctl1 = read_c0_guestctl1();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109
James Hogandecebcc2015-05-19 09:50:36 +0100110 /* EHINV bit marks entire entry as invalid */
111 if (cpu_has_tlbinv && entryhi & MIPS_ENTRYHI_EHINV)
112 continue;
James Hogand1ce483e2015-05-19 09:50:33 +0100113 /*
114 * Prior to tlbinv, unused entries have a virtual address of
115 * CKSEG0.
116 */
117 if ((entryhi & ~0x1ffffUL) == CKSEG0)
118 continue;
James Hogan48269c72015-05-19 09:50:35 +0100119 /*
120 * ASID takes effect in absence of G (global) bit.
121 * We check both G bits, even though architecturally they should
122 * match one another, because some revisions of the SB1 core may
123 * leave only a single G bit set after a machine check exception
124 * due to duplicate TLB entry.
125 */
James Hoganbae637a2015-07-15 16:17:47 +0100126 if (!((entrylo0 | entrylo1) & ENTRYLO_G) &&
Paul Burton4edf00a2016-05-06 14:36:23 +0100127 (entryhi & asidmask) != asid)
James Hogand1ce483e2015-05-19 09:50:33 +0100128 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129
James Hogand1ce483e2015-05-19 09:50:33 +0100130 /*
131 * Only print entries in use
132 */
133 printk("Index: %2d pgmask=%s ", i, msk2str(pagemask));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134
James Hoganbae637a2015-07-15 16:17:47 +0100135 c0 = (entrylo0 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
136 c1 = (entrylo1 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
James Hogand1ce483e2015-05-19 09:50:33 +0100137
James Hogan382208dc2016-05-11 15:50:31 +0100138 printk("va=%0*lx asid=%0*lx",
James Hogan24ca1d92015-05-19 09:50:38 +0100139 vwidth, (entryhi & ~0x1fffUL),
Paul Burton4edf00a2016-05-06 14:36:23 +0100140 asidwidth, entryhi & asidmask);
James Hogan382208dc2016-05-11 15:50:31 +0100141 if (cpu_has_guestid)
142 printk(" gid=%02lx",
143 (guestctl1 & MIPS_GCTL1_RID)
144 >> MIPS_GCTL1_RID_SHIFT);
James Hoganc2bc4352015-05-19 09:50:37 +0100145 /* RI/XI are in awkward places, so mask them off separately */
146 pa = entrylo0 & ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
James Hogan24ca1d92015-05-19 09:50:38 +0100147 if (xpa)
148 pa |= (unsigned long long)readx_c0_entrylo0() << 30;
James Hoganc2bc4352015-05-19 09:50:37 +0100149 pa = (pa << 6) & PAGE_MASK;
James Hogan382208dc2016-05-11 15:50:31 +0100150 printk("\n\t[");
James Hoganc2bc4352015-05-19 09:50:37 +0100151 if (cpu_has_rixi)
152 printk("ri=%d xi=%d ",
153 (entrylo0 & MIPS_ENTRYLO_RI) ? 1 : 0,
154 (entrylo0 & MIPS_ENTRYLO_XI) ? 1 : 0);
155 printk("pa=%0*llx c=%d d=%d v=%d g=%d] [",
James Hogan24ca1d92015-05-19 09:50:38 +0100156 pwidth, pa, c0,
James Hoganbae637a2015-07-15 16:17:47 +0100157 (entrylo0 & ENTRYLO_D) ? 1 : 0,
158 (entrylo0 & ENTRYLO_V) ? 1 : 0,
159 (entrylo0 & ENTRYLO_G) ? 1 : 0);
James Hoganc2bc4352015-05-19 09:50:37 +0100160 /* RI/XI are in awkward places, so mask them off separately */
161 pa = entrylo1 & ~(MIPS_ENTRYLO_RI | MIPS_ENTRYLO_XI);
James Hogan24ca1d92015-05-19 09:50:38 +0100162 if (xpa)
163 pa |= (unsigned long long)readx_c0_entrylo1() << 30;
James Hoganc2bc4352015-05-19 09:50:37 +0100164 pa = (pa << 6) & PAGE_MASK;
165 if (cpu_has_rixi)
166 printk("ri=%d xi=%d ",
167 (entrylo1 & MIPS_ENTRYLO_RI) ? 1 : 0,
168 (entrylo1 & MIPS_ENTRYLO_XI) ? 1 : 0);
169 printk("pa=%0*llx c=%d d=%d v=%d g=%d]\n",
James Hogan24ca1d92015-05-19 09:50:38 +0100170 pwidth, pa, c1,
James Hoganbae637a2015-07-15 16:17:47 +0100171 (entrylo1 & ENTRYLO_D) ? 1 : 0,
172 (entrylo1 & ENTRYLO_V) ? 1 : 0,
173 (entrylo1 & ENTRYLO_G) ? 1 : 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174 }
175 printk("\n");
176
177 write_c0_entryhi(s_entryhi);
178 write_c0_index(s_index);
Ralf Baechle01422ff2012-10-17 01:01:20 +0200179 write_c0_pagemask(s_pagemask);
James Hogan382208dc2016-05-11 15:50:31 +0100180 if (cpu_has_guestid)
181 write_c0_guestctl1(s_guestctl1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182}
183
184void dump_tlb_all(void)
185{
186 dump_tlb(0, current_cpu_data.tlbsize - 1);
187}