blob: 98ddba94b5b930a6a19d36061190b74f7caadc6c [file] [log] [blame]
Ben Hutchings94e61082008-03-05 16:52:39 +00001#include <linux/delay.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07002#include <linux/pci.h>
3#include <linux/module.h>
Al Virof6a57032006-10-18 01:47:25 -04004#include <linux/sched.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/ioport.h>
Matthew Wilcox7ea7e982006-10-19 09:41:28 -06006#include <linux/wait.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007
Adrian Bunk48b19142005-11-06 01:45:08 +01008#include "pci.h"
9
Linus Torvalds1da177e2005-04-16 15:20:36 -070010/*
11 * This interrupt-safe spinlock protects all accesses to PCI
12 * configuration space.
13 */
14
15static DEFINE_SPINLOCK(pci_lock);
16
17/*
18 * Wrappers for all PCI configuration access functions. They just check
19 * alignment, do locking and call the low-level functions pointed to
20 * by pci_dev->ops.
21 */
22
23#define PCI_byte_BAD 0
24#define PCI_word_BAD (pos & 1)
25#define PCI_dword_BAD (pos & 3)
26
27#define PCI_OP_READ(size,type,len) \
28int pci_bus_read_config_##size \
29 (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
30{ \
31 int res; \
32 unsigned long flags; \
33 u32 data = 0; \
34 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
35 spin_lock_irqsave(&pci_lock, flags); \
36 res = bus->ops->read(bus, devfn, pos, len, &data); \
37 *value = (type)data; \
38 spin_unlock_irqrestore(&pci_lock, flags); \
39 return res; \
40}
41
42#define PCI_OP_WRITE(size,type,len) \
43int pci_bus_write_config_##size \
44 (struct pci_bus *bus, unsigned int devfn, int pos, type value) \
45{ \
46 int res; \
47 unsigned long flags; \
48 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
49 spin_lock_irqsave(&pci_lock, flags); \
50 res = bus->ops->write(bus, devfn, pos, len, value); \
51 spin_unlock_irqrestore(&pci_lock, flags); \
52 return res; \
53}
54
55PCI_OP_READ(byte, u8, 1)
56PCI_OP_READ(word, u16, 2)
57PCI_OP_READ(dword, u32, 4)
58PCI_OP_WRITE(byte, u8, 1)
59PCI_OP_WRITE(word, u16, 2)
60PCI_OP_WRITE(dword, u32, 4)
61
62EXPORT_SYMBOL(pci_bus_read_config_byte);
63EXPORT_SYMBOL(pci_bus_read_config_word);
64EXPORT_SYMBOL(pci_bus_read_config_dword);
65EXPORT_SYMBOL(pci_bus_write_config_byte);
66EXPORT_SYMBOL(pci_bus_write_config_word);
67EXPORT_SYMBOL(pci_bus_write_config_dword);
Brian Kinge04b0ea2005-09-27 01:21:55 -070068
Matthew Wilcox7ea7e982006-10-19 09:41:28 -060069/*
70 * The following routines are to prevent the user from accessing PCI config
71 * space when it's unsafe to do so. Some devices require this during BIST and
72 * we're required to prevent it during D-state transitions.
73 *
74 * We have a bit per device to indicate it's blocked and a global wait queue
75 * for callers to sleep on until devices are unblocked.
76 */
77static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);
Brian Kinge04b0ea2005-09-27 01:21:55 -070078
Matthew Wilcox7ea7e982006-10-19 09:41:28 -060079static noinline void pci_wait_ucfg(struct pci_dev *dev)
80{
81 DECLARE_WAITQUEUE(wait, current);
82
83 __add_wait_queue(&pci_ucfg_wait, &wait);
84 do {
85 set_current_state(TASK_UNINTERRUPTIBLE);
86 spin_unlock_irq(&pci_lock);
87 schedule();
88 spin_lock_irq(&pci_lock);
89 } while (dev->block_ucfg_access);
90 __remove_wait_queue(&pci_ucfg_wait, &wait);
Brian Kinge04b0ea2005-09-27 01:21:55 -070091}
92
93#define PCI_USER_READ_CONFIG(size,type) \
94int pci_user_read_config_##size \
95 (struct pci_dev *dev, int pos, type *val) \
96{ \
Brian Kinge04b0ea2005-09-27 01:21:55 -070097 int ret = 0; \
98 u32 data = -1; \
99 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600100 spin_lock_irq(&pci_lock); \
101 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
102 ret = dev->bus->ops->read(dev->bus, dev->devfn, \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700103 pos, sizeof(type), &data); \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600104 spin_unlock_irq(&pci_lock); \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700105 *val = (type)data; \
106 return ret; \
107}
108
109#define PCI_USER_WRITE_CONFIG(size,type) \
110int pci_user_write_config_##size \
111 (struct pci_dev *dev, int pos, type val) \
112{ \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700113 int ret = -EIO; \
114 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600115 spin_lock_irq(&pci_lock); \
116 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
117 ret = dev->bus->ops->write(dev->bus, dev->devfn, \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700118 pos, sizeof(type), val); \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600119 spin_unlock_irq(&pci_lock); \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700120 return ret; \
121}
122
123PCI_USER_READ_CONFIG(byte, u8)
124PCI_USER_READ_CONFIG(word, u16)
125PCI_USER_READ_CONFIG(dword, u32)
126PCI_USER_WRITE_CONFIG(byte, u8)
127PCI_USER_WRITE_CONFIG(word, u16)
128PCI_USER_WRITE_CONFIG(dword, u32)
129
Ben Hutchings94e61082008-03-05 16:52:39 +0000130/* VPD access through PCI 2.2+ VPD capability */
131
132#define PCI_VPD_PCI22_SIZE (PCI_VPD_ADDR_MASK + 1)
133
134struct pci_vpd_pci22 {
135 struct pci_vpd base;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800136 struct mutex lock;
137 u16 flag;
Ben Hutchings94e61082008-03-05 16:52:39 +0000138 bool busy;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800139 u8 cap;
Ben Hutchings94e61082008-03-05 16:52:39 +0000140};
141
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800142/*
143 * Wait for last operation to complete.
144 * This code has to spin since there is no other notification from the PCI
145 * hardware. Since the VPD is often implemented by serial attachment to an
146 * EEPROM, it may take many milliseconds to complete.
147 */
Ben Hutchings94e61082008-03-05 16:52:39 +0000148static int pci_vpd_pci22_wait(struct pci_dev *dev)
149{
150 struct pci_vpd_pci22 *vpd =
151 container_of(dev->vpd, struct pci_vpd_pci22, base);
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800152 unsigned long timeout = jiffies + HZ/20 + 2;
153 u16 status;
Ben Hutchings94e61082008-03-05 16:52:39 +0000154 int ret;
155
156 if (!vpd->busy)
157 return 0;
158
Ben Hutchings94e61082008-03-05 16:52:39 +0000159 for (;;) {
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800160 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
Ben Hutchings94e61082008-03-05 16:52:39 +0000161 &status);
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800162 if (ret)
Ben Hutchings94e61082008-03-05 16:52:39 +0000163 return ret;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800164
165 if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
Ben Hutchings94e61082008-03-05 16:52:39 +0000166 vpd->busy = false;
167 return 0;
168 }
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800169
170 if (time_after(jiffies, timeout))
Ben Hutchings94e61082008-03-05 16:52:39 +0000171 return -ETIMEDOUT;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800172 if (fatal_signal_pending(current))
173 return -EINTR;
174 if (!cond_resched())
175 udelay(10);
Ben Hutchings94e61082008-03-05 16:52:39 +0000176 }
177}
178
179static int pci_vpd_pci22_read(struct pci_dev *dev, int pos, int size,
180 char *buf)
181{
182 struct pci_vpd_pci22 *vpd =
183 container_of(dev->vpd, struct pci_vpd_pci22, base);
184 u32 val;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800185 int ret = 0;
Ben Hutchings94e61082008-03-05 16:52:39 +0000186 int begin, end, i;
187
Benjamin Li99cb233d2008-07-02 10:59:04 -0700188 if (pos < 0 || pos > vpd->base.len || size > vpd->base.len - pos)
Ben Hutchings94e61082008-03-05 16:52:39 +0000189 return -EINVAL;
190 if (size == 0)
191 return 0;
192
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800193 if (mutex_lock_killable(&vpd->lock))
194 return -EINTR;
195
Ben Hutchings94e61082008-03-05 16:52:39 +0000196 ret = pci_vpd_pci22_wait(dev);
197 if (ret < 0)
198 goto out;
199 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
200 pos & ~3);
201 if (ret < 0)
202 goto out;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800203
Ben Hutchings94e61082008-03-05 16:52:39 +0000204 vpd->busy = true;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800205 vpd->flag = PCI_VPD_ADDR_F;
Ben Hutchings94e61082008-03-05 16:52:39 +0000206 ret = pci_vpd_pci22_wait(dev);
207 if (ret < 0)
208 goto out;
209 ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA,
210 &val);
211out:
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800212 mutex_unlock(&vpd->lock);
Ben Hutchings94e61082008-03-05 16:52:39 +0000213 if (ret < 0)
214 return ret;
215
216 /* Convert to bytes */
217 begin = pos & 3;
218 end = min(4, begin + size);
219 for (i = 0; i < end; ++i) {
220 if (i >= begin)
221 *buf++ = val;
222 val >>= 8;
223 }
224 return end - begin;
225}
226
227static int pci_vpd_pci22_write(struct pci_dev *dev, int pos, int size,
228 const char *buf)
229{
230 struct pci_vpd_pci22 *vpd =
231 container_of(dev->vpd, struct pci_vpd_pci22, base);
232 u32 val;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800233 int ret = 0;
Ben Hutchings94e61082008-03-05 16:52:39 +0000234
Benjamin Li99cb233d2008-07-02 10:59:04 -0700235 if (pos < 0 || pos > vpd->base.len || pos & 3 ||
236 size > vpd->base.len - pos || size < 4)
Ben Hutchings94e61082008-03-05 16:52:39 +0000237 return -EINVAL;
238
239 val = (u8) *buf++;
240 val |= ((u8) *buf++) << 8;
241 val |= ((u8) *buf++) << 16;
242 val |= ((u32)(u8) *buf++) << 24;
243
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800244 if (mutex_lock_killable(&vpd->lock))
245 return -EINTR;
Ben Hutchings94e61082008-03-05 16:52:39 +0000246 ret = pci_vpd_pci22_wait(dev);
247 if (ret < 0)
248 goto out;
249 ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA,
250 val);
251 if (ret < 0)
252 goto out;
253 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
254 pos | PCI_VPD_ADDR_F);
255 if (ret < 0)
256 goto out;
257 vpd->busy = true;
258 vpd->flag = 0;
259 ret = pci_vpd_pci22_wait(dev);
260out:
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800261 mutex_unlock(&vpd->lock);
Ben Hutchings94e61082008-03-05 16:52:39 +0000262 if (ret < 0)
263 return ret;
264
265 return 4;
266}
267
Ben Hutchings94e61082008-03-05 16:52:39 +0000268static void pci_vpd_pci22_release(struct pci_dev *dev)
269{
270 kfree(container_of(dev->vpd, struct pci_vpd_pci22, base));
271}
272
273static struct pci_vpd_ops pci_vpd_pci22_ops = {
274 .read = pci_vpd_pci22_read,
275 .write = pci_vpd_pci22_write,
Ben Hutchings94e61082008-03-05 16:52:39 +0000276 .release = pci_vpd_pci22_release,
277};
278
279int pci_vpd_pci22_init(struct pci_dev *dev)
280{
281 struct pci_vpd_pci22 *vpd;
282 u8 cap;
283
284 cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
285 if (!cap)
286 return -ENODEV;
287 vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
288 if (!vpd)
289 return -ENOMEM;
290
Benjamin Li99cb233d2008-07-02 10:59:04 -0700291 vpd->base.len = PCI_VPD_PCI22_SIZE;
Ben Hutchings94e61082008-03-05 16:52:39 +0000292 vpd->base.ops = &pci_vpd_pci22_ops;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800293 mutex_init(&vpd->lock);
Ben Hutchings94e61082008-03-05 16:52:39 +0000294 vpd->cap = cap;
295 vpd->busy = false;
296 dev->vpd = &vpd->base;
297 return 0;
298}
299
Brian Kinge04b0ea2005-09-27 01:21:55 -0700300/**
301 * pci_block_user_cfg_access - Block userspace PCI config reads/writes
302 * @dev: pci device struct
303 *
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600304 * When user access is blocked, any reads or writes to config space will
305 * sleep until access is unblocked again. We don't allow nesting of
306 * block/unblock calls.
307 */
Brian Kinge04b0ea2005-09-27 01:21:55 -0700308void pci_block_user_cfg_access(struct pci_dev *dev)
309{
310 unsigned long flags;
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600311 int was_blocked;
Brian Kinge04b0ea2005-09-27 01:21:55 -0700312
Brian Kinge04b0ea2005-09-27 01:21:55 -0700313 spin_lock_irqsave(&pci_lock, flags);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600314 was_blocked = dev->block_ucfg_access;
Brian Kinge04b0ea2005-09-27 01:21:55 -0700315 dev->block_ucfg_access = 1;
316 spin_unlock_irqrestore(&pci_lock, flags);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600317
318 /* If we BUG() inside the pci_lock, we're guaranteed to hose
319 * the machine */
320 BUG_ON(was_blocked);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700321}
322EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
323
324/**
325 * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
326 * @dev: pci device struct
327 *
328 * This function allows userspace PCI config accesses to resume.
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600329 */
Brian Kinge04b0ea2005-09-27 01:21:55 -0700330void pci_unblock_user_cfg_access(struct pci_dev *dev)
331{
332 unsigned long flags;
333
Brian Kinge04b0ea2005-09-27 01:21:55 -0700334 spin_lock_irqsave(&pci_lock, flags);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600335
336 /* This indicates a problem in the caller, but we don't need
337 * to kill them, unlike a double-block above. */
338 WARN_ON(!dev->block_ucfg_access);
339
Brian Kinge04b0ea2005-09-27 01:21:55 -0700340 dev->block_ucfg_access = 0;
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600341 wake_up_all(&pci_ucfg_wait);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700342 spin_unlock_irqrestore(&pci_lock, flags);
343}
344EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);