Blame - drivers/scsi/aic7xxx/aic79xx_reg_print.c_shipped - kernel/msm-4.9

blob: a4137c985376b6eabff30ed6a366356eafc4e87a [file] [log] [blame]

Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1	/*
				2	* DO NOT EDIT - This file is automatically generated
				3	* from the following source files:
				4	*
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	5	* $Id: //depot/aic7xxx/aic7xxx/aic79xx.seq#118 $
				6	* $Id: //depot/aic7xxx/aic7xxx/aic79xx.reg#75 $
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	7	*/
				8
				9	#include "aic79xx_osm.h"
				10
				11	static ahd_reg_parse_entry_t MODE_PTR_parse_table[] = {
				12	{ "SRC_MODE", 0x07, 0x07 },
				13	{ "DST_MODE", 0x70, 0x70 }
				14	};
				15
				16	int
				17	ahd_mode_ptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				18	{
				19	return (ahd_print_register(MODE_PTR_parse_table, 2, "MODE_PTR",
				20	0x00, regvalue, cur_col, wrap));
				21	}
				22
				23	static ahd_reg_parse_entry_t INTSTAT_parse_table[] = {
				24	{ "SPLTINT", 0x01, 0x01 },
				25	{ "CMDCMPLT", 0x02, 0x02 },
				26	{ "SEQINT", 0x04, 0x04 },
				27	{ "SCSIINT", 0x08, 0x08 },
				28	{ "PCIINT", 0x10, 0x10 },
				29	{ "SWTMINT", 0x20, 0x20 },
				30	{ "BRKADRINT", 0x40, 0x40 },
				31	{ "HWERRINT", 0x80, 0x80 },
				32	{ "INT_PEND", 0xff, 0xff }
				33	};
				34
				35	int
				36	ahd_intstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				37	{
				38	return (ahd_print_register(INTSTAT_parse_table, 9, "INTSTAT",
				39	0x01, regvalue, cur_col, wrap));
				40	}
				41
				42	static ahd_reg_parse_entry_t SEQINTCODE_parse_table[] = {
				43	{ "NO_SEQINT", 0x00, 0xff },
				44	{ "BAD_PHASE", 0x01, 0xff },
				45	{ "SEND_REJECT", 0x02, 0xff },
				46	{ "PROTO_VIOLATION", 0x03, 0xff },
				47	{ "NO_MATCH", 0x04, 0xff },
				48	{ "IGN_WIDE_RES", 0x05, 0xff },
				49	{ "PDATA_REINIT", 0x06, 0xff },
				50	{ "HOST_MSG_LOOP", 0x07, 0xff },
				51	{ "BAD_STATUS", 0x08, 0xff },
				52	{ "DATA_OVERRUN", 0x09, 0xff },
				53	{ "MKMSG_FAILED", 0x0a, 0xff },
				54	{ "MISSED_BUSFREE", 0x0b, 0xff },
				55	{ "DUMP_CARD_STATE", 0x0c, 0xff },
				56	{ "ILLEGAL_PHASE", 0x0d, 0xff },
				57	{ "INVALID_SEQINT", 0x0e, 0xff },
				58	{ "CFG4ISTAT_INTR", 0x0f, 0xff },
				59	{ "STATUS_OVERRUN", 0x10, 0xff },
				60	{ "CFG4OVERRUN", 0x11, 0xff },
				61	{ "ENTERING_NONPACK", 0x12, 0xff },
				62	{ "TASKMGMT_FUNC_COMPLETE",0x13, 0xff },
				63	{ "TASKMGMT_CMD_CMPLT_OKAY",0x14, 0xff },
				64	{ "TRACEPOINT0", 0x15, 0xff },
				65	{ "TRACEPOINT1", 0x16, 0xff },
				66	{ "TRACEPOINT2", 0x17, 0xff },
				67	{ "TRACEPOINT3", 0x18, 0xff },
				68	{ "SAW_HWERR", 0x19, 0xff },
				69	{ "BAD_SCB_STATUS", 0x1a, 0xff }
				70	};
				71
				72	int
				73	ahd_seqintcode_print(u_int regvalue, u_int *cur_col, u_int wrap)
				74	{
				75	return (ahd_print_register(SEQINTCODE_parse_table, 27, "SEQINTCODE",
				76	0x02, regvalue, cur_col, wrap));
				77	}
				78
				79	static ahd_reg_parse_entry_t CLRINT_parse_table[] = {
				80	{ "CLRSPLTINT", 0x01, 0x01 },
				81	{ "CLRCMDINT", 0x02, 0x02 },
				82	{ "CLRSEQINT", 0x04, 0x04 },
				83	{ "CLRSCSIINT", 0x08, 0x08 },
				84	{ "CLRPCIINT", 0x10, 0x10 },
				85	{ "CLRSWTMINT", 0x20, 0x20 },
				86	{ "CLRBRKADRINT", 0x40, 0x40 },
				87	{ "CLRHWERRINT", 0x80, 0x80 }
				88	};
				89
				90	int
				91	ahd_clrint_print(u_int regvalue, u_int *cur_col, u_int wrap)
				92	{
				93	return (ahd_print_register(CLRINT_parse_table, 8, "CLRINT",
				94	0x03, regvalue, cur_col, wrap));
				95	}
				96
				97	static ahd_reg_parse_entry_t ERROR_parse_table[] = {
				98	{ "DSCTMOUT", 0x02, 0x02 },
				99	{ "ILLOPCODE", 0x04, 0x04 },
				100	{ "SQPARERR", 0x08, 0x08 },
				101	{ "DPARERR", 0x10, 0x10 },
				102	{ "MPARERR", 0x20, 0x20 },
				103	{ "CIOACCESFAIL", 0x40, 0x40 },
				104	{ "CIOPARERR", 0x80, 0x80 }
				105	};
				106
				107	int
				108	ahd_error_print(u_int regvalue, u_int *cur_col, u_int wrap)
				109	{
				110	return (ahd_print_register(ERROR_parse_table, 7, "ERROR",
				111	0x04, regvalue, cur_col, wrap));
				112	}
				113
				114	static ahd_reg_parse_entry_t CLRERR_parse_table[] = {
				115	{ "CLRDSCTMOUT", 0x02, 0x02 },
				116	{ "CLRILLOPCODE", 0x04, 0x04 },
				117	{ "CLRSQPARERR", 0x08, 0x08 },
				118	{ "CLRDPARERR", 0x10, 0x10 },
				119	{ "CLRMPARERR", 0x20, 0x20 },
				120	{ "CLRCIOACCESFAIL", 0x40, 0x40 },
				121	{ "CLRCIOPARERR", 0x80, 0x80 }
				122	};
				123
				124	int
				125	ahd_clrerr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				126	{
				127	return (ahd_print_register(CLRERR_parse_table, 7, "CLRERR",
				128	0x04, regvalue, cur_col, wrap));
				129	}
				130
				131	static ahd_reg_parse_entry_t HCNTRL_parse_table[] = {
				132	{ "CHIPRST", 0x01, 0x01 },
				133	{ "CHIPRSTACK", 0x01, 0x01 },
				134	{ "INTEN", 0x02, 0x02 },
				135	{ "PAUSE", 0x04, 0x04 },
				136	{ "SWTIMER_START_B", 0x08, 0x08 },
				137	{ "SWINT", 0x10, 0x10 },
				138	{ "POWRDN", 0x40, 0x40 },
				139	{ "SEQ_RESET", 0x80, 0x80 }
				140	};
				141
				142	int
				143	ahd_hcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				144	{
				145	return (ahd_print_register(HCNTRL_parse_table, 8, "HCNTRL",
				146	0x05, regvalue, cur_col, wrap));
				147	}
				148
				149	int
				150	ahd_hnscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
				151	{
				152	return (ahd_print_register(NULL, 0, "HNSCB_QOFF",
				153	0x06, regvalue, cur_col, wrap));
				154	}
				155
				156	int
				157	ahd_hescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
				158	{
				159	return (ahd_print_register(NULL, 0, "HESCB_QOFF",
				160	0x08, regvalue, cur_col, wrap));
				161	}
				162
				163	static ahd_reg_parse_entry_t HS_MAILBOX_parse_table[] = {
				164	{ "ENINT_COALESCE", 0x40, 0x40 },
				165	{ "HOST_TQINPOS", 0x80, 0x80 }
				166	};
				167
				168	int
				169	ahd_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
				170	{
				171	return (ahd_print_register(HS_MAILBOX_parse_table, 2, "HS_MAILBOX",
				172	0x0b, regvalue, cur_col, wrap));
				173	}
				174
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	175	static ahd_reg_parse_entry_t SEQINTSTAT_parse_table[] = {
				176	{ "SEQ_SPLTINT", 0x01, 0x01 },
				177	{ "SEQ_PCIINT", 0x02, 0x02 },
				178	{ "SEQ_SCSIINT", 0x04, 0x04 },
				179	{ "SEQ_SEQINT", 0x08, 0x08 },
				180	{ "SEQ_SWTMRTO", 0x10, 0x10 }
				181	};
				182
				183	int
				184	ahd_seqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				185	{
				186	return (ahd_print_register(SEQINTSTAT_parse_table, 5, "SEQINTSTAT",
				187	0x0c, regvalue, cur_col, wrap));
				188	}
				189
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	190	static ahd_reg_parse_entry_t CLRSEQINTSTAT_parse_table[] = {
				191	{ "CLRSEQ_SPLTINT", 0x01, 0x01 },
				192	{ "CLRSEQ_PCIINT", 0x02, 0x02 },
				193	{ "CLRSEQ_SCSIINT", 0x04, 0x04 },
				194	{ "CLRSEQ_SEQINT", 0x08, 0x08 },
				195	{ "CLRSEQ_SWTMRTO", 0x10, 0x10 }
				196	};
				197
				198	int
				199	ahd_clrseqintstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				200	{
				201	return (ahd_print_register(CLRSEQINTSTAT_parse_table, 5, "CLRSEQINTSTAT",
				202	0x0c, regvalue, cur_col, wrap));
				203	}
				204
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	205	int
				206	ahd_swtimer_print(u_int regvalue, u_int *cur_col, u_int wrap)
				207	{
				208	return (ahd_print_register(NULL, 0, "SWTIMER",
				209	0x0e, regvalue, cur_col, wrap));
				210	}
				211
				212	int
				213	ahd_snscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
				214	{
				215	return (ahd_print_register(NULL, 0, "SNSCB_QOFF",
				216	0x10, regvalue, cur_col, wrap));
				217	}
				218
				219	int
				220	ahd_sescb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
				221	{
				222	return (ahd_print_register(NULL, 0, "SESCB_QOFF",
				223	0x12, regvalue, cur_col, wrap));
				224	}
				225
				226	int
				227	ahd_sdscb_qoff_print(u_int regvalue, u_int *cur_col, u_int wrap)
				228	{
				229	return (ahd_print_register(NULL, 0, "SDSCB_QOFF",
				230	0x14, regvalue, cur_col, wrap));
				231	}
				232
				233	static ahd_reg_parse_entry_t QOFF_CTLSTA_parse_table[] = {
				234	{ "SCB_QSIZE_4", 0x00, 0x0f },
				235	{ "SCB_QSIZE_8", 0x01, 0x0f },
				236	{ "SCB_QSIZE_16", 0x02, 0x0f },
				237	{ "SCB_QSIZE_32", 0x03, 0x0f },
				238	{ "SCB_QSIZE_64", 0x04, 0x0f },
				239	{ "SCB_QSIZE_128", 0x05, 0x0f },
				240	{ "SCB_QSIZE_256", 0x06, 0x0f },
				241	{ "SCB_QSIZE_512", 0x07, 0x0f },
				242	{ "SCB_QSIZE_1024", 0x08, 0x0f },
				243	{ "SCB_QSIZE_2048", 0x09, 0x0f },
				244	{ "SCB_QSIZE_4096", 0x0a, 0x0f },
				245	{ "SCB_QSIZE_8192", 0x0b, 0x0f },
				246	{ "SCB_QSIZE_16384", 0x0c, 0x0f },
				247	{ "SCB_QSIZE", 0x0f, 0x0f },
				248	{ "HS_MAILBOX_ACT", 0x10, 0x10 },
				249	{ "SDSCB_ROLLOVR", 0x20, 0x20 },
				250	{ "NEW_SCB_AVAIL", 0x40, 0x40 },
				251	{ "EMPTY_SCB_AVAIL", 0x80, 0x80 }
				252	};
				253
				254	int
				255	ahd_qoff_ctlsta_print(u_int regvalue, u_int *cur_col, u_int wrap)
				256	{
				257	return (ahd_print_register(QOFF_CTLSTA_parse_table, 18, "QOFF_CTLSTA",
				258	0x16, regvalue, cur_col, wrap));
				259	}
				260
				261	static ahd_reg_parse_entry_t INTCTL_parse_table[] = {
				262	{ "SPLTINTEN", 0x01, 0x01 },
				263	{ "SEQINTEN", 0x02, 0x02 },
				264	{ "SCSIINTEN", 0x04, 0x04 },
				265	{ "PCIINTEN", 0x08, 0x08 },
				266	{ "AUTOCLRCMDINT", 0x10, 0x10 },
				267	{ "SWTIMER_START", 0x20, 0x20 },
				268	{ "SWTMINTEN", 0x40, 0x40 },
				269	{ "SWTMINTMASK", 0x80, 0x80 }
				270	};
				271
				272	int
				273	ahd_intctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				274	{
				275	return (ahd_print_register(INTCTL_parse_table, 8, "INTCTL",
				276	0x18, regvalue, cur_col, wrap));
				277	}
				278
				279	static ahd_reg_parse_entry_t DFCNTRL_parse_table[] = {
				280	{ "DIRECTIONEN", 0x01, 0x01 },
				281	{ "FIFOFLUSH", 0x02, 0x02 },
				282	{ "FIFOFLUSHACK", 0x02, 0x02 },
				283	{ "DIRECTION", 0x04, 0x04 },
				284	{ "DIRECTIONACK", 0x04, 0x04 },
				285	{ "HDMAEN", 0x08, 0x08 },
				286	{ "HDMAENACK", 0x08, 0x08 },
				287	{ "SCSIEN", 0x20, 0x20 },
				288	{ "SCSIENACK", 0x20, 0x20 },
				289	{ "SCSIENWRDIS", 0x40, 0x40 },
				290	{ "PRELOADEN", 0x80, 0x80 }
				291	};
				292
				293	int
				294	ahd_dfcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				295	{
				296	return (ahd_print_register(DFCNTRL_parse_table, 11, "DFCNTRL",
				297	0x19, regvalue, cur_col, wrap));
				298	}
				299
				300	static ahd_reg_parse_entry_t DSCOMMAND0_parse_table[] = {
				301	{ "CIOPARCKEN", 0x01, 0x01 },
				302	{ "DISABLE_TWATE", 0x02, 0x02 },
				303	{ "EXTREQLCK", 0x10, 0x10 },
				304	{ "MPARCKEN", 0x20, 0x20 },
				305	{ "DPARCKEN", 0x40, 0x40 },
				306	{ "CACHETHEN", 0x80, 0x80 }
				307	};
				308
				309	int
				310	ahd_dscommand0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				311	{
				312	return (ahd_print_register(DSCOMMAND0_parse_table, 6, "DSCOMMAND0",
				313	0x19, regvalue, cur_col, wrap));
				314	}
				315
				316	static ahd_reg_parse_entry_t DFSTATUS_parse_table[] = {
				317	{ "FIFOEMP", 0x01, 0x01 },
				318	{ "FIFOFULL", 0x02, 0x02 },
				319	{ "DFTHRESH", 0x04, 0x04 },
				320	{ "HDONE", 0x08, 0x08 },
				321	{ "MREQPEND", 0x10, 0x10 },
				322	{ "PKT_PRELOAD_AVAIL", 0x40, 0x40 },
				323	{ "PRELOAD_AVAIL", 0x80, 0x80 }
				324	};
				325
				326	int
				327	ahd_dfstatus_print(u_int regvalue, u_int *cur_col, u_int wrap)
				328	{
				329	return (ahd_print_register(DFSTATUS_parse_table, 7, "DFSTATUS",
				330	0x1a, regvalue, cur_col, wrap));
				331	}
				332
				333	static ahd_reg_parse_entry_t SG_CACHE_SHADOW_parse_table[] = {
				334	{ "LAST_SEG_DONE", 0x01, 0x01 },
				335	{ "LAST_SEG", 0x02, 0x02 },
				336	{ "ODD_SEG", 0x04, 0x04 },
				337	{ "SG_ADDR_MASK", 0xf8, 0xf8 }
				338	};
				339
				340	int
				341	ahd_sg_cache_shadow_print(u_int regvalue, u_int *cur_col, u_int wrap)
				342	{
				343	return (ahd_print_register(SG_CACHE_SHADOW_parse_table, 4, "SG_CACHE_SHADOW",
				344	0x1b, regvalue, cur_col, wrap));
				345	}
				346
				347	static ahd_reg_parse_entry_t ARBCTL_parse_table[] = {
				348	{ "USE_TIME", 0x07, 0x07 },
				349	{ "RETRY_SWEN", 0x08, 0x08 },
				350	{ "RESET_HARB", 0x80, 0x80 }
				351	};
				352
				353	int
				354	ahd_arbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				355	{
				356	return (ahd_print_register(ARBCTL_parse_table, 3, "ARBCTL",
				357	0x1b, regvalue, cur_col, wrap));
				358	}
				359
				360	static ahd_reg_parse_entry_t SG_CACHE_PRE_parse_table[] = {
				361	{ "LAST_SEG", 0x02, 0x02 },
				362	{ "ODD_SEG", 0x04, 0x04 },
				363	{ "SG_ADDR_MASK", 0xf8, 0xf8 }
				364	};
				365
				366	int
				367	ahd_sg_cache_pre_print(u_int regvalue, u_int *cur_col, u_int wrap)
				368	{
				369	return (ahd_print_register(SG_CACHE_PRE_parse_table, 3, "SG_CACHE_PRE",
				370	0x1b, regvalue, cur_col, wrap));
				371	}
				372
				373	int
				374	ahd_lqin_print(u_int regvalue, u_int *cur_col, u_int wrap)
				375	{
				376	return (ahd_print_register(NULL, 0, "LQIN",
				377	0x20, regvalue, cur_col, wrap));
				378	}
				379
				380	int
				381	ahd_typeptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				382	{
				383	return (ahd_print_register(NULL, 0, "TYPEPTR",
				384	0x20, regvalue, cur_col, wrap));
				385	}
				386
				387	int
				388	ahd_tagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				389	{
				390	return (ahd_print_register(NULL, 0, "TAGPTR",
				391	0x21, regvalue, cur_col, wrap));
				392	}
				393
				394	int
				395	ahd_lunptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				396	{
				397	return (ahd_print_register(NULL, 0, "LUNPTR",
				398	0x22, regvalue, cur_col, wrap));
				399	}
				400
				401	int
				402	ahd_datalenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				403	{
				404	return (ahd_print_register(NULL, 0, "DATALENPTR",
				405	0x23, regvalue, cur_col, wrap));
				406	}
				407
				408	int
				409	ahd_statlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				410	{
				411	return (ahd_print_register(NULL, 0, "STATLENPTR",
				412	0x24, regvalue, cur_col, wrap));
				413	}
				414
				415	int
				416	ahd_cmdlenptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				417	{
				418	return (ahd_print_register(NULL, 0, "CMDLENPTR",
				419	0x25, regvalue, cur_col, wrap));
				420	}
				421
				422	int
				423	ahd_attrptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				424	{
				425	return (ahd_print_register(NULL, 0, "ATTRPTR",
				426	0x26, regvalue, cur_col, wrap));
				427	}
				428
				429	int
				430	ahd_flagptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				431	{
				432	return (ahd_print_register(NULL, 0, "FLAGPTR",
				433	0x27, regvalue, cur_col, wrap));
				434	}
				435
				436	int
				437	ahd_cmdptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				438	{
				439	return (ahd_print_register(NULL, 0, "CMDPTR",
				440	0x28, regvalue, cur_col, wrap));
				441	}
				442
				443	int
				444	ahd_qnextptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				445	{
				446	return (ahd_print_register(NULL, 0, "QNEXTPTR",
				447	0x29, regvalue, cur_col, wrap));
				448	}
				449
				450	int
				451	ahd_idptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				452	{
				453	return (ahd_print_register(NULL, 0, "IDPTR",
				454	0x2a, regvalue, cur_col, wrap));
				455	}
				456
				457	int
				458	ahd_abrtbyteptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				459	{
				460	return (ahd_print_register(NULL, 0, "ABRTBYTEPTR",
				461	0x2b, regvalue, cur_col, wrap));
				462	}
				463
				464	int
				465	ahd_abrtbitptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				466	{
				467	return (ahd_print_register(NULL, 0, "ABRTBITPTR",
				468	0x2c, regvalue, cur_col, wrap));
				469	}
				470
				471	int
				472	ahd_maxcmdbytes_print(u_int regvalue, u_int *cur_col, u_int wrap)
				473	{
				474	return (ahd_print_register(NULL, 0, "MAXCMDBYTES",
				475	0x2d, regvalue, cur_col, wrap));
				476	}
				477
				478	int
				479	ahd_maxcmd2rcv_print(u_int regvalue, u_int *cur_col, u_int wrap)
				480	{
				481	return (ahd_print_register(NULL, 0, "MAXCMD2RCV",
				482	0x2e, regvalue, cur_col, wrap));
				483	}
				484
				485	int
				486	ahd_shortthresh_print(u_int regvalue, u_int *cur_col, u_int wrap)
				487	{
				488	return (ahd_print_register(NULL, 0, "SHORTTHRESH",
				489	0x2f, regvalue, cur_col, wrap));
				490	}
				491
				492	static ahd_reg_parse_entry_t LUNLEN_parse_table[] = {
				493	{ "ILUNLEN", 0x0f, 0x0f },
				494	{ "TLUNLEN", 0xf0, 0xf0 }
				495	};
				496
				497	int
				498	ahd_lunlen_print(u_int regvalue, u_int *cur_col, u_int wrap)
				499	{
				500	return (ahd_print_register(LUNLEN_parse_table, 2, "LUNLEN",
				501	0x30, regvalue, cur_col, wrap));
				502	}
				503
				504	int
				505	ahd_cdblimit_print(u_int regvalue, u_int *cur_col, u_int wrap)
				506	{
				507	return (ahd_print_register(NULL, 0, "CDBLIMIT",
				508	0x31, regvalue, cur_col, wrap));
				509	}
				510
				511	int
				512	ahd_maxcmd_print(u_int regvalue, u_int *cur_col, u_int wrap)
				513	{
				514	return (ahd_print_register(NULL, 0, "MAXCMD",
				515	0x32, regvalue, cur_col, wrap));
				516	}
				517
				518	int
				519	ahd_maxcmdcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				520	{
				521	return (ahd_print_register(NULL, 0, "MAXCMDCNT",
				522	0x33, regvalue, cur_col, wrap));
				523	}
				524
				525	int
				526	ahd_lqrsvd01_print(u_int regvalue, u_int *cur_col, u_int wrap)
				527	{
				528	return (ahd_print_register(NULL, 0, "LQRSVD01",
				529	0x34, regvalue, cur_col, wrap));
				530	}
				531
				532	int
				533	ahd_lqrsvd16_print(u_int regvalue, u_int *cur_col, u_int wrap)
				534	{
				535	return (ahd_print_register(NULL, 0, "LQRSVD16",
				536	0x35, regvalue, cur_col, wrap));
				537	}
				538
				539	int
				540	ahd_lqrsvd17_print(u_int regvalue, u_int *cur_col, u_int wrap)
				541	{
				542	return (ahd_print_register(NULL, 0, "LQRSVD17",
				543	0x36, regvalue, cur_col, wrap));
				544	}
				545
				546	int
				547	ahd_cmdrsvd0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				548	{
				549	return (ahd_print_register(NULL, 0, "CMDRSVD0",
				550	0x37, regvalue, cur_col, wrap));
				551	}
				552
				553	static ahd_reg_parse_entry_t LQCTL0_parse_table[] = {
				554	{ "LQ0INITGCLT", 0x03, 0x03 },
				555	{ "LQ0TARGCLT", 0x0c, 0x0c },
				556	{ "LQIINITGCLT", 0x30, 0x30 },
				557	{ "LQITARGCLT", 0xc0, 0xc0 }
				558	};
				559
				560	int
				561	ahd_lqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				562	{
				563	return (ahd_print_register(LQCTL0_parse_table, 4, "LQCTL0",
				564	0x38, regvalue, cur_col, wrap));
				565	}
				566
				567	static ahd_reg_parse_entry_t LQCTL1_parse_table[] = {
				568	{ "ABORTPENDING", 0x01, 0x01 },
				569	{ "SINGLECMD", 0x02, 0x02 },
				570	{ "PCI2PCI", 0x04, 0x04 }
				571	};
				572
				573	int
				574	ahd_lqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				575	{
				576	return (ahd_print_register(LQCTL1_parse_table, 3, "LQCTL1",
				577	0x38, regvalue, cur_col, wrap));
				578	}
				579
				580	static ahd_reg_parse_entry_t SCSBIST0_parse_table[] = {
				581	{ "OSBISTRUN", 0x01, 0x01 },
				582	{ "OSBISTDONE", 0x02, 0x02 },
				583	{ "OSBISTERR", 0x04, 0x04 },
				584	{ "GSBISTRUN", 0x10, 0x10 },
				585	{ "GSBISTDONE", 0x20, 0x20 },
				586	{ "GSBISTERR", 0x40, 0x40 }
				587	};
				588
				589	int
				590	ahd_scsbist0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				591	{
				592	return (ahd_print_register(SCSBIST0_parse_table, 6, "SCSBIST0",
				593	0x39, regvalue, cur_col, wrap));
				594	}
				595
				596	static ahd_reg_parse_entry_t LQCTL2_parse_table[] = {
				597	{ "LQOPAUSE", 0x01, 0x01 },
				598	{ "LQOTOIDLE", 0x02, 0x02 },
				599	{ "LQOCONTINUE", 0x04, 0x04 },
				600	{ "LQORETRY", 0x08, 0x08 },
				601	{ "LQIPAUSE", 0x10, 0x10 },
				602	{ "LQITOIDLE", 0x20, 0x20 },
				603	{ "LQICONTINUE", 0x40, 0x40 },
				604	{ "LQIRETRY", 0x80, 0x80 }
				605	};
				606
				607	int
				608	ahd_lqctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				609	{
				610	return (ahd_print_register(LQCTL2_parse_table, 8, "LQCTL2",
				611	0x39, regvalue, cur_col, wrap));
				612	}
				613
				614	static ahd_reg_parse_entry_t SCSBIST1_parse_table[] = {
				615	{ "NTBISTRUN", 0x01, 0x01 },
				616	{ "NTBISTDONE", 0x02, 0x02 },
				617	{ "NTBISTERR", 0x04, 0x04 }
				618	};
				619
				620	int
				621	ahd_scsbist1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				622	{
				623	return (ahd_print_register(SCSBIST1_parse_table, 3, "SCSBIST1",
				624	0x3a, regvalue, cur_col, wrap));
				625	}
				626
				627	static ahd_reg_parse_entry_t SCSISEQ0_parse_table[] = {
				628	{ "SCSIRSTO", 0x01, 0x01 },
				629	{ "FORCEBUSFREE", 0x10, 0x10 },
				630	{ "ENARBO", 0x20, 0x20 },
				631	{ "ENSELO", 0x40, 0x40 },
				632	{ "TEMODEO", 0x80, 0x80 }
				633	};
				634
				635	int
				636	ahd_scsiseq0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				637	{
				638	return (ahd_print_register(SCSISEQ0_parse_table, 5, "SCSISEQ0",
				639	0x3a, regvalue, cur_col, wrap));
				640	}
				641
				642	static ahd_reg_parse_entry_t SCSISEQ1_parse_table[] = {
				643	{ "ALTSTIM", 0x01, 0x01 },
				644	{ "ENAUTOATNP", 0x02, 0x02 },
				645	{ "MANUALP", 0x0c, 0x0c },
				646	{ "ENRSELI", 0x10, 0x10 },
				647	{ "ENSELI", 0x20, 0x20 },
				648	{ "MANUALCTL", 0x40, 0x40 }
				649	};
				650
				651	int
				652	ahd_scsiseq1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				653	{
				654	return (ahd_print_register(SCSISEQ1_parse_table, 6, "SCSISEQ1",
				655	0x3b, regvalue, cur_col, wrap));
				656	}
				657
				658	static ahd_reg_parse_entry_t SXFRCTL0_parse_table[] = {
				659	{ "SPIOEN", 0x08, 0x08 },
				660	{ "BIOSCANCELEN", 0x10, 0x10 },
				661	{ "DFPEXP", 0x40, 0x40 },
				662	{ "DFON", 0x80, 0x80 }
				663	};
				664
				665	int
				666	ahd_sxfrctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				667	{
				668	return (ahd_print_register(SXFRCTL0_parse_table, 4, "SXFRCTL0",
				669	0x3c, regvalue, cur_col, wrap));
				670	}
				671
				672	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	673	ahd_dlcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	674	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	675	return (ahd_print_register(NULL, 0, "DLCOUNT",
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	676	0x3c, regvalue, cur_col, wrap));
				677	}
				678
				679	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	680	ahd_businitid_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	681	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	682	return (ahd_print_register(NULL, 0, "BUSINITID",
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	683	0x3c, regvalue, cur_col, wrap));
				684	}
				685
				686	static ahd_reg_parse_entry_t SXFRCTL1_parse_table[] = {
				687	{ "STPWEN", 0x01, 0x01 },
				688	{ "ACTNEGEN", 0x02, 0x02 },
				689	{ "ENSTIMER", 0x04, 0x04 },
				690	{ "STIMESEL", 0x18, 0x18 },
				691	{ "ENSPCHK", 0x20, 0x20 },
				692	{ "ENSACHK", 0x40, 0x40 },
				693	{ "BITBUCKET", 0x80, 0x80 }
				694	};
				695
				696	int
				697	ahd_sxfrctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				698	{
				699	return (ahd_print_register(SXFRCTL1_parse_table, 7, "SXFRCTL1",
				700	0x3d, regvalue, cur_col, wrap));
				701	}
				702
				703	int
				704	ahd_bustargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
				705	{
				706	return (ahd_print_register(NULL, 0, "BUSTARGID",
				707	0x3e, regvalue, cur_col, wrap));
				708	}
				709
				710	static ahd_reg_parse_entry_t SXFRCTL2_parse_table[] = {
				711	{ "ASU", 0x07, 0x07 },
				712	{ "CMDDMAEN", 0x08, 0x08 },
				713	{ "AUTORSTDIS", 0x10, 0x10 }
				714	};
				715
				716	int
				717	ahd_sxfrctl2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				718	{
				719	return (ahd_print_register(SXFRCTL2_parse_table, 3, "SXFRCTL2",
				720	0x3e, regvalue, cur_col, wrap));
				721	}
				722
				723	static ahd_reg_parse_entry_t DFFSTAT_parse_table[] = {
				724	{ "CURRFIFO_0", 0x00, 0x03 },
				725	{ "CURRFIFO_1", 0x01, 0x03 },
				726	{ "CURRFIFO_NONE", 0x03, 0x03 },
				727	{ "FIFO0FREE", 0x10, 0x10 },
				728	{ "FIFO1FREE", 0x20, 0x20 },
				729	{ "CURRFIFO", 0x03, 0x03 }
				730	};
				731
				732	int
				733	ahd_dffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				734	{
				735	return (ahd_print_register(DFFSTAT_parse_table, 6, "DFFSTAT",
				736	0x3f, regvalue, cur_col, wrap));
				737	}
				738
				739	static ahd_reg_parse_entry_t SCSISIGO_parse_table[] = {
				740	{ "P_DATAOUT", 0x00, 0xe0 },
				741	{ "P_DATAOUT_DT", 0x20, 0xe0 },
				742	{ "P_DATAIN", 0x40, 0xe0 },
				743	{ "P_DATAIN_DT", 0x60, 0xe0 },
				744	{ "P_COMMAND", 0x80, 0xe0 },
				745	{ "P_MESGOUT", 0xa0, 0xe0 },
				746	{ "P_STATUS", 0xc0, 0xe0 },
				747	{ "P_MESGIN", 0xe0, 0xe0 },
				748	{ "ACKO", 0x01, 0x01 },
				749	{ "REQO", 0x02, 0x02 },
				750	{ "BSYO", 0x04, 0x04 },
				751	{ "SELO", 0x08, 0x08 },
				752	{ "ATNO", 0x10, 0x10 },
				753	{ "MSGO", 0x20, 0x20 },
				754	{ "IOO", 0x40, 0x40 },
				755	{ "CDO", 0x80, 0x80 },
				756	{ "PHASE_MASK", 0xe0, 0xe0 }
				757	};
				758
				759	int
				760	ahd_scsisigo_print(u_int regvalue, u_int *cur_col, u_int wrap)
				761	{
				762	return (ahd_print_register(SCSISIGO_parse_table, 17, "SCSISIGO",
				763	0x40, regvalue, cur_col, wrap));
				764	}
				765
				766	int
				767	ahd_multargid_print(u_int regvalue, u_int *cur_col, u_int wrap)
				768	{
				769	return (ahd_print_register(NULL, 0, "MULTARGID",
				770	0x40, regvalue, cur_col, wrap));
				771	}
				772
				773	static ahd_reg_parse_entry_t SCSISIGI_parse_table[] = {
				774	{ "P_DATAOUT", 0x00, 0xe0 },
				775	{ "P_DATAOUT_DT", 0x20, 0xe0 },
				776	{ "P_DATAIN", 0x40, 0xe0 },
				777	{ "P_DATAIN_DT", 0x60, 0xe0 },
				778	{ "P_COMMAND", 0x80, 0xe0 },
				779	{ "P_MESGOUT", 0xa0, 0xe0 },
				780	{ "P_STATUS", 0xc0, 0xe0 },
				781	{ "P_MESGIN", 0xe0, 0xe0 },
				782	{ "ACKI", 0x01, 0x01 },
				783	{ "REQI", 0x02, 0x02 },
				784	{ "BSYI", 0x04, 0x04 },
				785	{ "SELI", 0x08, 0x08 },
				786	{ "ATNI", 0x10, 0x10 },
				787	{ "MSGI", 0x20, 0x20 },
				788	{ "IOI", 0x40, 0x40 },
				789	{ "CDI", 0x80, 0x80 },
				790	{ "PHASE_MASK", 0xe0, 0xe0 }
				791	};
				792
				793	int
				794	ahd_scsisigi_print(u_int regvalue, u_int *cur_col, u_int wrap)
				795	{
				796	return (ahd_print_register(SCSISIGI_parse_table, 17, "SCSISIGI",
				797	0x41, regvalue, cur_col, wrap));
				798	}
				799
				800	static ahd_reg_parse_entry_t SCSIPHASE_parse_table[] = {
				801	{ "DATA_OUT_PHASE", 0x01, 0x03 },
				802	{ "DATA_IN_PHASE", 0x02, 0x03 },
				803	{ "DATA_PHASE_MASK", 0x03, 0x03 },
				804	{ "MSG_OUT_PHASE", 0x04, 0x04 },
				805	{ "MSG_IN_PHASE", 0x08, 0x08 },
				806	{ "COMMAND_PHASE", 0x10, 0x10 },
				807	{ "STATUS_PHASE", 0x20, 0x20 }
				808	};
				809
				810	int
				811	ahd_scsiphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
				812	{
				813	return (ahd_print_register(SCSIPHASE_parse_table, 7, "SCSIPHASE",
				814	0x42, regvalue, cur_col, wrap));
				815	}
				816
				817	int
				818	ahd_scsidat0_img_print(u_int regvalue, u_int *cur_col, u_int wrap)
				819	{
				820	return (ahd_print_register(NULL, 0, "SCSIDAT0_IMG",
				821	0x43, regvalue, cur_col, wrap));
				822	}
				823
				824	int
				825	ahd_scsidat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				826	{
				827	return (ahd_print_register(NULL, 0, "SCSIDAT",
				828	0x44, regvalue, cur_col, wrap));
				829	}
				830
				831	int
				832	ahd_scsibus_print(u_int regvalue, u_int *cur_col, u_int wrap)
				833	{
				834	return (ahd_print_register(NULL, 0, "SCSIBUS",
				835	0x46, regvalue, cur_col, wrap));
				836	}
				837
				838	static ahd_reg_parse_entry_t TARGIDIN_parse_table[] = {
				839	{ "TARGID", 0x0f, 0x0f },
				840	{ "CLKOUT", 0x80, 0x80 }
				841	};
				842
				843	int
				844	ahd_targidin_print(u_int regvalue, u_int *cur_col, u_int wrap)
				845	{
				846	return (ahd_print_register(TARGIDIN_parse_table, 2, "TARGIDIN",
				847	0x48, regvalue, cur_col, wrap));
				848	}
				849
				850	static ahd_reg_parse_entry_t SELID_parse_table[] = {
				851	{ "ONEBIT", 0x08, 0x08 },
				852	{ "SELID_MASK", 0xf0, 0xf0 }
				853	};
				854
				855	int
				856	ahd_selid_print(u_int regvalue, u_int *cur_col, u_int wrap)
				857	{
				858	return (ahd_print_register(SELID_parse_table, 2, "SELID",
				859	0x49, regvalue, cur_col, wrap));
				860	}
				861
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	862	static ahd_reg_parse_entry_t OPTIONMODE_parse_table[] = {
				863	{ "AUTO_MSGOUT_DE", 0x02, 0x02 },
				864	{ "ENDGFORMCHK", 0x04, 0x04 },
				865	{ "BUSFREEREV", 0x10, 0x10 },
				866	{ "BIASCANCTL", 0x20, 0x20 },
				867	{ "AUTOACKEN", 0x40, 0x40 },
				868	{ "BIOSCANCTL", 0x80, 0x80 },
				869	{ "OPTIONMODE_DEFAULTS",0x02, 0x02 }
				870	};
				871
				872	int
				873	ahd_optionmode_print(u_int regvalue, u_int *cur_col, u_int wrap)
				874	{
				875	return (ahd_print_register(OPTIONMODE_parse_table, 7, "OPTIONMODE",
				876	0x4a, regvalue, cur_col, wrap));
				877	}
				878
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	879	static ahd_reg_parse_entry_t SBLKCTL_parse_table[] = {
				880	{ "SELWIDE", 0x02, 0x02 },
				881	{ "ENAB20", 0x04, 0x04 },
				882	{ "ENAB40", 0x08, 0x08 },
				883	{ "DIAGLEDON", 0x40, 0x40 },
				884	{ "DIAGLEDEN", 0x80, 0x80 }
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	885	};
				886
				887	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	888	ahd_sblkctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	889	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	890	return (ahd_print_register(SBLKCTL_parse_table, 5, "SBLKCTL",
				891	0x4a, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	892	}
				893
				894	static ahd_reg_parse_entry_t CLRSINT0_parse_table[] = {
				895	{ "CLRARBDO", 0x01, 0x01 },
				896	{ "CLRSPIORDY", 0x02, 0x02 },
				897	{ "CLROVERRUN", 0x04, 0x04 },
				898	{ "CLRIOERR", 0x08, 0x08 },
				899	{ "CLRSELINGO", 0x10, 0x10 },
				900	{ "CLRSELDI", 0x20, 0x20 },
				901	{ "CLRSELDO", 0x40, 0x40 }
				902	};
				903
				904	int
				905	ahd_clrsint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				906	{
				907	return (ahd_print_register(CLRSINT0_parse_table, 7, "CLRSINT0",
				908	0x4b, regvalue, cur_col, wrap));
				909	}
				910
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	911	static ahd_reg_parse_entry_t SSTAT0_parse_table[] = {
				912	{ "ARBDO", 0x01, 0x01 },
				913	{ "SPIORDY", 0x02, 0x02 },
				914	{ "OVERRUN", 0x04, 0x04 },
				915	{ "IOERR", 0x08, 0x08 },
				916	{ "SELINGO", 0x10, 0x10 },
				917	{ "SELDI", 0x20, 0x20 },
				918	{ "SELDO", 0x40, 0x40 },
				919	{ "TARGET", 0x80, 0x80 }
				920	};
				921
				922	int
				923	ahd_sstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				924	{
				925	return (ahd_print_register(SSTAT0_parse_table, 8, "SSTAT0",
				926	0x4b, regvalue, cur_col, wrap));
				927	}
				928
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	929	static ahd_reg_parse_entry_t SIMODE0_parse_table[] = {
				930	{ "ENARBDO", 0x01, 0x01 },
				931	{ "ENSPIORDY", 0x02, 0x02 },
				932	{ "ENOVERRUN", 0x04, 0x04 },
				933	{ "ENIOERR", 0x08, 0x08 },
				934	{ "ENSELINGO", 0x10, 0x10 },
				935	{ "ENSELDI", 0x20, 0x20 },
				936	{ "ENSELDO", 0x40, 0x40 }
				937	};
				938
				939	int
				940	ahd_simode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				941	{
				942	return (ahd_print_register(SIMODE0_parse_table, 7, "SIMODE0",
				943	0x4b, regvalue, cur_col, wrap));
				944	}
				945
				946	static ahd_reg_parse_entry_t CLRSINT1_parse_table[] = {
				947	{ "CLRREQINIT", 0x01, 0x01 },
				948	{ "CLRSTRB2FAST", 0x02, 0x02 },
				949	{ "CLRSCSIPERR", 0x04, 0x04 },
				950	{ "CLRBUSFREE", 0x08, 0x08 },
				951	{ "CLRSCSIRSTI", 0x20, 0x20 },
				952	{ "CLRATNO", 0x40, 0x40 },
				953	{ "CLRSELTIMEO", 0x80, 0x80 }
				954	};
				955
				956	int
				957	ahd_clrsint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				958	{
				959	return (ahd_print_register(CLRSINT1_parse_table, 7, "CLRSINT1",
				960	0x4c, regvalue, cur_col, wrap));
				961	}
				962
				963	static ahd_reg_parse_entry_t SSTAT1_parse_table[] = {
				964	{ "REQINIT", 0x01, 0x01 },
				965	{ "STRB2FAST", 0x02, 0x02 },
				966	{ "SCSIPERR", 0x04, 0x04 },
				967	{ "BUSFREE", 0x08, 0x08 },
				968	{ "PHASEMIS", 0x10, 0x10 },
				969	{ "SCSIRSTI", 0x20, 0x20 },
				970	{ "ATNTARG", 0x40, 0x40 },
				971	{ "SELTO", 0x80, 0x80 }
				972	};
				973
				974	int
				975	ahd_sstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				976	{
				977	return (ahd_print_register(SSTAT1_parse_table, 8, "SSTAT1",
				978	0x4c, regvalue, cur_col, wrap));
				979	}
				980
				981	static ahd_reg_parse_entry_t SSTAT2_parse_table[] = {
				982	{ "BUSFREE_LQO", 0x40, 0xc0 },
				983	{ "BUSFREE_DFF0", 0x80, 0xc0 },
				984	{ "BUSFREE_DFF1", 0xc0, 0xc0 },
				985	{ "DMADONE", 0x01, 0x01 },
				986	{ "SDONE", 0x02, 0x02 },
				987	{ "WIDE_RES", 0x04, 0x04 },
				988	{ "BSYX", 0x08, 0x08 },
				989	{ "EXP_ACTIVE", 0x10, 0x10 },
				990	{ "NONPACKREQ", 0x20, 0x20 },
				991	{ "BUSFREETIME", 0xc0, 0xc0 }
				992	};
				993
				994	int
				995	ahd_sstat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				996	{
				997	return (ahd_print_register(SSTAT2_parse_table, 10, "SSTAT2",
				998	0x4d, regvalue, cur_col, wrap));
				999	}
				1000
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1001	static ahd_reg_parse_entry_t SIMODE2_parse_table[] = {
				1002	{ "ENDMADONE", 0x01, 0x01 },
				1003	{ "ENSDONE", 0x02, 0x02 },
				1004	{ "ENWIDE_RES", 0x04, 0x04 }
				1005	};
				1006
				1007	int
				1008	ahd_simode2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1009	{
				1010	return (ahd_print_register(SIMODE2_parse_table, 3, "SIMODE2",
				1011	0x4d, regvalue, cur_col, wrap));
				1012	}
				1013
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1014	static ahd_reg_parse_entry_t CLRSINT2_parse_table[] = {
				1015	{ "CLRDMADONE", 0x01, 0x01 },
				1016	{ "CLRSDONE", 0x02, 0x02 },
				1017	{ "CLRWIDE_RES", 0x04, 0x04 },
				1018	{ "CLRNONPACKREQ", 0x20, 0x20 }
				1019	};
				1020
				1021	int
				1022	ahd_clrsint2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1023	{
				1024	return (ahd_print_register(CLRSINT2_parse_table, 4, "CLRSINT2",
				1025	0x4d, regvalue, cur_col, wrap));
				1026	}
				1027
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1028	static ahd_reg_parse_entry_t PERRDIAG_parse_table[] = {
				1029	{ "DTERR", 0x01, 0x01 },
				1030	{ "DGFORMERR", 0x02, 0x02 },
				1031	{ "CRCERR", 0x04, 0x04 },
				1032	{ "AIPERR", 0x08, 0x08 },
				1033	{ "PARITYERR", 0x10, 0x10 },
				1034	{ "PREVPHASE", 0x20, 0x20 },
				1035	{ "HIPERR", 0x40, 0x40 },
				1036	{ "HIZERO", 0x80, 0x80 }
				1037	};
				1038
				1039	int
				1040	ahd_perrdiag_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1041	{
				1042	return (ahd_print_register(PERRDIAG_parse_table, 8, "PERRDIAG",
				1043	0x4e, regvalue, cur_col, wrap));
				1044	}
				1045
				1046	int
				1047	ahd_lqistate_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1048	{
				1049	return (ahd_print_register(NULL, 0, "LQISTATE",
				1050	0x4e, regvalue, cur_col, wrap));
				1051	}
				1052
				1053	int
				1054	ahd_soffcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1055	{
				1056	return (ahd_print_register(NULL, 0, "SOFFCNT",
				1057	0x4f, regvalue, cur_col, wrap));
				1058	}
				1059
				1060	int
				1061	ahd_lqostate_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1062	{
				1063	return (ahd_print_register(NULL, 0, "LQOSTATE",
				1064	0x4f, regvalue, cur_col, wrap));
				1065	}
				1066
				1067	static ahd_reg_parse_entry_t LQISTAT0_parse_table[] = {
				1068	{ "LQIATNCMD", 0x01, 0x01 },
				1069	{ "LQIATNLQ", 0x02, 0x02 },
				1070	{ "LQIBADLQT", 0x04, 0x04 },
				1071	{ "LQICRCT2", 0x08, 0x08 },
				1072	{ "LQICRCT1", 0x10, 0x10 },
				1073	{ "LQIATNQAS", 0x20, 0x20 }
				1074	};
				1075
				1076	int
				1077	ahd_lqistat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1078	{
				1079	return (ahd_print_register(LQISTAT0_parse_table, 6, "LQISTAT0",
				1080	0x50, regvalue, cur_col, wrap));
				1081	}
				1082
				1083	static ahd_reg_parse_entry_t CLRLQIINT0_parse_table[] = {
				1084	{ "CLRLQIATNCMD", 0x01, 0x01 },
				1085	{ "CLRLQIATNLQ", 0x02, 0x02 },
				1086	{ "CLRLQIBADLQT", 0x04, 0x04 },
				1087	{ "CLRLQICRCT2", 0x08, 0x08 },
				1088	{ "CLRLQICRCT1", 0x10, 0x10 },
				1089	{ "CLRLQIATNQAS", 0x20, 0x20 }
				1090	};
				1091
				1092	int
				1093	ahd_clrlqiint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1094	{
				1095	return (ahd_print_register(CLRLQIINT0_parse_table, 6, "CLRLQIINT0",
				1096	0x50, regvalue, cur_col, wrap));
				1097	}
				1098
				1099	static ahd_reg_parse_entry_t LQIMODE0_parse_table[] = {
				1100	{ "ENLQIATNCMD", 0x01, 0x01 },
				1101	{ "ENLQIATNLQ", 0x02, 0x02 },
				1102	{ "ENLQIBADLQT", 0x04, 0x04 },
				1103	{ "ENLQICRCT2", 0x08, 0x08 },
				1104	{ "ENLQICRCT1", 0x10, 0x10 },
				1105	{ "ENLQIATNQASK", 0x20, 0x20 }
				1106	};
				1107
				1108	int
				1109	ahd_lqimode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1110	{
				1111	return (ahd_print_register(LQIMODE0_parse_table, 6, "LQIMODE0",
				1112	0x50, regvalue, cur_col, wrap));
				1113	}
				1114
				1115	static ahd_reg_parse_entry_t LQIMODE1_parse_table[] = {
				1116	{ "ENLQIOVERI_NLQ", 0x01, 0x01 },
				1117	{ "ENLQIOVERI_LQ", 0x02, 0x02 },
				1118	{ "ENLQIBADLQI", 0x04, 0x04 },
				1119	{ "ENLQICRCI_NLQ", 0x08, 0x08 },
				1120	{ "ENLQICRCI_LQ", 0x10, 0x10 },
				1121	{ "ENLIQABORT", 0x20, 0x20 },
				1122	{ "ENLQIPHASE_NLQ", 0x40, 0x40 },
				1123	{ "ENLQIPHASE_LQ", 0x80, 0x80 }
				1124	};
				1125
				1126	int
				1127	ahd_lqimode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1128	{
				1129	return (ahd_print_register(LQIMODE1_parse_table, 8, "LQIMODE1",
				1130	0x51, regvalue, cur_col, wrap));
				1131	}
				1132
				1133	static ahd_reg_parse_entry_t LQISTAT1_parse_table[] = {
				1134	{ "LQIOVERI_NLQ", 0x01, 0x01 },
				1135	{ "LQIOVERI_LQ", 0x02, 0x02 },
				1136	{ "LQIBADLQI", 0x04, 0x04 },
				1137	{ "LQICRCI_NLQ", 0x08, 0x08 },
				1138	{ "LQICRCI_LQ", 0x10, 0x10 },
				1139	{ "LQIABORT", 0x20, 0x20 },
				1140	{ "LQIPHASE_NLQ", 0x40, 0x40 },
				1141	{ "LQIPHASE_LQ", 0x80, 0x80 }
				1142	};
				1143
				1144	int
				1145	ahd_lqistat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1146	{
				1147	return (ahd_print_register(LQISTAT1_parse_table, 8, "LQISTAT1",
				1148	0x51, regvalue, cur_col, wrap));
				1149	}
				1150
				1151	static ahd_reg_parse_entry_t CLRLQIINT1_parse_table[] = {
				1152	{ "CLRLQIOVERI_NLQ", 0x01, 0x01 },
				1153	{ "CLRLQIOVERI_LQ", 0x02, 0x02 },
				1154	{ "CLRLQIBADLQI", 0x04, 0x04 },
				1155	{ "CLRLQICRCI_NLQ", 0x08, 0x08 },
				1156	{ "CLRLQICRCI_LQ", 0x10, 0x10 },
				1157	{ "CLRLIQABORT", 0x20, 0x20 },
				1158	{ "CLRLQIPHASE_NLQ", 0x40, 0x40 },
				1159	{ "CLRLQIPHASE_LQ", 0x80, 0x80 }
				1160	};
				1161
				1162	int
				1163	ahd_clrlqiint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1164	{
				1165	return (ahd_print_register(CLRLQIINT1_parse_table, 8, "CLRLQIINT1",
				1166	0x51, regvalue, cur_col, wrap));
				1167	}
				1168
				1169	static ahd_reg_parse_entry_t LQISTAT2_parse_table[] = {
				1170	{ "LQIGSAVAIL", 0x01, 0x01 },
				1171	{ "LQISTOPCMD", 0x02, 0x02 },
				1172	{ "LQISTOPLQ", 0x04, 0x04 },
				1173	{ "LQISTOPPKT", 0x08, 0x08 },
				1174	{ "LQIWAITFIFO", 0x10, 0x10 },
				1175	{ "LQIWORKONLQ", 0x20, 0x20 },
				1176	{ "LQIPHASE_OUTPKT", 0x40, 0x40 },
				1177	{ "PACKETIZED", 0x80, 0x80 }
				1178	};
				1179
				1180	int
				1181	ahd_lqistat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1182	{
				1183	return (ahd_print_register(LQISTAT2_parse_table, 8, "LQISTAT2",
				1184	0x52, regvalue, cur_col, wrap));
				1185	}
				1186
				1187	static ahd_reg_parse_entry_t SSTAT3_parse_table[] = {
				1188	{ "OSRAMPERR", 0x01, 0x01 },
				1189	{ "NTRAMPERR", 0x02, 0x02 }
				1190	};
				1191
				1192	int
				1193	ahd_sstat3_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1194	{
				1195	return (ahd_print_register(SSTAT3_parse_table, 2, "SSTAT3",
				1196	0x53, regvalue, cur_col, wrap));
				1197	}
				1198
				1199	static ahd_reg_parse_entry_t SIMODE3_parse_table[] = {
				1200	{ "ENOSRAMPERR", 0x01, 0x01 },
				1201	{ "ENNTRAMPERR", 0x02, 0x02 }
				1202	};
				1203
				1204	int
				1205	ahd_simode3_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1206	{
				1207	return (ahd_print_register(SIMODE3_parse_table, 2, "SIMODE3",
				1208	0x53, regvalue, cur_col, wrap));
				1209	}
				1210
				1211	static ahd_reg_parse_entry_t CLRSINT3_parse_table[] = {
				1212	{ "CLROSRAMPERR", 0x01, 0x01 },
				1213	{ "CLRNTRAMPERR", 0x02, 0x02 }
				1214	};
				1215
				1216	int
				1217	ahd_clrsint3_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1218	{
				1219	return (ahd_print_register(CLRSINT3_parse_table, 2, "CLRSINT3",
				1220	0x53, regvalue, cur_col, wrap));
				1221	}
				1222
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1223	static ahd_reg_parse_entry_t LQOSTAT0_parse_table[] = {
				1224	{ "LQOTCRC", 0x01, 0x01 },
				1225	{ "LQOATNPKT", 0x02, 0x02 },
				1226	{ "LQOATNLQ", 0x04, 0x04 },
				1227	{ "LQOSTOPT2", 0x08, 0x08 },
				1228	{ "LQOTARGSCBPERR", 0x10, 0x10 }
				1229	};
				1230
				1231	int
				1232	ahd_lqostat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1233	{
				1234	return (ahd_print_register(LQOSTAT0_parse_table, 5, "LQOSTAT0",
				1235	0x54, regvalue, cur_col, wrap));
				1236	}
				1237
				1238	static ahd_reg_parse_entry_t CLRLQOINT0_parse_table[] = {
				1239	{ "CLRLQOTCRC", 0x01, 0x01 },
				1240	{ "CLRLQOATNPKT", 0x02, 0x02 },
				1241	{ "CLRLQOATNLQ", 0x04, 0x04 },
				1242	{ "CLRLQOSTOPT2", 0x08, 0x08 },
				1243	{ "CLRLQOTARGSCBPERR", 0x10, 0x10 }
				1244	};
				1245
				1246	int
				1247	ahd_clrlqoint0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1248	{
				1249	return (ahd_print_register(CLRLQOINT0_parse_table, 5, "CLRLQOINT0",
				1250	0x54, regvalue, cur_col, wrap));
				1251	}
				1252
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1253	static ahd_reg_parse_entry_t LQOMODE0_parse_table[] = {
				1254	{ "ENLQOTCRC", 0x01, 0x01 },
				1255	{ "ENLQOATNPKT", 0x02, 0x02 },
				1256	{ "ENLQOATNLQ", 0x04, 0x04 },
				1257	{ "ENLQOSTOPT2", 0x08, 0x08 },
				1258	{ "ENLQOTARGSCBPERR", 0x10, 0x10 }
				1259	};
				1260
				1261	int
				1262	ahd_lqomode0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1263	{
				1264	return (ahd_print_register(LQOMODE0_parse_table, 5, "LQOMODE0",
				1265	0x54, regvalue, cur_col, wrap));
				1266	}
				1267
				1268	static ahd_reg_parse_entry_t LQOMODE1_parse_table[] = {
				1269	{ "ENLQOPHACHGINPKT", 0x01, 0x01 },
				1270	{ "ENLQOBUSFREE", 0x02, 0x02 },
				1271	{ "ENLQOBADQAS", 0x04, 0x04 },
				1272	{ "ENLQOSTOPI2", 0x08, 0x08 },
				1273	{ "ENLQOINITSCBPERR", 0x10, 0x10 }
				1274	};
				1275
				1276	int
				1277	ahd_lqomode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1278	{
				1279	return (ahd_print_register(LQOMODE1_parse_table, 5, "LQOMODE1",
				1280	0x55, regvalue, cur_col, wrap));
				1281	}
				1282
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1283	static ahd_reg_parse_entry_t LQOSTAT1_parse_table[] = {
				1284	{ "LQOPHACHGINPKT", 0x01, 0x01 },
				1285	{ "LQOBUSFREE", 0x02, 0x02 },
				1286	{ "LQOBADQAS", 0x04, 0x04 },
				1287	{ "LQOSTOPI2", 0x08, 0x08 },
				1288	{ "LQOINITSCBPERR", 0x10, 0x10 }
				1289	};
				1290
				1291	int
				1292	ahd_lqostat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1293	{
				1294	return (ahd_print_register(LQOSTAT1_parse_table, 5, "LQOSTAT1",
				1295	0x55, regvalue, cur_col, wrap));
				1296	}
				1297
				1298	static ahd_reg_parse_entry_t CLRLQOINT1_parse_table[] = {
				1299	{ "CLRLQOPHACHGINPKT", 0x01, 0x01 },
				1300	{ "CLRLQOBUSFREE", 0x02, 0x02 },
				1301	{ "CLRLQOBADQAS", 0x04, 0x04 },
				1302	{ "CLRLQOSTOPI2", 0x08, 0x08 },
				1303	{ "CLRLQOINITSCBPERR", 0x10, 0x10 }
				1304	};
				1305
				1306	int
				1307	ahd_clrlqoint1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1308	{
				1309	return (ahd_print_register(CLRLQOINT1_parse_table, 5, "CLRLQOINT1",
				1310	0x55, regvalue, cur_col, wrap));
				1311	}
				1312
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1313	static ahd_reg_parse_entry_t LQOSTAT2_parse_table[] = {
				1314	{ "LQOSTOP0", 0x01, 0x01 },
				1315	{ "LQOPHACHGOUTPKT", 0x02, 0x02 },
				1316	{ "LQOWAITFIFO", 0x10, 0x10 },
				1317	{ "LQOPKT", 0xe0, 0xe0 }
				1318	};
				1319
				1320	int
				1321	ahd_lqostat2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1322	{
				1323	return (ahd_print_register(LQOSTAT2_parse_table, 4, "LQOSTAT2",
				1324	0x56, regvalue, cur_col, wrap));
				1325	}
				1326
				1327	int
				1328	ahd_os_space_cnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1329	{
				1330	return (ahd_print_register(NULL, 0, "OS_SPACE_CNT",
				1331	0x56, regvalue, cur_col, wrap));
				1332	}
				1333
				1334	static ahd_reg_parse_entry_t SIMODE1_parse_table[] = {
				1335	{ "ENREQINIT", 0x01, 0x01 },
				1336	{ "ENSTRB2FAST", 0x02, 0x02 },
				1337	{ "ENSCSIPERR", 0x04, 0x04 },
				1338	{ "ENBUSFREE", 0x08, 0x08 },
				1339	{ "ENPHASEMIS", 0x10, 0x10 },
				1340	{ "ENSCSIRST", 0x20, 0x20 },
				1341	{ "ENATNTARG", 0x40, 0x40 },
				1342	{ "ENSELTIMO", 0x80, 0x80 }
				1343	};
				1344
				1345	int
				1346	ahd_simode1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1347	{
				1348	return (ahd_print_register(SIMODE1_parse_table, 8, "SIMODE1",
				1349	0x57, regvalue, cur_col, wrap));
				1350	}
				1351
				1352	int
				1353	ahd_gsfifo_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1354	{
				1355	return (ahd_print_register(NULL, 0, "GSFIFO",
				1356	0x58, regvalue, cur_col, wrap));
				1357	}
				1358
				1359	static ahd_reg_parse_entry_t DFFSXFRCTL_parse_table[] = {
				1360	{ "RSTCHN", 0x01, 0x01 },
				1361	{ "CLRCHN", 0x02, 0x02 },
				1362	{ "CLRSHCNT", 0x04, 0x04 },
				1363	{ "DFFBITBUCKET", 0x08, 0x08 }
				1364	};
				1365
				1366	int
				1367	ahd_dffsxfrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1368	{
				1369	return (ahd_print_register(DFFSXFRCTL_parse_table, 4, "DFFSXFRCTL",
				1370	0x5a, regvalue, cur_col, wrap));
				1371	}
				1372
				1373	static ahd_reg_parse_entry_t LQOSCSCTL_parse_table[] = {
				1374	{ "LQONOCHKOVER", 0x01, 0x01 },
				1375	{ "LQOH2A_VERSION", 0x80, 0x80 }
				1376	};
				1377
				1378	int
				1379	ahd_lqoscsctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1380	{
				1381	return (ahd_print_register(LQOSCSCTL_parse_table, 2, "LQOSCSCTL",
				1382	0x5a, regvalue, cur_col, wrap));
				1383	}
				1384
				1385	int
				1386	ahd_nextscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1387	{
				1388	return (ahd_print_register(NULL, 0, "NEXTSCB",
				1389	0x5a, regvalue, cur_col, wrap));
				1390	}
				1391
				1392	static ahd_reg_parse_entry_t CLRSEQINTSRC_parse_table[] = {
				1393	{ "CLRCFG4TCMD", 0x01, 0x01 },
				1394	{ "CLRCFG4ICMD", 0x02, 0x02 },
				1395	{ "CLRCFG4TSTAT", 0x04, 0x04 },
				1396	{ "CLRCFG4ISTAT", 0x08, 0x08 },
				1397	{ "CLRCFG4DATA", 0x10, 0x10 },
				1398	{ "CLRSAVEPTRS", 0x20, 0x20 },
				1399	{ "CLRCTXTDONE", 0x40, 0x40 }
				1400	};
				1401
				1402	int
				1403	ahd_clrseqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1404	{
				1405	return (ahd_print_register(CLRSEQINTSRC_parse_table, 7, "CLRSEQINTSRC",
				1406	0x5b, regvalue, cur_col, wrap));
				1407	}
				1408
				1409	static ahd_reg_parse_entry_t SEQINTSRC_parse_table[] = {
				1410	{ "CFG4TCMD", 0x01, 0x01 },
				1411	{ "CFG4ICMD", 0x02, 0x02 },
				1412	{ "CFG4TSTAT", 0x04, 0x04 },
				1413	{ "CFG4ISTAT", 0x08, 0x08 },
				1414	{ "CFG4DATA", 0x10, 0x10 },
				1415	{ "SAVEPTRS", 0x20, 0x20 },
				1416	{ "CTXTDONE", 0x40, 0x40 }
				1417	};
				1418
				1419	int
				1420	ahd_seqintsrc_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1421	{
				1422	return (ahd_print_register(SEQINTSRC_parse_table, 7, "SEQINTSRC",
				1423	0x5b, regvalue, cur_col, wrap));
				1424	}
				1425
				1426	int
				1427	ahd_currscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1428	{
				1429	return (ahd_print_register(NULL, 0, "CURRSCB",
				1430	0x5c, regvalue, cur_col, wrap));
				1431	}
				1432
				1433	static ahd_reg_parse_entry_t SEQIMODE_parse_table[] = {
				1434	{ "ENCFG4TCMD", 0x01, 0x01 },
				1435	{ "ENCFG4ICMD", 0x02, 0x02 },
				1436	{ "ENCFG4TSTAT", 0x04, 0x04 },
				1437	{ "ENCFG4ISTAT", 0x08, 0x08 },
				1438	{ "ENCFG4DATA", 0x10, 0x10 },
				1439	{ "ENSAVEPTRS", 0x20, 0x20 },
				1440	{ "ENCTXTDONE", 0x40, 0x40 }
				1441	};
				1442
				1443	int
				1444	ahd_seqimode_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1445	{
				1446	return (ahd_print_register(SEQIMODE_parse_table, 7, "SEQIMODE",
				1447	0x5c, regvalue, cur_col, wrap));
				1448	}
				1449
				1450	static ahd_reg_parse_entry_t MDFFSTAT_parse_table[] = {
				1451	{ "FIFOFREE", 0x01, 0x01 },
				1452	{ "DATAINFIFO", 0x02, 0x02 },
				1453	{ "DLZERO", 0x04, 0x04 },
				1454	{ "SHVALID", 0x08, 0x08 },
				1455	{ "LASTSDONE", 0x10, 0x10 },
				1456	{ "SHCNTMINUS1", 0x20, 0x20 },
				1457	{ "SHCNTNEGATIVE", 0x40, 0x40 }
				1458	};
				1459
				1460	int
				1461	ahd_mdffstat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1462	{
				1463	return (ahd_print_register(MDFFSTAT_parse_table, 7, "MDFFSTAT",
				1464	0x5d, regvalue, cur_col, wrap));
				1465	}
				1466
				1467	static ahd_reg_parse_entry_t CRCCONTROL_parse_table[] = {
				1468	{ "CRCVALCHKEN", 0x40, 0x40 }
				1469	};
				1470
				1471	int
				1472	ahd_crccontrol_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1473	{
				1474	return (ahd_print_register(CRCCONTROL_parse_table, 1, "CRCCONTROL",
				1475	0x5d, regvalue, cur_col, wrap));
				1476	}
				1477
				1478	int
				1479	ahd_dfftag_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1480	{
				1481	return (ahd_print_register(NULL, 0, "DFFTAG",
				1482	0x5e, regvalue, cur_col, wrap));
				1483	}
				1484
				1485	int
				1486	ahd_lastscb_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1487	{
				1488	return (ahd_print_register(NULL, 0, "LASTSCB",
				1489	0x5e, regvalue, cur_col, wrap));
				1490	}
				1491
				1492	static ahd_reg_parse_entry_t SCSITEST_parse_table[] = {
				1493	{ "SEL_TXPLL_DEBUG", 0x04, 0x04 },
				1494	{ "CNTRTEST", 0x08, 0x08 }
				1495	};
				1496
				1497	int
				1498	ahd_scsitest_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1499	{
				1500	return (ahd_print_register(SCSITEST_parse_table, 2, "SCSITEST",
				1501	0x5e, regvalue, cur_col, wrap));
				1502	}
				1503
				1504	static ahd_reg_parse_entry_t IOPDNCTL_parse_table[] = {
				1505	{ "PDN_DIFFSENSE", 0x01, 0x01 },
				1506	{ "PDN_IDIST", 0x04, 0x04 },
				1507	{ "DISABLE_OE", 0x80, 0x80 }
				1508	};
				1509
				1510	int
				1511	ahd_iopdnctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1512	{
				1513	return (ahd_print_register(IOPDNCTL_parse_table, 3, "IOPDNCTL",
				1514	0x5f, regvalue, cur_col, wrap));
				1515	}
				1516
				1517	int
				1518	ahd_shaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1519	{
				1520	return (ahd_print_register(NULL, 0, "SHADDR",
				1521	0x60, regvalue, cur_col, wrap));
				1522	}
				1523
				1524	int
				1525	ahd_negoaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1526	{
				1527	return (ahd_print_register(NULL, 0, "NEGOADDR",
				1528	0x60, regvalue, cur_col, wrap));
				1529	}
				1530
				1531	int
				1532	ahd_dgrpcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1533	{
				1534	return (ahd_print_register(NULL, 0, "DGRPCRCI",
				1535	0x60, regvalue, cur_col, wrap));
				1536	}
				1537
				1538	int
				1539	ahd_negperiod_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1540	{
				1541	return (ahd_print_register(NULL, 0, "NEGPERIOD",
				1542	0x61, regvalue, cur_col, wrap));
				1543	}
				1544
				1545	int
				1546	ahd_packcrci_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1547	{
				1548	return (ahd_print_register(NULL, 0, "PACKCRCI",
				1549	0x62, regvalue, cur_col, wrap));
				1550	}
				1551
				1552	int
				1553	ahd_negoffset_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1554	{
				1555	return (ahd_print_register(NULL, 0, "NEGOFFSET",
				1556	0x62, regvalue, cur_col, wrap));
				1557	}
				1558
				1559	static ahd_reg_parse_entry_t NEGPPROPTS_parse_table[] = {
				1560	{ "PPROPT_IUT", 0x01, 0x01 },
				1561	{ "PPROPT_DT", 0x02, 0x02 },
				1562	{ "PPROPT_QAS", 0x04, 0x04 },
				1563	{ "PPROPT_PACE", 0x08, 0x08 }
				1564	};
				1565
				1566	int
				1567	ahd_negppropts_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1568	{
				1569	return (ahd_print_register(NEGPPROPTS_parse_table, 4, "NEGPPROPTS",
				1570	0x63, regvalue, cur_col, wrap));
				1571	}
				1572
				1573	static ahd_reg_parse_entry_t NEGCONOPTS_parse_table[] = {
				1574	{ "WIDEXFER", 0x01, 0x01 },
				1575	{ "ENAUTOATNO", 0x02, 0x02 },
				1576	{ "ENAUTOATNI", 0x04, 0x04 },
				1577	{ "ENSLOWCRC", 0x08, 0x08 },
				1578	{ "RTI_OVRDTRN", 0x10, 0x10 },
				1579	{ "RTI_WRTDIS", 0x20, 0x20 },
				1580	{ "ENSNAPSHOT", 0x40, 0x40 }
				1581	};
				1582
				1583	int
				1584	ahd_negconopts_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1585	{
				1586	return (ahd_print_register(NEGCONOPTS_parse_table, 7, "NEGCONOPTS",
				1587	0x64, regvalue, cur_col, wrap));
				1588	}
				1589
				1590	int
				1591	ahd_annexcol_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1592	{
				1593	return (ahd_print_register(NULL, 0, "ANNEXCOL",
				1594	0x65, regvalue, cur_col, wrap));
				1595	}
				1596
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1597	int
				1598	ahd_annexdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1599	{
				1600	return (ahd_print_register(NULL, 0, "ANNEXDAT",
				1601	0x66, regvalue, cur_col, wrap));
				1602	}
				1603
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1604	static ahd_reg_parse_entry_t SCSCHKN_parse_table[] = {
				1605	{ "LSTSGCLRDIS", 0x01, 0x01 },
				1606	{ "SHVALIDSTDIS", 0x02, 0x02 },
				1607	{ "DFFACTCLR", 0x04, 0x04 },
				1608	{ "SDONEMSKDIS", 0x08, 0x08 },
				1609	{ "WIDERESEN", 0x10, 0x10 },
				1610	{ "CURRFIFODEF", 0x20, 0x20 },
				1611	{ "STSELSKIDDIS", 0x40, 0x40 }
				1612	};
				1613
				1614	int
				1615	ahd_scschkn_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1616	{
				1617	return (ahd_print_register(SCSCHKN_parse_table, 7, "SCSCHKN",
				1618	0x66, regvalue, cur_col, wrap));
				1619	}
				1620
				1621	int
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1622	ahd_iownid_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1623	{
				1624	return (ahd_print_register(NULL, 0, "IOWNID",
				1625	0x67, regvalue, cur_col, wrap));
				1626	}
				1627
				1628	static ahd_reg_parse_entry_t PLL960CTL0_parse_table[] = {
				1629	{ "PLL_ENFBM", 0x01, 0x01 },
				1630	{ "PLL_DLPF", 0x02, 0x02 },
				1631	{ "PLL_ENLPF", 0x04, 0x04 },
				1632	{ "PLL_ENLUD", 0x08, 0x08 },
				1633	{ "PLL_NS", 0x30, 0x30 },
				1634	{ "PLL_PWDN", 0x40, 0x40 },
				1635	{ "PLL_VCOSEL", 0x80, 0x80 }
				1636	};
				1637
				1638	int
				1639	ahd_pll960ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1640	{
				1641	return (ahd_print_register(PLL960CTL0_parse_table, 7, "PLL960CTL0",
				1642	0x68, regvalue, cur_col, wrap));
				1643	}
				1644
				1645	int
				1646	ahd_shcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1647	{
				1648	return (ahd_print_register(NULL, 0, "SHCNT",
				1649	0x68, regvalue, cur_col, wrap));
				1650	}
				1651
				1652	int
				1653	ahd_townid_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1654	{
				1655	return (ahd_print_register(NULL, 0, "TOWNID",
				1656	0x69, regvalue, cur_col, wrap));
				1657	}
				1658
				1659	static ahd_reg_parse_entry_t PLL960CTL1_parse_table[] = {
				1660	{ "PLL_RST", 0x01, 0x01 },
				1661	{ "PLL_CNTCLR", 0x40, 0x40 },
				1662	{ "PLL_CNTEN", 0x80, 0x80 }
				1663	};
				1664
				1665	int
				1666	ahd_pll960ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1667	{
				1668	return (ahd_print_register(PLL960CTL1_parse_table, 3, "PLL960CTL1",
				1669	0x69, regvalue, cur_col, wrap));
				1670	}
				1671
				1672	int
				1673	ahd_pll960cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1674	{
				1675	return (ahd_print_register(NULL, 0, "PLL960CNT0",
				1676	0x6a, regvalue, cur_col, wrap));
				1677	}
				1678
				1679	int
				1680	ahd_xsig_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1681	{
				1682	return (ahd_print_register(NULL, 0, "XSIG",
				1683	0x6a, regvalue, cur_col, wrap));
				1684	}
				1685
				1686	int
				1687	ahd_seloid_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1688	{
				1689	return (ahd_print_register(NULL, 0, "SELOID",
				1690	0x6b, regvalue, cur_col, wrap));
				1691	}
				1692
				1693	static ahd_reg_parse_entry_t PLL400CTL0_parse_table[] = {
				1694	{ "PLL_ENFBM", 0x01, 0x01 },
				1695	{ "PLL_DLPF", 0x02, 0x02 },
				1696	{ "PLL_ENLPF", 0x04, 0x04 },
				1697	{ "PLL_ENLUD", 0x08, 0x08 },
				1698	{ "PLL_NS", 0x30, 0x30 },
				1699	{ "PLL_PWDN", 0x40, 0x40 },
				1700	{ "PLL_VCOSEL", 0x80, 0x80 }
				1701	};
				1702
				1703	int
				1704	ahd_pll400ctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1705	{
				1706	return (ahd_print_register(PLL400CTL0_parse_table, 7, "PLL400CTL0",
				1707	0x6c, regvalue, cur_col, wrap));
				1708	}
				1709
				1710	int
				1711	ahd_fairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1712	{
				1713	return (ahd_print_register(NULL, 0, "FAIRNESS",
				1714	0x6c, regvalue, cur_col, wrap));
				1715	}
				1716
				1717	static ahd_reg_parse_entry_t PLL400CTL1_parse_table[] = {
				1718	{ "PLL_RST", 0x01, 0x01 },
				1719	{ "PLL_CNTCLR", 0x40, 0x40 },
				1720	{ "PLL_CNTEN", 0x80, 0x80 }
				1721	};
				1722
				1723	int
				1724	ahd_pll400ctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1725	{
				1726	return (ahd_print_register(PLL400CTL1_parse_table, 3, "PLL400CTL1",
				1727	0x6d, regvalue, cur_col, wrap));
				1728	}
				1729
				1730	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1731	ahd_unfairness_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1732	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1733	return (ahd_print_register(NULL, 0, "UNFAIRNESS",
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1734	0x6e, regvalue, cur_col, wrap));
				1735	}
				1736
				1737	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1738	ahd_pll400cnt0_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1739	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1740	return (ahd_print_register(NULL, 0, "PLL400CNT0",
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1741	0x6e, regvalue, cur_col, wrap));
				1742	}
				1743
				1744	int
				1745	ahd_haddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1746	{
				1747	return (ahd_print_register(NULL, 0, "HADDR",
				1748	0x70, regvalue, cur_col, wrap));
				1749	}
				1750
				1751	static ahd_reg_parse_entry_t PLLDELAY_parse_table[] = {
				1752	{ "SPLIT_DROP_REQ", 0x80, 0x80 }
				1753	};
				1754
				1755	int
				1756	ahd_plldelay_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1757	{
				1758	return (ahd_print_register(PLLDELAY_parse_table, 1, "PLLDELAY",
				1759	0x70, regvalue, cur_col, wrap));
				1760	}
				1761
				1762	int
				1763	ahd_hodmaadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1764	{
				1765	return (ahd_print_register(NULL, 0, "HODMAADR",
				1766	0x70, regvalue, cur_col, wrap));
				1767	}
				1768
				1769	int
				1770	ahd_hodmacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1771	{
				1772	return (ahd_print_register(NULL, 0, "HODMACNT",
				1773	0x78, regvalue, cur_col, wrap));
				1774	}
				1775
				1776	int
				1777	ahd_hcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1778	{
				1779	return (ahd_print_register(NULL, 0, "HCNT",
				1780	0x78, regvalue, cur_col, wrap));
				1781	}
				1782
				1783	int
				1784	ahd_hodmaen_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1785	{
				1786	return (ahd_print_register(NULL, 0, "HODMAEN",
				1787	0x7a, regvalue, cur_col, wrap));
				1788	}
				1789
				1790	int
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1791	ahd_scbhaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1792	{
				1793	return (ahd_print_register(NULL, 0, "SCBHADDR",
				1794	0x7c, regvalue, cur_col, wrap));
				1795	}
				1796
				1797	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1798	ahd_sghaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1799	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1800	return (ahd_print_register(NULL, 0, "SGHADDR",
				1801	0x7c, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1802	}
				1803
				1804	int
				1805	ahd_scbhcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1806	{
				1807	return (ahd_print_register(NULL, 0, "SCBHCNT",
				1808	0x84, regvalue, cur_col, wrap));
				1809	}
				1810
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1811	int
				1812	ahd_sghcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1813	{
				1814	return (ahd_print_register(NULL, 0, "SGHCNT",
				1815	0x84, regvalue, cur_col, wrap));
				1816	}
				1817
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1818	static ahd_reg_parse_entry_t DFF_THRSH_parse_table[] = {
				1819	{ "WR_DFTHRSH_MIN", 0x00, 0x70 },
				1820	{ "RD_DFTHRSH_MIN", 0x00, 0x07 },
				1821	{ "RD_DFTHRSH_25", 0x01, 0x07 },
				1822	{ "RD_DFTHRSH_50", 0x02, 0x07 },
				1823	{ "RD_DFTHRSH_63", 0x03, 0x07 },
				1824	{ "RD_DFTHRSH_75", 0x04, 0x07 },
				1825	{ "RD_DFTHRSH_85", 0x05, 0x07 },
				1826	{ "RD_DFTHRSH_90", 0x06, 0x07 },
				1827	{ "RD_DFTHRSH_MAX", 0x07, 0x07 },
				1828	{ "WR_DFTHRSH_25", 0x10, 0x70 },
				1829	{ "WR_DFTHRSH_50", 0x20, 0x70 },
				1830	{ "WR_DFTHRSH_63", 0x30, 0x70 },
				1831	{ "WR_DFTHRSH_75", 0x40, 0x70 },
				1832	{ "WR_DFTHRSH_85", 0x50, 0x70 },
				1833	{ "WR_DFTHRSH_90", 0x60, 0x70 },
				1834	{ "WR_DFTHRSH_MAX", 0x70, 0x70 },
				1835	{ "RD_DFTHRSH", 0x07, 0x07 },
				1836	{ "WR_DFTHRSH", 0x70, 0x70 }
				1837	};
				1838
				1839	int
				1840	ahd_dff_thrsh_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1841	{
				1842	return (ahd_print_register(DFF_THRSH_parse_table, 18, "DFF_THRSH",
				1843	0x88, regvalue, cur_col, wrap));
				1844	}
				1845
				1846	int
				1847	ahd_romaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1848	{
				1849	return (ahd_print_register(NULL, 0, "ROMADDR",
				1850	0x8a, regvalue, cur_col, wrap));
				1851	}
				1852
				1853	static ahd_reg_parse_entry_t ROMCNTRL_parse_table[] = {
				1854	{ "RDY", 0x01, 0x01 },
				1855	{ "REPEAT", 0x02, 0x02 },
				1856	{ "ROMSPD", 0x18, 0x18 },
				1857	{ "ROMOP", 0xe0, 0xe0 }
				1858	};
				1859
				1860	int
				1861	ahd_romcntrl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1862	{
				1863	return (ahd_print_register(ROMCNTRL_parse_table, 4, "ROMCNTRL",
				1864	0x8d, regvalue, cur_col, wrap));
				1865	}
				1866
				1867	int
				1868	ahd_romdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1869	{
				1870	return (ahd_print_register(NULL, 0, "ROMDATA",
				1871	0x8e, regvalue, cur_col, wrap));
				1872	}
				1873
				1874	static ahd_reg_parse_entry_t CMCRXMSG0_parse_table[] = {
				1875	{ "CFNUM", 0x07, 0x07 },
				1876	{ "CDNUM", 0xf8, 0xf8 }
				1877	};
				1878
				1879	int
				1880	ahd_cmcrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1881	{
				1882	return (ahd_print_register(CMCRXMSG0_parse_table, 2, "CMCRXMSG0",
				1883	0x90, regvalue, cur_col, wrap));
				1884	}
				1885
				1886	static ahd_reg_parse_entry_t ROENABLE_parse_table[] = {
				1887	{ "DCH0ROEN", 0x01, 0x01 },
				1888	{ "DCH1ROEN", 0x02, 0x02 },
				1889	{ "SGROEN", 0x04, 0x04 },
				1890	{ "CMCROEN", 0x08, 0x08 },
				1891	{ "OVLYROEN", 0x10, 0x10 },
				1892	{ "MSIROEN", 0x20, 0x20 }
				1893	};
				1894
				1895	int
				1896	ahd_roenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1897	{
				1898	return (ahd_print_register(ROENABLE_parse_table, 6, "ROENABLE",
				1899	0x90, regvalue, cur_col, wrap));
				1900	}
				1901
				1902	static ahd_reg_parse_entry_t OVLYRXMSG0_parse_table[] = {
				1903	{ "CFNUM", 0x07, 0x07 },
				1904	{ "CDNUM", 0xf8, 0xf8 }
				1905	};
				1906
				1907	int
				1908	ahd_ovlyrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1909	{
				1910	return (ahd_print_register(OVLYRXMSG0_parse_table, 2, "OVLYRXMSG0",
				1911	0x90, regvalue, cur_col, wrap));
				1912	}
				1913
				1914	static ahd_reg_parse_entry_t DCHRXMSG0_parse_table[] = {
				1915	{ "CFNUM", 0x07, 0x07 },
				1916	{ "CDNUM", 0xf8, 0xf8 }
				1917	};
				1918
				1919	int
				1920	ahd_dchrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1921	{
				1922	return (ahd_print_register(DCHRXMSG0_parse_table, 2, "DCHRXMSG0",
				1923	0x90, regvalue, cur_col, wrap));
				1924	}
				1925
				1926	static ahd_reg_parse_entry_t OVLYRXMSG1_parse_table[] = {
				1927	{ "CBNUM", 0xff, 0xff }
				1928	};
				1929
				1930	int
				1931	ahd_ovlyrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1932	{
				1933	return (ahd_print_register(OVLYRXMSG1_parse_table, 1, "OVLYRXMSG1",
				1934	0x91, regvalue, cur_col, wrap));
				1935	}
				1936
				1937	static ahd_reg_parse_entry_t NSENABLE_parse_table[] = {
				1938	{ "DCH0NSEN", 0x01, 0x01 },
				1939	{ "DCH1NSEN", 0x02, 0x02 },
				1940	{ "SGNSEN", 0x04, 0x04 },
				1941	{ "CMCNSEN", 0x08, 0x08 },
				1942	{ "OVLYNSEN", 0x10, 0x10 },
				1943	{ "MSINSEN", 0x20, 0x20 }
				1944	};
				1945
				1946	int
				1947	ahd_nsenable_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1948	{
				1949	return (ahd_print_register(NSENABLE_parse_table, 6, "NSENABLE",
				1950	0x91, regvalue, cur_col, wrap));
				1951	}
				1952
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1953	static ahd_reg_parse_entry_t CMCRXMSG1_parse_table[] = {
				1954	{ "CBNUM", 0xff, 0xff }
				1955	};
				1956
				1957	int
				1958	ahd_cmcrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1959	{
				1960	return (ahd_print_register(CMCRXMSG1_parse_table, 1, "CMCRXMSG1",
				1961	0x91, regvalue, cur_col, wrap));
				1962	}
				1963
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	1964	static ahd_reg_parse_entry_t DCHRXMSG1_parse_table[] = {
				1965	{ "CBNUM", 0xff, 0xff }
				1966	};
				1967
				1968	int
				1969	ahd_dchrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1970	{
				1971	return (ahd_print_register(DCHRXMSG1_parse_table, 1, "DCHRXMSG1",
				1972	0x91, regvalue, cur_col, wrap));
				1973	}
				1974
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1975	static ahd_reg_parse_entry_t DCHRXMSG2_parse_table[] = {
				1976	{ "MINDEX", 0xff, 0xff }
				1977	};
				1978
				1979	int
				1980	ahd_dchrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1981	{
				1982	return (ahd_print_register(DCHRXMSG2_parse_table, 1, "DCHRXMSG2",
				1983	0x92, regvalue, cur_col, wrap));
				1984	}
				1985
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	1986	static ahd_reg_parse_entry_t CMCRXMSG2_parse_table[] = {
				1987	{ "MINDEX", 0xff, 0xff }
				1988	};
				1989
				1990	int
				1991	ahd_cmcrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1992	{
				1993	return (ahd_print_register(CMCRXMSG2_parse_table, 1, "CMCRXMSG2",
				1994	0x92, regvalue, cur_col, wrap));
				1995	}
				1996
				1997	int
				1998	ahd_ost_print(u_int regvalue, u_int *cur_col, u_int wrap)
				1999	{
				2000	return (ahd_print_register(NULL, 0, "OST",
				2001	0x92, regvalue, cur_col, wrap));
				2002	}
				2003
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2004	static ahd_reg_parse_entry_t OVLYRXMSG2_parse_table[] = {
				2005	{ "MINDEX", 0xff, 0xff }
				2006	};
				2007
				2008	int
				2009	ahd_ovlyrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2010	{
				2011	return (ahd_print_register(OVLYRXMSG2_parse_table, 1, "OVLYRXMSG2",
				2012	0x92, regvalue, cur_col, wrap));
				2013	}
				2014
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2015	static ahd_reg_parse_entry_t DCHRXMSG3_parse_table[] = {
				2016	{ "MCLASS", 0x0f, 0x0f }
				2017	};
				2018
				2019	int
				2020	ahd_dchrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2021	{
				2022	return (ahd_print_register(DCHRXMSG3_parse_table, 1, "DCHRXMSG3",
				2023	0x93, regvalue, cur_col, wrap));
				2024	}
				2025
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2026	static ahd_reg_parse_entry_t OVLYRXMSG3_parse_table[] = {
				2027	{ "MCLASS", 0x0f, 0x0f }
				2028	};
				2029
				2030	int
				2031	ahd_ovlyrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2032	{
				2033	return (ahd_print_register(OVLYRXMSG3_parse_table, 1, "OVLYRXMSG3",
				2034	0x93, regvalue, cur_col, wrap));
				2035	}
				2036
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2037	static ahd_reg_parse_entry_t CMCRXMSG3_parse_table[] = {
				2038	{ "MCLASS", 0x0f, 0x0f }
				2039	};
				2040
				2041	int
				2042	ahd_cmcrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2043	{
				2044	return (ahd_print_register(CMCRXMSG3_parse_table, 1, "CMCRXMSG3",
				2045	0x93, regvalue, cur_col, wrap));
				2046	}
				2047
				2048	static ahd_reg_parse_entry_t PCIXCTL_parse_table[] = {
				2049	{ "CMPABCDIS", 0x01, 0x01 },
				2050	{ "TSCSERREN", 0x02, 0x02 },
				2051	{ "SRSPDPEEN", 0x04, 0x04 },
				2052	{ "SPLTSTADIS", 0x08, 0x08 },
				2053	{ "SPLTSMADIS", 0x10, 0x10 },
				2054	{ "UNEXPSCIEN", 0x20, 0x20 },
				2055	{ "SERRPULSE", 0x80, 0x80 }
				2056	};
				2057
				2058	int
				2059	ahd_pcixctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2060	{
				2061	return (ahd_print_register(PCIXCTL_parse_table, 7, "PCIXCTL",
				2062	0x93, regvalue, cur_col, wrap));
				2063	}
				2064
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2065	int
				2066	ahd_ovlyseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2067	{
				2068	return (ahd_print_register(NULL, 0, "OVLYSEQBCNT",
				2069	0x94, regvalue, cur_col, wrap));
				2070	}
				2071
				2072	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2073	ahd_dchseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2074	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2075	return (ahd_print_register(NULL, 0, "DCHSEQBCNT",
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2076	0x94, regvalue, cur_col, wrap));
				2077	}
				2078
				2079	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2080	ahd_cmcseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2081	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2082	return (ahd_print_register(NULL, 0, "CMCSEQBCNT",
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2083	0x94, regvalue, cur_col, wrap));
				2084	}
				2085
				2086	static ahd_reg_parse_entry_t CMCSPLTSTAT0_parse_table[] = {
				2087	{ "RXSPLTRSP", 0x01, 0x01 },
				2088	{ "RXSCEMSG", 0x02, 0x02 },
				2089	{ "RXOVRUN", 0x04, 0x04 },
				2090	{ "CNTNOTCMPLT", 0x08, 0x08 },
				2091	{ "SCDATBUCKET", 0x10, 0x10 },
				2092	{ "SCADERR", 0x20, 0x20 },
				2093	{ "SCBCERR", 0x40, 0x40 },
				2094	{ "STAETERM", 0x80, 0x80 }
				2095	};
				2096
				2097	int
				2098	ahd_cmcspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2099	{
				2100	return (ahd_print_register(CMCSPLTSTAT0_parse_table, 8, "CMCSPLTSTAT0",
				2101	0x96, regvalue, cur_col, wrap));
				2102	}
				2103
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2104	static ahd_reg_parse_entry_t DCHSPLTSTAT0_parse_table[] = {
				2105	{ "RXSPLTRSP", 0x01, 0x01 },
				2106	{ "RXSCEMSG", 0x02, 0x02 },
				2107	{ "RXOVRUN", 0x04, 0x04 },
				2108	{ "CNTNOTCMPLT", 0x08, 0x08 },
				2109	{ "SCDATBUCKET", 0x10, 0x10 },
				2110	{ "SCADERR", 0x20, 0x20 },
				2111	{ "SCBCERR", 0x40, 0x40 },
				2112	{ "STAETERM", 0x80, 0x80 }
				2113	};
				2114
				2115	int
				2116	ahd_dchspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2117	{
				2118	return (ahd_print_register(DCHSPLTSTAT0_parse_table, 8, "DCHSPLTSTAT0",
				2119	0x96, regvalue, cur_col, wrap));
				2120	}
				2121
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2122	static ahd_reg_parse_entry_t OVLYSPLTSTAT0_parse_table[] = {
				2123	{ "RXSPLTRSP", 0x01, 0x01 },
				2124	{ "RXSCEMSG", 0x02, 0x02 },
				2125	{ "RXOVRUN", 0x04, 0x04 },
				2126	{ "CNTNOTCMPLT", 0x08, 0x08 },
				2127	{ "SCDATBUCKET", 0x10, 0x10 },
				2128	{ "SCADERR", 0x20, 0x20 },
				2129	{ "SCBCERR", 0x40, 0x40 },
				2130	{ "STAETERM", 0x80, 0x80 }
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2131	};
				2132
				2133	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2134	ahd_ovlyspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2135	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2136	return (ahd_print_register(OVLYSPLTSTAT0_parse_table, 8, "OVLYSPLTSTAT0",
				2137	0x96, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2138	}
				2139
				2140	static ahd_reg_parse_entry_t CMCSPLTSTAT1_parse_table[] = {
				2141	{ "RXDATABUCKET", 0x01, 0x01 }
				2142	};
				2143
				2144	int
				2145	ahd_cmcspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2146	{
				2147	return (ahd_print_register(CMCSPLTSTAT1_parse_table, 1, "CMCSPLTSTAT1",
				2148	0x97, regvalue, cur_col, wrap));
				2149	}
				2150
				2151	static ahd_reg_parse_entry_t OVLYSPLTSTAT1_parse_table[] = {
				2152	{ "RXDATABUCKET", 0x01, 0x01 }
				2153	};
				2154
				2155	int
				2156	ahd_ovlyspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2157	{
				2158	return (ahd_print_register(OVLYSPLTSTAT1_parse_table, 1, "OVLYSPLTSTAT1",
				2159	0x97, regvalue, cur_col, wrap));
				2160	}
				2161
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2162	static ahd_reg_parse_entry_t DCHSPLTSTAT1_parse_table[] = {
				2163	{ "RXDATABUCKET", 0x01, 0x01 }
				2164	};
				2165
				2166	int
				2167	ahd_dchspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2168	{
				2169	return (ahd_print_register(DCHSPLTSTAT1_parse_table, 1, "DCHSPLTSTAT1",
				2170	0x97, regvalue, cur_col, wrap));
				2171	}
				2172
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2173	static ahd_reg_parse_entry_t SGRXMSG0_parse_table[] = {
				2174	{ "CFNUM", 0x07, 0x07 },
				2175	{ "CDNUM", 0xf8, 0xf8 }
				2176	};
				2177
				2178	int
				2179	ahd_sgrxmsg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2180	{
				2181	return (ahd_print_register(SGRXMSG0_parse_table, 2, "SGRXMSG0",
				2182	0x98, regvalue, cur_col, wrap));
				2183	}
				2184
				2185	static ahd_reg_parse_entry_t SLVSPLTOUTADR0_parse_table[] = {
				2186	{ "LOWER_ADDR", 0x7f, 0x7f }
				2187	};
				2188
				2189	int
				2190	ahd_slvspltoutadr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2191	{
				2192	return (ahd_print_register(SLVSPLTOUTADR0_parse_table, 1, "SLVSPLTOUTADR0",
				2193	0x98, regvalue, cur_col, wrap));
				2194	}
				2195
				2196	static ahd_reg_parse_entry_t SGRXMSG1_parse_table[] = {
				2197	{ "CBNUM", 0xff, 0xff }
				2198	};
				2199
				2200	int
				2201	ahd_sgrxmsg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2202	{
				2203	return (ahd_print_register(SGRXMSG1_parse_table, 1, "SGRXMSG1",
				2204	0x99, regvalue, cur_col, wrap));
				2205	}
				2206
				2207	static ahd_reg_parse_entry_t SLVSPLTOUTADR1_parse_table[] = {
				2208	{ "REQ_FNUM", 0x07, 0x07 },
				2209	{ "REQ_DNUM", 0xf8, 0xf8 }
				2210	};
				2211
				2212	int
				2213	ahd_slvspltoutadr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2214	{
				2215	return (ahd_print_register(SLVSPLTOUTADR1_parse_table, 2, "SLVSPLTOUTADR1",
				2216	0x99, regvalue, cur_col, wrap));
				2217	}
				2218
				2219	static ahd_reg_parse_entry_t SGRXMSG2_parse_table[] = {
				2220	{ "MINDEX", 0xff, 0xff }
				2221	};
				2222
				2223	int
				2224	ahd_sgrxmsg2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2225	{
				2226	return (ahd_print_register(SGRXMSG2_parse_table, 1, "SGRXMSG2",
				2227	0x9a, regvalue, cur_col, wrap));
				2228	}
				2229
				2230	static ahd_reg_parse_entry_t SLVSPLTOUTADR2_parse_table[] = {
				2231	{ "REQ_BNUM", 0xff, 0xff }
				2232	};
				2233
				2234	int
				2235	ahd_slvspltoutadr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2236	{
				2237	return (ahd_print_register(SLVSPLTOUTADR2_parse_table, 1, "SLVSPLTOUTADR2",
				2238	0x9a, regvalue, cur_col, wrap));
				2239	}
				2240
				2241	static ahd_reg_parse_entry_t SGRXMSG3_parse_table[] = {
				2242	{ "MCLASS", 0x0f, 0x0f }
				2243	};
				2244
				2245	int
				2246	ahd_sgrxmsg3_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2247	{
				2248	return (ahd_print_register(SGRXMSG3_parse_table, 1, "SGRXMSG3",
				2249	0x9b, regvalue, cur_col, wrap));
				2250	}
				2251
				2252	static ahd_reg_parse_entry_t SLVSPLTOUTADR3_parse_table[] = {
				2253	{ "RLXORD", 0x10, 0x10 },
				2254	{ "TAG_NUM", 0x1f, 0x1f }
				2255	};
				2256
				2257	int
				2258	ahd_slvspltoutadr3_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2259	{
				2260	return (ahd_print_register(SLVSPLTOUTADR3_parse_table, 2, "SLVSPLTOUTADR3",
				2261	0x9b, regvalue, cur_col, wrap));
				2262	}
				2263
				2264	int
				2265	ahd_sgseqbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2266	{
				2267	return (ahd_print_register(NULL, 0, "SGSEQBCNT",
				2268	0x9c, regvalue, cur_col, wrap));
				2269	}
				2270
				2271	static ahd_reg_parse_entry_t SLVSPLTOUTATTR0_parse_table[] = {
				2272	{ "LOWER_BCNT", 0xff, 0xff }
				2273	};
				2274
				2275	int
				2276	ahd_slvspltoutattr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2277	{
				2278	return (ahd_print_register(SLVSPLTOUTATTR0_parse_table, 1, "SLVSPLTOUTATTR0",
				2279	0x9c, regvalue, cur_col, wrap));
				2280	}
				2281
				2282	static ahd_reg_parse_entry_t SLVSPLTOUTATTR1_parse_table[] = {
				2283	{ "CMPLT_FNUM", 0x07, 0x07 },
				2284	{ "CMPLT_DNUM", 0xf8, 0xf8 }
				2285	};
				2286
				2287	int
				2288	ahd_slvspltoutattr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2289	{
				2290	return (ahd_print_register(SLVSPLTOUTATTR1_parse_table, 2, "SLVSPLTOUTATTR1",
				2291	0x9d, regvalue, cur_col, wrap));
				2292	}
				2293
				2294	static ahd_reg_parse_entry_t SLVSPLTOUTATTR2_parse_table[] = {
				2295	{ "CMPLT_BNUM", 0xff, 0xff }
				2296	};
				2297
				2298	int
				2299	ahd_slvspltoutattr2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2300	{
				2301	return (ahd_print_register(SLVSPLTOUTATTR2_parse_table, 1, "SLVSPLTOUTATTR2",
				2302	0x9e, regvalue, cur_col, wrap));
				2303	}
				2304
				2305	static ahd_reg_parse_entry_t SGSPLTSTAT0_parse_table[] = {
				2306	{ "RXSPLTRSP", 0x01, 0x01 },
				2307	{ "RXSCEMSG", 0x02, 0x02 },
				2308	{ "RXOVRUN", 0x04, 0x04 },
				2309	{ "CNTNOTCMPLT", 0x08, 0x08 },
				2310	{ "SCDATBUCKET", 0x10, 0x10 },
				2311	{ "SCADERR", 0x20, 0x20 },
				2312	{ "SCBCERR", 0x40, 0x40 },
				2313	{ "STAETERM", 0x80, 0x80 }
				2314	};
				2315
				2316	int
				2317	ahd_sgspltstat0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2318	{
				2319	return (ahd_print_register(SGSPLTSTAT0_parse_table, 8, "SGSPLTSTAT0",
				2320	0x9e, regvalue, cur_col, wrap));
				2321	}
				2322
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2323	static ahd_reg_parse_entry_t SGSPLTSTAT1_parse_table[] = {
				2324	{ "RXDATABUCKET", 0x01, 0x01 }
				2325	};
				2326
				2327	int
				2328	ahd_sgspltstat1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2329	{
				2330	return (ahd_print_register(SGSPLTSTAT1_parse_table, 1, "SGSPLTSTAT1",
				2331	0x9f, regvalue, cur_col, wrap));
				2332	}
				2333
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2334	static ahd_reg_parse_entry_t SFUNCT_parse_table[] = {
				2335	{ "TEST_NUM", 0x0f, 0x0f },
				2336	{ "TEST_GROUP", 0xf0, 0xf0 }
				2337	};
				2338
				2339	int
				2340	ahd_sfunct_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2341	{
				2342	return (ahd_print_register(SFUNCT_parse_table, 2, "SFUNCT",
				2343	0x9f, regvalue, cur_col, wrap));
				2344	}
				2345
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2346	static ahd_reg_parse_entry_t DF0PCISTAT_parse_table[] = {
				2347	{ "DPR", 0x01, 0x01 },
				2348	{ "TWATERR", 0x02, 0x02 },
				2349	{ "RDPERR", 0x04, 0x04 },
				2350	{ "SCAAPERR", 0x08, 0x08 },
				2351	{ "RTA", 0x10, 0x10 },
				2352	{ "RMA", 0x20, 0x20 },
				2353	{ "SSE", 0x40, 0x40 },
				2354	{ "DPE", 0x80, 0x80 }
				2355	};
				2356
				2357	int
				2358	ahd_df0pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2359	{
				2360	return (ahd_print_register(DF0PCISTAT_parse_table, 8, "DF0PCISTAT",
				2361	0xa0, regvalue, cur_col, wrap));
				2362	}
				2363
				2364	int
				2365	ahd_reg0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2366	{
				2367	return (ahd_print_register(NULL, 0, "REG0",
				2368	0xa0, regvalue, cur_col, wrap));
				2369	}
				2370
				2371	static ahd_reg_parse_entry_t DF1PCISTAT_parse_table[] = {
				2372	{ "DPR", 0x01, 0x01 },
				2373	{ "TWATERR", 0x02, 0x02 },
				2374	{ "RDPERR", 0x04, 0x04 },
				2375	{ "SCAAPERR", 0x08, 0x08 },
				2376	{ "RTA", 0x10, 0x10 },
				2377	{ "RMA", 0x20, 0x20 },
				2378	{ "SSE", 0x40, 0x40 },
				2379	{ "DPE", 0x80, 0x80 }
				2380	};
				2381
				2382	int
				2383	ahd_df1pcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2384	{
				2385	return (ahd_print_register(DF1PCISTAT_parse_table, 8, "DF1PCISTAT",
				2386	0xa1, regvalue, cur_col, wrap));
				2387	}
				2388
				2389	static ahd_reg_parse_entry_t SGPCISTAT_parse_table[] = {
				2390	{ "DPR", 0x01, 0x01 },
				2391	{ "RDPERR", 0x04, 0x04 },
				2392	{ "SCAAPERR", 0x08, 0x08 },
				2393	{ "RTA", 0x10, 0x10 },
				2394	{ "RMA", 0x20, 0x20 },
				2395	{ "SSE", 0x40, 0x40 },
				2396	{ "DPE", 0x80, 0x80 }
				2397	};
				2398
				2399	int
				2400	ahd_sgpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2401	{
				2402	return (ahd_print_register(SGPCISTAT_parse_table, 7, "SGPCISTAT",
				2403	0xa2, regvalue, cur_col, wrap));
				2404	}
				2405
				2406	int
				2407	ahd_reg1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2408	{
				2409	return (ahd_print_register(NULL, 0, "REG1",
				2410	0xa2, regvalue, cur_col, wrap));
				2411	}
				2412
				2413	static ahd_reg_parse_entry_t CMCPCISTAT_parse_table[] = {
				2414	{ "DPR", 0x01, 0x01 },
				2415	{ "TWATERR", 0x02, 0x02 },
				2416	{ "RDPERR", 0x04, 0x04 },
				2417	{ "SCAAPERR", 0x08, 0x08 },
				2418	{ "RTA", 0x10, 0x10 },
				2419	{ "RMA", 0x20, 0x20 },
				2420	{ "SSE", 0x40, 0x40 },
				2421	{ "DPE", 0x80, 0x80 }
				2422	};
				2423
				2424	int
				2425	ahd_cmcpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2426	{
				2427	return (ahd_print_register(CMCPCISTAT_parse_table, 8, "CMCPCISTAT",
				2428	0xa3, regvalue, cur_col, wrap));
				2429	}
				2430
				2431	static ahd_reg_parse_entry_t OVLYPCISTAT_parse_table[] = {
				2432	{ "DPR", 0x01, 0x01 },
				2433	{ "RDPERR", 0x04, 0x04 },
				2434	{ "SCAAPERR", 0x08, 0x08 },
				2435	{ "RTA", 0x10, 0x10 },
				2436	{ "RMA", 0x20, 0x20 },
				2437	{ "SSE", 0x40, 0x40 },
				2438	{ "DPE", 0x80, 0x80 }
				2439	};
				2440
				2441	int
				2442	ahd_ovlypcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2443	{
				2444	return (ahd_print_register(OVLYPCISTAT_parse_table, 7, "OVLYPCISTAT",
				2445	0xa4, regvalue, cur_col, wrap));
				2446	}
				2447
				2448	int
				2449	ahd_reg_isr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2450	{
				2451	return (ahd_print_register(NULL, 0, "REG_ISR",
				2452	0xa4, regvalue, cur_col, wrap));
				2453	}
				2454
				2455	static ahd_reg_parse_entry_t SG_STATE_parse_table[] = {
				2456	{ "SEGS_AVAIL", 0x01, 0x01 },
				2457	{ "LOADING_NEEDED", 0x02, 0x02 },
				2458	{ "FETCH_INPROG", 0x04, 0x04 }
				2459	};
				2460
				2461	int
				2462	ahd_sg_state_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2463	{
				2464	return (ahd_print_register(SG_STATE_parse_table, 3, "SG_STATE",
				2465	0xa6, regvalue, cur_col, wrap));
				2466	}
				2467
				2468	static ahd_reg_parse_entry_t MSIPCISTAT_parse_table[] = {
				2469	{ "DPR", 0x01, 0x01 },
				2470	{ "TWATERR", 0x02, 0x02 },
				2471	{ "CLRPENDMSI", 0x08, 0x08 },
				2472	{ "RTA", 0x10, 0x10 },
				2473	{ "RMA", 0x20, 0x20 },
				2474	{ "SSE", 0x40, 0x40 }
				2475	};
				2476
				2477	int
				2478	ahd_msipcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2479	{
				2480	return (ahd_print_register(MSIPCISTAT_parse_table, 6, "MSIPCISTAT",
				2481	0xa6, regvalue, cur_col, wrap));
				2482	}
				2483
				2484	static ahd_reg_parse_entry_t TARGPCISTAT_parse_table[] = {
				2485	{ "TWATERR", 0x02, 0x02 },
				2486	{ "STA", 0x08, 0x08 },
				2487	{ "SSE", 0x40, 0x40 },
				2488	{ "DPE", 0x80, 0x80 }
				2489	};
				2490
				2491	int
				2492	ahd_targpcistat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2493	{
				2494	return (ahd_print_register(TARGPCISTAT_parse_table, 4, "TARGPCISTAT",
				2495	0xa7, regvalue, cur_col, wrap));
				2496	}
				2497
				2498	int
				2499	ahd_data_count_odd_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2500	{
				2501	return (ahd_print_register(NULL, 0, "DATA_COUNT_ODD",
				2502	0xa7, regvalue, cur_col, wrap));
				2503	}
				2504
				2505	int
				2506	ahd_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2507	{
				2508	return (ahd_print_register(NULL, 0, "SCBPTR",
				2509	0xa8, regvalue, cur_col, wrap));
				2510	}
				2511
				2512	int
				2513	ahd_ccscbacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2514	{
				2515	return (ahd_print_register(NULL, 0, "CCSCBACNT",
				2516	0xab, regvalue, cur_col, wrap));
				2517	}
				2518
				2519	static ahd_reg_parse_entry_t SCBAUTOPTR_parse_table[] = {
				2520	{ "SCBPTR_OFF", 0x07, 0x07 },
				2521	{ "SCBPTR_ADDR", 0x38, 0x38 },
				2522	{ "AUSCBPTR_EN", 0x80, 0x80 }
				2523	};
				2524
				2525	int
				2526	ahd_scbautoptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2527	{
				2528	return (ahd_print_register(SCBAUTOPTR_parse_table, 3, "SCBAUTOPTR",
				2529	0xab, regvalue, cur_col, wrap));
				2530	}
				2531
				2532	int
				2533	ahd_ccsgaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2534	{
				2535	return (ahd_print_register(NULL, 0, "CCSGADDR",
				2536	0xac, regvalue, cur_col, wrap));
				2537	}
				2538
				2539	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2540	ahd_ccscbadr_bk_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2541	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2542	return (ahd_print_register(NULL, 0, "CCSCBADR_BK",
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2543	0xac, regvalue, cur_col, wrap));
				2544	}
				2545
				2546	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2547	ahd_ccscbaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2548	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2549	return (ahd_print_register(NULL, 0, "CCSCBADDR",
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2550	0xac, regvalue, cur_col, wrap));
				2551	}
				2552
				2553	static ahd_reg_parse_entry_t CMC_RAMBIST_parse_table[] = {
				2554	{ "CMC_BUFFER_BIST_EN", 0x01, 0x01 },
				2555	{ "CMC_BUFFER_BIST_FAIL",0x02, 0x02 },
				2556	{ "SG_BIST_EN", 0x10, 0x10 },
				2557	{ "SG_BIST_FAIL", 0x20, 0x20 },
				2558	{ "SCBRAMBIST_FAIL", 0x40, 0x40 },
				2559	{ "SG_ELEMENT_SIZE", 0x80, 0x80 }
				2560	};
				2561
				2562	int
				2563	ahd_cmc_rambist_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2564	{
				2565	return (ahd_print_register(CMC_RAMBIST_parse_table, 6, "CMC_RAMBIST",
				2566	0xad, regvalue, cur_col, wrap));
				2567	}
				2568
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2569	static ahd_reg_parse_entry_t CCSCBCTL_parse_table[] = {
				2570	{ "CCSCBRESET", 0x01, 0x01 },
				2571	{ "CCSCBDIR", 0x04, 0x04 },
				2572	{ "CCSCBEN", 0x08, 0x08 },
				2573	{ "CCARREN", 0x10, 0x10 },
				2574	{ "ARRDONE", 0x40, 0x40 },
				2575	{ "CCSCBDONE", 0x80, 0x80 }
				2576	};
				2577
				2578	int
				2579	ahd_ccscbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2580	{
				2581	return (ahd_print_register(CCSCBCTL_parse_table, 6, "CCSCBCTL",
				2582	0xad, regvalue, cur_col, wrap));
				2583	}
				2584
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2585	static ahd_reg_parse_entry_t CCSGCTL_parse_table[] = {
				2586	{ "CCSGRESET", 0x01, 0x01 },
				2587	{ "SG_FETCH_REQ", 0x02, 0x02 },
				2588	{ "CCSGENACK", 0x08, 0x08 },
				2589	{ "SG_CACHE_AVAIL", 0x10, 0x10 },
				2590	{ "CCSGDONE", 0x80, 0x80 },
				2591	{ "CCSGEN", 0x0c, 0x0c }
				2592	};
				2593
				2594	int
				2595	ahd_ccsgctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2596	{
				2597	return (ahd_print_register(CCSGCTL_parse_table, 6, "CCSGCTL",
				2598	0xad, regvalue, cur_col, wrap));
				2599	}
				2600
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2601	int
				2602	ahd_ccsgram_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2603	{
				2604	return (ahd_print_register(NULL, 0, "CCSGRAM",
				2605	0xb0, regvalue, cur_col, wrap));
				2606	}
				2607
				2608	int
				2609	ahd_flexadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2610	{
				2611	return (ahd_print_register(NULL, 0, "FLEXADR",
				2612	0xb0, regvalue, cur_col, wrap));
				2613	}
				2614
				2615	int
				2616	ahd_ccscbram_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2617	{
				2618	return (ahd_print_register(NULL, 0, "CCSCBRAM",
				2619	0xb0, regvalue, cur_col, wrap));
				2620	}
				2621
				2622	int
				2623	ahd_flexcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2624	{
				2625	return (ahd_print_register(NULL, 0, "FLEXCNT",
				2626	0xb3, regvalue, cur_col, wrap));
				2627	}
				2628
				2629	static ahd_reg_parse_entry_t FLEXDMASTAT_parse_table[] = {
				2630	{ "FLEXDMADONE", 0x01, 0x01 },
				2631	{ "FLEXDMAERR", 0x02, 0x02 }
				2632	};
				2633
				2634	int
				2635	ahd_flexdmastat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2636	{
				2637	return (ahd_print_register(FLEXDMASTAT_parse_table, 2, "FLEXDMASTAT",
				2638	0xb5, regvalue, cur_col, wrap));
				2639	}
				2640
				2641	int
				2642	ahd_flexdata_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2643	{
				2644	return (ahd_print_register(NULL, 0, "FLEXDATA",
				2645	0xb6, regvalue, cur_col, wrap));
				2646	}
				2647
				2648	int
				2649	ahd_brddat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2650	{
				2651	return (ahd_print_register(NULL, 0, "BRDDAT",
				2652	0xb8, regvalue, cur_col, wrap));
				2653	}
				2654
				2655	static ahd_reg_parse_entry_t BRDCTL_parse_table[] = {
				2656	{ "BRDSTB", 0x01, 0x01 },
				2657	{ "BRDRW", 0x02, 0x02 },
				2658	{ "BRDEN", 0x04, 0x04 },
				2659	{ "BRDADDR", 0x38, 0x38 },
				2660	{ "FLXARBREQ", 0x40, 0x40 },
				2661	{ "FLXARBACK", 0x80, 0x80 }
				2662	};
				2663
				2664	int
				2665	ahd_brdctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2666	{
				2667	return (ahd_print_register(BRDCTL_parse_table, 6, "BRDCTL",
				2668	0xb9, regvalue, cur_col, wrap));
				2669	}
				2670
				2671	int
				2672	ahd_seeadr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2673	{
				2674	return (ahd_print_register(NULL, 0, "SEEADR",
				2675	0xba, regvalue, cur_col, wrap));
				2676	}
				2677
				2678	int
				2679	ahd_seedat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2680	{
				2681	return (ahd_print_register(NULL, 0, "SEEDAT",
				2682	0xbc, regvalue, cur_col, wrap));
				2683	}
				2684
				2685	static ahd_reg_parse_entry_t SEECTL_parse_table[] = {
				2686	{ "SEEOP_ERAL", 0x40, 0x70 },
				2687	{ "SEEOP_WRITE", 0x50, 0x70 },
				2688	{ "SEEOP_READ", 0x60, 0x70 },
				2689	{ "SEEOP_ERASE", 0x70, 0x70 },
				2690	{ "SEESTART", 0x01, 0x01 },
				2691	{ "SEERST", 0x02, 0x02 },
				2692	{ "SEEOPCODE", 0x70, 0x70 },
				2693	{ "SEEOP_EWEN", 0x40, 0x40 },
				2694	{ "SEEOP_WALL", 0x40, 0x40 },
				2695	{ "SEEOP_EWDS", 0x40, 0x40 }
				2696	};
				2697
				2698	int
				2699	ahd_seectl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2700	{
				2701	return (ahd_print_register(SEECTL_parse_table, 10, "SEECTL",
				2702	0xbe, regvalue, cur_col, wrap));
				2703	}
				2704
				2705	static ahd_reg_parse_entry_t SEESTAT_parse_table[] = {
				2706	{ "SEESTART", 0x01, 0x01 },
				2707	{ "SEEBUSY", 0x02, 0x02 },
				2708	{ "SEEARBACK", 0x04, 0x04 },
				2709	{ "LDALTID_L", 0x08, 0x08 },
				2710	{ "SEEOPCODE", 0x70, 0x70 },
				2711	{ "INIT_DONE", 0x80, 0x80 }
				2712	};
				2713
				2714	int
				2715	ahd_seestat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2716	{
				2717	return (ahd_print_register(SEESTAT_parse_table, 6, "SEESTAT",
				2718	0xbe, regvalue, cur_col, wrap));
				2719	}
				2720
				2721	int
				2722	ahd_scbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2723	{
				2724	return (ahd_print_register(NULL, 0, "SCBCNT",
				2725	0xbf, regvalue, cur_col, wrap));
				2726	}
				2727
				2728	int
				2729	ahd_dfwaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2730	{
				2731	return (ahd_print_register(NULL, 0, "DFWADDR",
				2732	0xc0, regvalue, cur_col, wrap));
				2733	}
				2734
				2735	static ahd_reg_parse_entry_t DSPFLTRCTL_parse_table[] = {
				2736	{ "DSPFCNTSEL", 0x0f, 0x0f },
				2737	{ "EDGESENSE", 0x10, 0x10 },
				2738	{ "FLTRDISABLE", 0x20, 0x20 }
				2739	};
				2740
				2741	int
				2742	ahd_dspfltrctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2743	{
				2744	return (ahd_print_register(DSPFLTRCTL_parse_table, 3, "DSPFLTRCTL",
				2745	0xc0, regvalue, cur_col, wrap));
				2746	}
				2747
				2748	static ahd_reg_parse_entry_t DSPDATACTL_parse_table[] = {
				2749	{ "XMITOFFSTDIS", 0x02, 0x02 },
				2750	{ "RCVROFFSTDIS", 0x04, 0x04 },
				2751	{ "DESQDIS", 0x10, 0x10 },
				2752	{ "BYPASSENAB", 0x80, 0x80 }
				2753	};
				2754
				2755	int
				2756	ahd_dspdatactl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2757	{
				2758	return (ahd_print_register(DSPDATACTL_parse_table, 4, "DSPDATACTL",
				2759	0xc1, regvalue, cur_col, wrap));
				2760	}
				2761
				2762	int
				2763	ahd_dfraddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2764	{
				2765	return (ahd_print_register(NULL, 0, "DFRADDR",
				2766	0xc2, regvalue, cur_col, wrap));
				2767	}
				2768
				2769	static ahd_reg_parse_entry_t DSPREQCTL_parse_table[] = {
				2770	{ "MANREQDLY", 0x3f, 0x3f },
				2771	{ "MANREQCTL", 0xc0, 0xc0 }
				2772	};
				2773
				2774	int
				2775	ahd_dspreqctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2776	{
				2777	return (ahd_print_register(DSPREQCTL_parse_table, 2, "DSPREQCTL",
				2778	0xc2, regvalue, cur_col, wrap));
				2779	}
				2780
				2781	static ahd_reg_parse_entry_t DSPACKCTL_parse_table[] = {
				2782	{ "MANACKDLY", 0x3f, 0x3f },
				2783	{ "MANACKCTL", 0xc0, 0xc0 }
				2784	};
				2785
				2786	int
				2787	ahd_dspackctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2788	{
				2789	return (ahd_print_register(DSPACKCTL_parse_table, 2, "DSPACKCTL",
				2790	0xc3, regvalue, cur_col, wrap));
				2791	}
				2792
				2793	int
				2794	ahd_dfdat_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2795	{
				2796	return (ahd_print_register(NULL, 0, "DFDAT",
				2797	0xc4, regvalue, cur_col, wrap));
				2798	}
				2799
				2800	static ahd_reg_parse_entry_t DSPSELECT_parse_table[] = {
				2801	{ "DSPSEL", 0x1f, 0x1f },
				2802	{ "AUTOINCEN", 0x80, 0x80 }
				2803	};
				2804
				2805	int
				2806	ahd_dspselect_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2807	{
				2808	return (ahd_print_register(DSPSELECT_parse_table, 2, "DSPSELECT",
				2809	0xc4, regvalue, cur_col, wrap));
				2810	}
				2811
				2812	static ahd_reg_parse_entry_t WRTBIASCTL_parse_table[] = {
				2813	{ "XMITMANVAL", 0x3f, 0x3f },
				2814	{ "AUTOXBCDIS", 0x80, 0x80 }
				2815	};
				2816
				2817	int
				2818	ahd_wrtbiasctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2819	{
				2820	return (ahd_print_register(WRTBIASCTL_parse_table, 2, "WRTBIASCTL",
				2821	0xc5, regvalue, cur_col, wrap));
				2822	}
				2823
				2824	static ahd_reg_parse_entry_t RCVRBIOSCTL_parse_table[] = {
				2825	{ "RCVRMANVAL", 0x3f, 0x3f },
				2826	{ "AUTORBCDIS", 0x80, 0x80 }
				2827	};
				2828
				2829	int
				2830	ahd_rcvrbiosctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2831	{
				2832	return (ahd_print_register(RCVRBIOSCTL_parse_table, 2, "RCVRBIOSCTL",
				2833	0xc6, regvalue, cur_col, wrap));
				2834	}
				2835
				2836	int
				2837	ahd_wrtbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2838	{
				2839	return (ahd_print_register(NULL, 0, "WRTBIASCALC",
				2840	0xc7, regvalue, cur_col, wrap));
				2841	}
				2842
				2843	int
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2844	ahd_rcvrbiascalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2845	{
				2846	return (ahd_print_register(NULL, 0, "RCVRBIASCALC",
				2847	0xc8, regvalue, cur_col, wrap));
				2848	}
				2849
				2850	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2851	ahd_dfptrs_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2852	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2853	return (ahd_print_register(NULL, 0, "DFPTRS",
				2854	0xc8, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2855	}
				2856
				2857	int
				2858	ahd_skewcalc_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2859	{
				2860	return (ahd_print_register(NULL, 0, "SKEWCALC",
				2861	0xc9, regvalue, cur_col, wrap));
				2862	}
				2863
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	2864	int
				2865	ahd_dfbkptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2866	{
				2867	return (ahd_print_register(NULL, 0, "DFBKPTR",
				2868	0xc9, regvalue, cur_col, wrap));
				2869	}
				2870
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	2871	static ahd_reg_parse_entry_t DFDBCTL_parse_table[] = {
				2872	{ "DFF_RAMBIST_EN", 0x01, 0x01 },
				2873	{ "DFF_RAMBIST_DONE", 0x02, 0x02 },
				2874	{ "DFF_RAMBIST_FAIL", 0x04, 0x04 },
				2875	{ "DFF_DIR_ERR", 0x08, 0x08 },
				2876	{ "DFF_CIO_RD_RDY", 0x10, 0x10 },
				2877	{ "DFF_CIO_WR_RDY", 0x20, 0x20 }
				2878	};
				2879
				2880	int
				2881	ahd_dfdbctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2882	{
				2883	return (ahd_print_register(DFDBCTL_parse_table, 6, "DFDBCTL",
				2884	0xcb, regvalue, cur_col, wrap));
				2885	}
				2886
				2887	int
				2888	ahd_dfscnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2889	{
				2890	return (ahd_print_register(NULL, 0, "DFSCNT",
				2891	0xcc, regvalue, cur_col, wrap));
				2892	}
				2893
				2894	int
				2895	ahd_dfbcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2896	{
				2897	return (ahd_print_register(NULL, 0, "DFBCNT",
				2898	0xce, regvalue, cur_col, wrap));
				2899	}
				2900
				2901	int
				2902	ahd_ovlyaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2903	{
				2904	return (ahd_print_register(NULL, 0, "OVLYADDR",
				2905	0xd4, regvalue, cur_col, wrap));
				2906	}
				2907
				2908	static ahd_reg_parse_entry_t SEQCTL0_parse_table[] = {
				2909	{ "LOADRAM", 0x01, 0x01 },
				2910	{ "SEQRESET", 0x02, 0x02 },
				2911	{ "STEP", 0x04, 0x04 },
				2912	{ "BRKADRINTEN", 0x08, 0x08 },
				2913	{ "FASTMODE", 0x10, 0x10 },
				2914	{ "FAILDIS", 0x20, 0x20 },
				2915	{ "PAUSEDIS", 0x40, 0x40 },
				2916	{ "PERRORDIS", 0x80, 0x80 }
				2917	};
				2918
				2919	int
				2920	ahd_seqctl0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2921	{
				2922	return (ahd_print_register(SEQCTL0_parse_table, 8, "SEQCTL0",
				2923	0xd6, regvalue, cur_col, wrap));
				2924	}
				2925
				2926	static ahd_reg_parse_entry_t SEQCTL1_parse_table[] = {
				2927	{ "RAMBIST_EN", 0x01, 0x01 },
				2928	{ "RAMBIST_FAIL", 0x02, 0x02 },
				2929	{ "RAMBIST_DONE", 0x04, 0x04 },
				2930	{ "OVRLAY_DATA_CHK", 0x08, 0x08 }
				2931	};
				2932
				2933	int
				2934	ahd_seqctl1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2935	{
				2936	return (ahd_print_register(SEQCTL1_parse_table, 4, "SEQCTL1",
				2937	0xd7, regvalue, cur_col, wrap));
				2938	}
				2939
				2940	static ahd_reg_parse_entry_t FLAGS_parse_table[] = {
				2941	{ "CARRY", 0x01, 0x01 },
				2942	{ "ZERO", 0x02, 0x02 }
				2943	};
				2944
				2945	int
				2946	ahd_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2947	{
				2948	return (ahd_print_register(FLAGS_parse_table, 2, "FLAGS",
				2949	0xd8, regvalue, cur_col, wrap));
				2950	}
				2951
				2952	static ahd_reg_parse_entry_t SEQINTCTL_parse_table[] = {
				2953	{ "IRET", 0x01, 0x01 },
				2954	{ "INTMASK1", 0x02, 0x02 },
				2955	{ "INTMASK2", 0x04, 0x04 },
				2956	{ "SCS_SEQ_INT1M0", 0x08, 0x08 },
				2957	{ "SCS_SEQ_INT1M1", 0x10, 0x10 },
				2958	{ "INT1_CONTEXT", 0x20, 0x20 },
				2959	{ "INTVEC1DSL", 0x80, 0x80 }
				2960	};
				2961
				2962	int
				2963	ahd_seqintctl_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2964	{
				2965	return (ahd_print_register(SEQINTCTL_parse_table, 7, "SEQINTCTL",
				2966	0xd9, regvalue, cur_col, wrap));
				2967	}
				2968
				2969	int
				2970	ahd_seqram_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2971	{
				2972	return (ahd_print_register(NULL, 0, "SEQRAM",
				2973	0xda, regvalue, cur_col, wrap));
				2974	}
				2975
				2976	int
				2977	ahd_prgmcnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2978	{
				2979	return (ahd_print_register(NULL, 0, "PRGMCNT",
				2980	0xde, regvalue, cur_col, wrap));
				2981	}
				2982
				2983	int
				2984	ahd_accum_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2985	{
				2986	return (ahd_print_register(NULL, 0, "ACCUM",
				2987	0xe0, regvalue, cur_col, wrap));
				2988	}
				2989
				2990	int
				2991	ahd_sindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2992	{
				2993	return (ahd_print_register(NULL, 0, "SINDEX",
				2994	0xe2, regvalue, cur_col, wrap));
				2995	}
				2996
				2997	int
				2998	ahd_dindex_print(u_int regvalue, u_int *cur_col, u_int wrap)
				2999	{
				3000	return (ahd_print_register(NULL, 0, "DINDEX",
				3001	0xe4, regvalue, cur_col, wrap));
				3002	}
				3003
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3004	int
				3005	ahd_brkaddr0_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3006	{
				3007	return (ahd_print_register(NULL, 0, "BRKADDR0",
				3008	0xe6, regvalue, cur_col, wrap));
				3009	}
				3010
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3011	static ahd_reg_parse_entry_t BRKADDR1_parse_table[] = {
				3012	{ "BRKDIS", 0x80, 0x80 }
				3013	};
				3014
				3015	int
				3016	ahd_brkaddr1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3017	{
				3018	return (ahd_print_register(BRKADDR1_parse_table, 1, "BRKADDR1",
				3019	0xe6, regvalue, cur_col, wrap));
				3020	}
				3021
				3022	int
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3023	ahd_allones_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3024	{
				3025	return (ahd_print_register(NULL, 0, "ALLONES",
				3026	0xe8, regvalue, cur_col, wrap));
				3027	}
				3028
				3029	int
				3030	ahd_allzeros_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3031	{
				3032	return (ahd_print_register(NULL, 0, "ALLZEROS",
				3033	0xea, regvalue, cur_col, wrap));
				3034	}
				3035
				3036	int
				3037	ahd_none_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3038	{
				3039	return (ahd_print_register(NULL, 0, "NONE",
				3040	0xea, regvalue, cur_col, wrap));
				3041	}
				3042
				3043	int
				3044	ahd_sindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3045	{
				3046	return (ahd_print_register(NULL, 0, "SINDIR",
				3047	0xec, regvalue, cur_col, wrap));
				3048	}
				3049
				3050	int
				3051	ahd_dindir_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3052	{
				3053	return (ahd_print_register(NULL, 0, "DINDIR",
				3054	0xed, regvalue, cur_col, wrap));
				3055	}
				3056
				3057	int
				3058	ahd_function1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3059	{
				3060	return (ahd_print_register(NULL, 0, "FUNCTION1",
				3061	0xf0, regvalue, cur_col, wrap));
				3062	}
				3063
				3064	int
				3065	ahd_stack_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3066	{
				3067	return (ahd_print_register(NULL, 0, "STACK",
				3068	0xf2, regvalue, cur_col, wrap));
				3069	}
				3070
				3071	int
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3072	ahd_intvec1_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3073	{
				3074	return (ahd_print_register(NULL, 0, "INTVEC1_ADDR",
				3075	0xf4, regvalue, cur_col, wrap));
				3076	}
				3077
				3078	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3079	ahd_curaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3080	{
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3081	return (ahd_print_register(NULL, 0, "CURADDR",
				3082	0xf4, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3083	}
				3084
				3085	int
				3086	ahd_lastaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3087	{
				3088	return (ahd_print_register(NULL, 0, "LASTADDR",
				3089	0xf6, regvalue, cur_col, wrap));
				3090	}
				3091
				3092	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3093	ahd_intvec2_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3094	{
				3095	return (ahd_print_register(NULL, 0, "INTVEC2_ADDR",
				3096	0xf6, regvalue, cur_col, wrap));
				3097	}
				3098
				3099	int
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3100	ahd_longjmp_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3101	{
				3102	return (ahd_print_register(NULL, 0, "LONGJMP_ADDR",
				3103	0xf8, regvalue, cur_col, wrap));
				3104	}
				3105
				3106	int
				3107	ahd_accum_save_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3108	{
				3109	return (ahd_print_register(NULL, 0, "ACCUM_SAVE",
				3110	0xfa, regvalue, cur_col, wrap));
				3111	}
				3112
				3113	int
				3114	ahd_waiting_scb_tails_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3115	{
				3116	return (ahd_print_register(NULL, 0, "WAITING_SCB_TAILS",
				3117	0x100, regvalue, cur_col, wrap));
				3118	}
				3119
				3120	int
				3121	ahd_ahd_pci_config_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3122	{
				3123	return (ahd_print_register(NULL, 0, "AHD_PCI_CONFIG_BASE",
				3124	0x100, regvalue, cur_col, wrap));
				3125	}
				3126
				3127	int
				3128	ahd_sram_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3129	{
				3130	return (ahd_print_register(NULL, 0, "SRAM_BASE",
				3131	0x100, regvalue, cur_col, wrap));
				3132	}
				3133
				3134	int
				3135	ahd_waiting_tid_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3136	{
				3137	return (ahd_print_register(NULL, 0, "WAITING_TID_HEAD",
				3138	0x120, regvalue, cur_col, wrap));
				3139	}
				3140
				3141	int
				3142	ahd_waiting_tid_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3143	{
				3144	return (ahd_print_register(NULL, 0, "WAITING_TID_TAIL",
				3145	0x122, regvalue, cur_col, wrap));
				3146	}
				3147
				3148	int
				3149	ahd_next_queued_scb_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3150	{
				3151	return (ahd_print_register(NULL, 0, "NEXT_QUEUED_SCB_ADDR",
				3152	0x124, regvalue, cur_col, wrap));
				3153	}
				3154
				3155	int
				3156	ahd_complete_scb_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3157	{
				3158	return (ahd_print_register(NULL, 0, "COMPLETE_SCB_HEAD",
				3159	0x128, regvalue, cur_col, wrap));
				3160	}
				3161
				3162	int
				3163	ahd_complete_scb_dmainprog_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3164	{
				3165	return (ahd_print_register(NULL, 0, "COMPLETE_SCB_DMAINPROG_HEAD",
				3166	0x12a, regvalue, cur_col, wrap));
				3167	}
				3168
				3169	int
				3170	ahd_complete_dma_scb_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3171	{
				3172	return (ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_HEAD",
				3173	0x12c, regvalue, cur_col, wrap));
				3174	}
				3175
				3176	int
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3177	ahd_complete_dma_scb_tail_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3178	{
				3179	return (ahd_print_register(NULL, 0, "COMPLETE_DMA_SCB_TAIL",
				3180	0x12e, regvalue, cur_col, wrap));
				3181	}
				3182
				3183	int
				3184	ahd_complete_on_qfreeze_head_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3185	{
				3186	return (ahd_print_register(NULL, 0, "COMPLETE_ON_QFREEZE_HEAD",
				3187	0x130, regvalue, cur_col, wrap));
				3188	}
				3189
				3190	int
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3191	ahd_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3192	{
				3193	return (ahd_print_register(NULL, 0, "QFREEZE_COUNT",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3194	0x132, regvalue, cur_col, wrap));
				3195	}
				3196
				3197	int
				3198	ahd_kernel_qfreeze_count_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3199	{
				3200	return (ahd_print_register(NULL, 0, "KERNEL_QFREEZE_COUNT",
				3201	0x134, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3202	}
				3203
				3204	int
				3205	ahd_saved_mode_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3206	{
				3207	return (ahd_print_register(NULL, 0, "SAVED_MODE",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3208	0x136, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3209	}
				3210
				3211	int
				3212	ahd_msg_out_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3213	{
				3214	return (ahd_print_register(NULL, 0, "MSG_OUT",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3215	0x137, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3216	}
				3217
				3218	static ahd_reg_parse_entry_t DMAPARAMS_parse_table[] = {
				3219	{ "FIFORESET", 0x01, 0x01 },
				3220	{ "FIFOFLUSH", 0x02, 0x02 },
				3221	{ "DIRECTION", 0x04, 0x04 },
				3222	{ "HDMAEN", 0x08, 0x08 },
				3223	{ "HDMAENACK", 0x08, 0x08 },
				3224	{ "SDMAEN", 0x10, 0x10 },
				3225	{ "SDMAENACK", 0x10, 0x10 },
				3226	{ "SCSIEN", 0x20, 0x20 },
				3227	{ "WIDEODD", 0x40, 0x40 },
				3228	{ "PRELOADEN", 0x80, 0x80 }
				3229	};
				3230
				3231	int
				3232	ahd_dmaparams_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3233	{
				3234	return (ahd_print_register(DMAPARAMS_parse_table, 10, "DMAPARAMS",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3235	0x138, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3236	}
				3237
				3238	static ahd_reg_parse_entry_t SEQ_FLAGS_parse_table[] = {
				3239	{ "NO_DISCONNECT", 0x01, 0x01 },
				3240	{ "SPHASE_PENDING", 0x02, 0x02 },
				3241	{ "DPHASE_PENDING", 0x04, 0x04 },
				3242	{ "CMDPHASE_PENDING", 0x08, 0x08 },
				3243	{ "TARG_CMD_PENDING", 0x10, 0x10 },
				3244	{ "DPHASE", 0x20, 0x20 },
				3245	{ "NO_CDB_SENT", 0x40, 0x40 },
				3246	{ "TARGET_CMD_IS_TAGGED",0x40, 0x40 },
				3247	{ "NOT_IDENTIFIED", 0x80, 0x80 }
				3248	};
				3249
				3250	int
				3251	ahd_seq_flags_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3252	{
				3253	return (ahd_print_register(SEQ_FLAGS_parse_table, 9, "SEQ_FLAGS",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3254	0x139, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3255	}
				3256
				3257	int
				3258	ahd_saved_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3259	{
				3260	return (ahd_print_register(NULL, 0, "SAVED_SCSIID",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3261	0x13a, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3262	}
				3263
				3264	int
				3265	ahd_saved_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3266	{
				3267	return (ahd_print_register(NULL, 0, "SAVED_LUN",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3268	0x13b, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3269	}
				3270
				3271	static ahd_reg_parse_entry_t LASTPHASE_parse_table[] = {
				3272	{ "P_DATAOUT", 0x00, 0xe0 },
				3273	{ "P_DATAOUT_DT", 0x20, 0xe0 },
				3274	{ "P_DATAIN", 0x40, 0xe0 },
				3275	{ "P_DATAIN_DT", 0x60, 0xe0 },
				3276	{ "P_COMMAND", 0x80, 0xe0 },
				3277	{ "P_MESGOUT", 0xa0, 0xe0 },
				3278	{ "P_STATUS", 0xc0, 0xe0 },
				3279	{ "P_MESGIN", 0xe0, 0xe0 },
				3280	{ "P_BUSFREE", 0x01, 0x01 },
				3281	{ "MSGI", 0x20, 0x20 },
				3282	{ "IOI", 0x40, 0x40 },
				3283	{ "CDI", 0x80, 0x80 },
				3284	{ "PHASE_MASK", 0xe0, 0xe0 }
				3285	};
				3286
				3287	int
				3288	ahd_lastphase_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3289	{
				3290	return (ahd_print_register(LASTPHASE_parse_table, 13, "LASTPHASE",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3291	0x13c, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3292	}
				3293
				3294	int
				3295	ahd_qoutfifo_entry_valid_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3296	{
				3297	return (ahd_print_register(NULL, 0, "QOUTFIFO_ENTRY_VALID_TAG",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3298	0x13d, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3299	}
				3300
				3301	int
				3302	ahd_kernel_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3303	{
				3304	return (ahd_print_register(NULL, 0, "KERNEL_TQINPOS",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3305	0x13e, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3306	}
				3307
				3308	int
				3309	ahd_tqinpos_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3310	{
				3311	return (ahd_print_register(NULL, 0, "TQINPOS",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3312	0x13f, regvalue, cur_col, wrap));
				3313	}
				3314
				3315	int
				3316	ahd_shared_data_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3317	{
				3318	return (ahd_print_register(NULL, 0, "SHARED_DATA_ADDR",
				3319	0x140, regvalue, cur_col, wrap));
				3320	}
				3321
				3322	int
				3323	ahd_qoutfifo_next_addr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3324	{
				3325	return (ahd_print_register(NULL, 0, "QOUTFIFO_NEXT_ADDR",
				3326	0x144, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3327	}
				3328
				3329	static ahd_reg_parse_entry_t ARG_1_parse_table[] = {
				3330	{ "CONT_MSG_LOOP_TARG", 0x02, 0x02 },
				3331	{ "CONT_MSG_LOOP_READ", 0x03, 0x03 },
				3332	{ "CONT_MSG_LOOP_WRITE",0x04, 0x04 },
				3333	{ "EXIT_MSG_LOOP", 0x08, 0x08 },
				3334	{ "MSGOUT_PHASEMIS", 0x10, 0x10 },
				3335	{ "SEND_REJ", 0x20, 0x20 },
				3336	{ "SEND_SENSE", 0x40, 0x40 },
				3337	{ "SEND_MSG", 0x80, 0x80 }
				3338	};
				3339
				3340	int
				3341	ahd_arg_1_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3342	{
				3343	return (ahd_print_register(ARG_1_parse_table, 8, "ARG_1",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3344	0x148, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3345	}
				3346
				3347	int
				3348	ahd_arg_2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3349	{
				3350	return (ahd_print_register(NULL, 0, "ARG_2",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3351	0x149, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3352	}
				3353
				3354	int
				3355	ahd_last_msg_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3356	{
				3357	return (ahd_print_register(NULL, 0, "LAST_MSG",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3358	0x14a, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3359	}
				3360
				3361	static ahd_reg_parse_entry_t SCSISEQ_TEMPLATE_parse_table[] = {
				3362	{ "ALTSTIM", 0x01, 0x01 },
				3363	{ "ENAUTOATNP", 0x02, 0x02 },
				3364	{ "MANUALP", 0x0c, 0x0c },
				3365	{ "ENRSELI", 0x10, 0x10 },
				3366	{ "ENSELI", 0x20, 0x20 },
				3367	{ "MANUALCTL", 0x40, 0x40 }
				3368	};
				3369
				3370	int
				3371	ahd_scsiseq_template_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3372	{
				3373	return (ahd_print_register(SCSISEQ_TEMPLATE_parse_table, 6, "SCSISEQ_TEMPLATE",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3374	0x14b, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3375	}
				3376
				3377	int
				3378	ahd_initiator_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3379	{
				3380	return (ahd_print_register(NULL, 0, "INITIATOR_TAG",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3381	0x14c, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3382	}
				3383
				3384	static ahd_reg_parse_entry_t SEQ_FLAGS2_parse_table[] = {
				3385	{ "TARGET_MSG_PENDING", 0x02, 0x02 },
				3386	{ "SELECTOUT_QFROZEN", 0x04, 0x04 }
				3387	};
				3388
				3389	int
				3390	ahd_seq_flags2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3391	{
				3392	return (ahd_print_register(SEQ_FLAGS2_parse_table, 2, "SEQ_FLAGS2",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3393	0x14d, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3394	}
				3395
				3396	int
				3397	ahd_allocfifo_scbptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3398	{
				3399	return (ahd_print_register(NULL, 0, "ALLOCFIFO_SCBPTR",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3400	0x14e, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3401	}
				3402
				3403	int
				3404	ahd_int_coalescing_timer_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3405	{
				3406	return (ahd_print_register(NULL, 0, "INT_COALESCING_TIMER",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3407	0x150, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3408	}
				3409
				3410	int
				3411	ahd_int_coalescing_maxcmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3412	{
				3413	return (ahd_print_register(NULL, 0, "INT_COALESCING_MAXCMDS",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3414	0x152, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3415	}
				3416
				3417	int
				3418	ahd_int_coalescing_mincmds_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3419	{
				3420	return (ahd_print_register(NULL, 0, "INT_COALESCING_MINCMDS",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3421	0x153, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3422	}
				3423
				3424	int
				3425	ahd_cmds_pending_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3426	{
				3427	return (ahd_print_register(NULL, 0, "CMDS_PENDING",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3428	0x154, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3429	}
				3430
				3431	int
				3432	ahd_int_coalescing_cmdcount_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3433	{
				3434	return (ahd_print_register(NULL, 0, "INT_COALESCING_CMDCOUNT",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3435	0x156, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3436	}
				3437
				3438	int
				3439	ahd_local_hs_mailbox_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3440	{
				3441	return (ahd_print_register(NULL, 0, "LOCAL_HS_MAILBOX",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3442	0x157, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3443	}
				3444
				3445	int
				3446	ahd_cmdsize_table_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3447	{
				3448	return (ahd_print_register(NULL, 0, "CMDSIZE_TABLE",
Hannes Reinecke	11668bb	2006-01-12 12:08:06 +0100	[diff] [blame^]	3449	0x158, regvalue, cur_col, wrap));
Linus Torvalds	1da177e	2005-04-16 15:20:36 -0700	[diff] [blame]	3450	}
				3451
				3452	int
				3453	ahd_scb_base_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3454	{
				3455	return (ahd_print_register(NULL, 0, "SCB_BASE",
				3456	0x180, regvalue, cur_col, wrap));
				3457	}
				3458
				3459	int
				3460	ahd_scb_residual_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3461	{
				3462	return (ahd_print_register(NULL, 0, "SCB_RESIDUAL_DATACNT",
				3463	0x180, regvalue, cur_col, wrap));
				3464	}
				3465
				3466	static ahd_reg_parse_entry_t SCB_RESIDUAL_SGPTR_parse_table[] = {
				3467	{ "SG_LIST_NULL", 0x01, 0x01 },
				3468	{ "SG_OVERRUN_RESID", 0x02, 0x02 },
				3469	{ "SG_ADDR_MASK", 0xf8, 0xf8 }
				3470	};
				3471
				3472	int
				3473	ahd_scb_residual_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3474	{
				3475	return (ahd_print_register(SCB_RESIDUAL_SGPTR_parse_table, 3, "SCB_RESIDUAL_SGPTR",
				3476	0x184, regvalue, cur_col, wrap));
				3477	}
				3478
				3479	int
				3480	ahd_scb_scsi_status_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3481	{
				3482	return (ahd_print_register(NULL, 0, "SCB_SCSI_STATUS",
				3483	0x188, regvalue, cur_col, wrap));
				3484	}
				3485
				3486	int
				3487	ahd_scb_target_phases_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3488	{
				3489	return (ahd_print_register(NULL, 0, "SCB_TARGET_PHASES",
				3490	0x189, regvalue, cur_col, wrap));
				3491	}
				3492
				3493	int
				3494	ahd_scb_target_data_dir_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3495	{
				3496	return (ahd_print_register(NULL, 0, "SCB_TARGET_DATA_DIR",
				3497	0x18a, regvalue, cur_col, wrap));
				3498	}
				3499
				3500	int
				3501	ahd_scb_target_itag_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3502	{
				3503	return (ahd_print_register(NULL, 0, "SCB_TARGET_ITAG",
				3504	0x18b, regvalue, cur_col, wrap));
				3505	}
				3506
				3507	int
				3508	ahd_scb_sense_busaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3509	{
				3510	return (ahd_print_register(NULL, 0, "SCB_SENSE_BUSADDR",
				3511	0x18c, regvalue, cur_col, wrap));
				3512	}
				3513
				3514	int
				3515	ahd_scb_tag_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3516	{
				3517	return (ahd_print_register(NULL, 0, "SCB_TAG",
				3518	0x190, regvalue, cur_col, wrap));
				3519	}
				3520
				3521	static ahd_reg_parse_entry_t SCB_CONTROL_parse_table[] = {
				3522	{ "SCB_TAG_TYPE", 0x03, 0x03 },
				3523	{ "DISCONNECTED", 0x04, 0x04 },
				3524	{ "STATUS_RCVD", 0x08, 0x08 },
				3525	{ "MK_MESSAGE", 0x10, 0x10 },
				3526	{ "TAG_ENB", 0x20, 0x20 },
				3527	{ "DISCENB", 0x40, 0x40 },
				3528	{ "TARGET_SCB", 0x80, 0x80 }
				3529	};
				3530
				3531	int
				3532	ahd_scb_control_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3533	{
				3534	return (ahd_print_register(SCB_CONTROL_parse_table, 7, "SCB_CONTROL",
				3535	0x192, regvalue, cur_col, wrap));
				3536	}
				3537
				3538	static ahd_reg_parse_entry_t SCB_SCSIID_parse_table[] = {
				3539	{ "OID", 0x0f, 0x0f },
				3540	{ "TID", 0xf0, 0xf0 }
				3541	};
				3542
				3543	int
				3544	ahd_scb_scsiid_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3545	{
				3546	return (ahd_print_register(SCB_SCSIID_parse_table, 2, "SCB_SCSIID",
				3547	0x193, regvalue, cur_col, wrap));
				3548	}
				3549
				3550	static ahd_reg_parse_entry_t SCB_LUN_parse_table[] = {
				3551	{ "LID", 0xff, 0xff }
				3552	};
				3553
				3554	int
				3555	ahd_scb_lun_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3556	{
				3557	return (ahd_print_register(SCB_LUN_parse_table, 1, "SCB_LUN",
				3558	0x194, regvalue, cur_col, wrap));
				3559	}
				3560
				3561	static ahd_reg_parse_entry_t SCB_TASK_ATTRIBUTE_parse_table[] = {
				3562	{ "SCB_XFERLEN_ODD", 0x01, 0x01 }
				3563	};
				3564
				3565	int
				3566	ahd_scb_task_attribute_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3567	{
				3568	return (ahd_print_register(SCB_TASK_ATTRIBUTE_parse_table, 1, "SCB_TASK_ATTRIBUTE",
				3569	0x195, regvalue, cur_col, wrap));
				3570	}
				3571
				3572	static ahd_reg_parse_entry_t SCB_CDB_LEN_parse_table[] = {
				3573	{ "SCB_CDB_LEN_PTR", 0x80, 0x80 }
				3574	};
				3575
				3576	int
				3577	ahd_scb_cdb_len_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3578	{
				3579	return (ahd_print_register(SCB_CDB_LEN_parse_table, 1, "SCB_CDB_LEN",
				3580	0x196, regvalue, cur_col, wrap));
				3581	}
				3582
				3583	int
				3584	ahd_scb_task_management_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3585	{
				3586	return (ahd_print_register(NULL, 0, "SCB_TASK_MANAGEMENT",
				3587	0x197, regvalue, cur_col, wrap));
				3588	}
				3589
				3590	int
				3591	ahd_scb_dataptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3592	{
				3593	return (ahd_print_register(NULL, 0, "SCB_DATAPTR",
				3594	0x198, regvalue, cur_col, wrap));
				3595	}
				3596
				3597	static ahd_reg_parse_entry_t SCB_DATACNT_parse_table[] = {
				3598	{ "SG_HIGH_ADDR_BITS", 0x7f, 0x7f },
				3599	{ "SG_LAST_SEG", 0x80, 0x80 }
				3600	};
				3601
				3602	int
				3603	ahd_scb_datacnt_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3604	{
				3605	return (ahd_print_register(SCB_DATACNT_parse_table, 2, "SCB_DATACNT",
				3606	0x1a0, regvalue, cur_col, wrap));
				3607	}
				3608
				3609	static ahd_reg_parse_entry_t SCB_SGPTR_parse_table[] = {
				3610	{ "SG_LIST_NULL", 0x01, 0x01 },
				3611	{ "SG_FULL_RESID", 0x02, 0x02 },
				3612	{ "SG_STATUS_VALID", 0x04, 0x04 }
				3613	};
				3614
				3615	int
				3616	ahd_scb_sgptr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3617	{
				3618	return (ahd_print_register(SCB_SGPTR_parse_table, 3, "SCB_SGPTR",
				3619	0x1a4, regvalue, cur_col, wrap));
				3620	}
				3621
				3622	int
				3623	ahd_scb_busaddr_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3624	{
				3625	return (ahd_print_register(NULL, 0, "SCB_BUSADDR",
				3626	0x1a8, regvalue, cur_col, wrap));
				3627	}
				3628
				3629	int
				3630	ahd_scb_next_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3631	{
				3632	return (ahd_print_register(NULL, 0, "SCB_NEXT",
				3633	0x1ac, regvalue, cur_col, wrap));
				3634	}
				3635
				3636	int
				3637	ahd_scb_next2_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3638	{
				3639	return (ahd_print_register(NULL, 0, "SCB_NEXT2",
				3640	0x1ae, regvalue, cur_col, wrap));
				3641	}
				3642
				3643	int
				3644	ahd_scb_spare_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3645	{
				3646	return (ahd_print_register(NULL, 0, "SCB_SPARE",
				3647	0x1b0, regvalue, cur_col, wrap));
				3648	}
				3649
				3650	int
				3651	ahd_scb_disconnected_lists_print(u_int regvalue, u_int *cur_col, u_int wrap)
				3652	{
				3653	return (ahd_print_register(NULL, 0, "SCB_DISCONNECTED_LISTS",
				3654	0x1b8, regvalue, cur_col, wrap));
				3655	}
				3656