Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 1 | /* |
| 2 | * drivers/net/ethernet/mellanox/mlxsw/spectrum_dcb.c |
| 3 | * Copyright (c) 2016 Mellanox Technologies. All rights reserved. |
| 4 | * Copyright (c) 2016 Ido Schimmel <idosch@mellanox.com> |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions are met: |
| 8 | * |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * 3. Neither the names of the copyright holders nor the names of its |
| 15 | * contributors may be used to endorse or promote products derived from |
| 16 | * this software without specific prior written permission. |
| 17 | * |
| 18 | * Alternatively, this software may be distributed under the terms of the |
| 19 | * GNU General Public License ("GPL") version 2 as published by the Free |
| 20 | * Software Foundation. |
| 21 | * |
| 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 25 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
| 26 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| 29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| 30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| 31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| 32 | * POSSIBILITY OF SUCH DAMAGE. |
| 33 | */ |
| 34 | |
| 35 | #include <linux/netdevice.h> |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 36 | #include <linux/string.h> |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 37 | #include <linux/bitops.h> |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 38 | #include <net/dcbnl.h> |
| 39 | |
| 40 | #include "spectrum.h" |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 41 | #include "reg.h" |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 42 | |
| 43 | static u8 mlxsw_sp_dcbnl_getdcbx(struct net_device __always_unused *dev) |
| 44 | { |
| 45 | return DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE; |
| 46 | } |
| 47 | |
| 48 | static u8 mlxsw_sp_dcbnl_setdcbx(struct net_device __always_unused *dev, |
| 49 | u8 mode) |
| 50 | { |
| 51 | return (mode != (DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_IEEE)) ? 1 : 0; |
| 52 | } |
| 53 | |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 54 | static int mlxsw_sp_dcbnl_ieee_getets(struct net_device *dev, |
| 55 | struct ieee_ets *ets) |
| 56 | { |
| 57 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 58 | |
| 59 | memcpy(ets, mlxsw_sp_port->dcb.ets, sizeof(*ets)); |
| 60 | |
| 61 | return 0; |
| 62 | } |
| 63 | |
| 64 | static int mlxsw_sp_port_ets_validate(struct mlxsw_sp_port *mlxsw_sp_port, |
| 65 | struct ieee_ets *ets) |
| 66 | { |
| 67 | struct net_device *dev = mlxsw_sp_port->dev; |
| 68 | bool has_ets_tc = false; |
| 69 | int i, tx_bw_sum = 0; |
| 70 | |
| 71 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 72 | switch (ets->tc_tsa[i]) { |
| 73 | case IEEE_8021QAZ_TSA_STRICT: |
| 74 | break; |
| 75 | case IEEE_8021QAZ_TSA_ETS: |
| 76 | has_ets_tc = true; |
| 77 | tx_bw_sum += ets->tc_tx_bw[i]; |
| 78 | break; |
| 79 | default: |
| 80 | netdev_err(dev, "Only strict priority and ETS are supported\n"); |
| 81 | return -EINVAL; |
| 82 | } |
| 83 | |
| 84 | if (ets->prio_tc[i] >= IEEE_8021QAZ_MAX_TCS) { |
| 85 | netdev_err(dev, "Invalid TC\n"); |
| 86 | return -EINVAL; |
| 87 | } |
| 88 | } |
| 89 | |
| 90 | if (has_ets_tc && tx_bw_sum != 100) { |
| 91 | netdev_err(dev, "Total ETS bandwidth should equal 100\n"); |
| 92 | return -EINVAL; |
| 93 | } |
| 94 | |
| 95 | return 0; |
| 96 | } |
| 97 | |
| 98 | static int mlxsw_sp_port_pg_prio_map(struct mlxsw_sp_port *mlxsw_sp_port, |
| 99 | u8 *prio_tc) |
| 100 | { |
| 101 | char pptb_pl[MLXSW_REG_PPTB_LEN]; |
| 102 | int i; |
| 103 | |
| 104 | mlxsw_reg_pptb_pack(pptb_pl, mlxsw_sp_port->local_port); |
| 105 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) |
| 106 | mlxsw_reg_pptb_prio_to_buff_set(pptb_pl, i, prio_tc[i]); |
| 107 | return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pptb), |
| 108 | pptb_pl); |
| 109 | } |
| 110 | |
| 111 | static bool mlxsw_sp_ets_has_pg(u8 *prio_tc, u8 pg) |
| 112 | { |
| 113 | int i; |
| 114 | |
| 115 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) |
| 116 | if (prio_tc[i] == pg) |
| 117 | return true; |
| 118 | return false; |
| 119 | } |
| 120 | |
| 121 | static int mlxsw_sp_port_pg_destroy(struct mlxsw_sp_port *mlxsw_sp_port, |
| 122 | u8 *old_prio_tc, u8 *new_prio_tc) |
| 123 | { |
| 124 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 125 | char pbmc_pl[MLXSW_REG_PBMC_LEN]; |
| 126 | int err, i; |
| 127 | |
| 128 | mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0); |
| 129 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); |
| 130 | if (err) |
| 131 | return err; |
| 132 | |
| 133 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 134 | u8 pg = old_prio_tc[i]; |
| 135 | |
| 136 | if (!mlxsw_sp_ets_has_pg(new_prio_tc, pg)) |
| 137 | mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg, 0); |
| 138 | } |
| 139 | |
| 140 | return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); |
| 141 | } |
| 142 | |
| 143 | static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 144 | struct ieee_ets *ets) |
| 145 | { |
Ido Schimmel | 9f7ec05 | 2016-04-06 17:10:14 +0200 | [diff] [blame] | 146 | bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port); |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 147 | struct ieee_ets *my_ets = mlxsw_sp_port->dcb.ets; |
| 148 | struct net_device *dev = mlxsw_sp_port->dev; |
| 149 | int err; |
| 150 | |
| 151 | /* Create the required PGs, but don't destroy existing ones, as |
| 152 | * traffic is still directed to them. |
| 153 | */ |
| 154 | err = __mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 155 | ets->prio_tc, pause_en, |
| 156 | mlxsw_sp_port->dcb.pfc); |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 157 | if (err) { |
| 158 | netdev_err(dev, "Failed to configure port's headroom\n"); |
| 159 | return err; |
| 160 | } |
| 161 | |
| 162 | err = mlxsw_sp_port_pg_prio_map(mlxsw_sp_port, ets->prio_tc); |
| 163 | if (err) { |
| 164 | netdev_err(dev, "Failed to set PG-priority mapping\n"); |
| 165 | goto err_port_prio_pg_map; |
| 166 | } |
| 167 | |
| 168 | err = mlxsw_sp_port_pg_destroy(mlxsw_sp_port, my_ets->prio_tc, |
| 169 | ets->prio_tc); |
| 170 | if (err) |
| 171 | netdev_warn(dev, "Failed to remove ununsed PGs\n"); |
| 172 | |
| 173 | return 0; |
| 174 | |
| 175 | err_port_prio_pg_map: |
| 176 | mlxsw_sp_port_pg_destroy(mlxsw_sp_port, ets->prio_tc, my_ets->prio_tc); |
| 177 | return err; |
| 178 | } |
| 179 | |
| 180 | static int __mlxsw_sp_dcbnl_ieee_setets(struct mlxsw_sp_port *mlxsw_sp_port, |
| 181 | struct ieee_ets *ets) |
| 182 | { |
| 183 | struct ieee_ets *my_ets = mlxsw_sp_port->dcb.ets; |
| 184 | struct net_device *dev = mlxsw_sp_port->dev; |
| 185 | int i, err; |
| 186 | |
| 187 | /* Egress configuration. */ |
| 188 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 189 | bool dwrr = ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS; |
| 190 | u8 weight = ets->tc_tx_bw[i]; |
| 191 | |
| 192 | err = mlxsw_sp_port_ets_set(mlxsw_sp_port, |
| 193 | MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i, |
| 194 | 0, dwrr, weight); |
| 195 | if (err) { |
| 196 | netdev_err(dev, "Failed to link subgroup ETS element %d to group\n", |
| 197 | i); |
| 198 | goto err_port_ets_set; |
| 199 | } |
| 200 | } |
| 201 | |
| 202 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 203 | err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, |
| 204 | ets->prio_tc[i]); |
| 205 | if (err) { |
| 206 | netdev_err(dev, "Failed to map prio %d to TC %d\n", i, |
| 207 | ets->prio_tc[i]); |
| 208 | goto err_port_prio_tc_set; |
| 209 | } |
| 210 | } |
| 211 | |
| 212 | /* Ingress configuration. */ |
| 213 | err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, ets); |
| 214 | if (err) |
| 215 | goto err_port_headroom_set; |
| 216 | |
| 217 | return 0; |
| 218 | |
| 219 | err_port_headroom_set: |
| 220 | i = IEEE_8021QAZ_MAX_TCS; |
| 221 | err_port_prio_tc_set: |
| 222 | for (i--; i >= 0; i--) |
| 223 | mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, my_ets->prio_tc[i]); |
| 224 | i = IEEE_8021QAZ_MAX_TCS; |
| 225 | err_port_ets_set: |
| 226 | for (i--; i >= 0; i--) { |
| 227 | bool dwrr = my_ets->tc_tsa[i] == IEEE_8021QAZ_TSA_ETS; |
| 228 | u8 weight = my_ets->tc_tx_bw[i]; |
| 229 | |
| 230 | err = mlxsw_sp_port_ets_set(mlxsw_sp_port, |
| 231 | MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i, |
| 232 | 0, dwrr, weight); |
| 233 | } |
| 234 | return err; |
| 235 | } |
| 236 | |
| 237 | static int mlxsw_sp_dcbnl_ieee_setets(struct net_device *dev, |
| 238 | struct ieee_ets *ets) |
| 239 | { |
| 240 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 241 | int err; |
| 242 | |
| 243 | err = mlxsw_sp_port_ets_validate(mlxsw_sp_port, ets); |
| 244 | if (err) |
| 245 | return err; |
| 246 | |
| 247 | err = __mlxsw_sp_dcbnl_ieee_setets(mlxsw_sp_port, ets); |
| 248 | if (err) |
| 249 | return err; |
| 250 | |
| 251 | memcpy(mlxsw_sp_port->dcb.ets, ets, sizeof(*ets)); |
Ido Schimmel | 28f5275 | 2016-07-15 11:15:01 +0200 | [diff] [blame^] | 252 | mlxsw_sp_port->dcb.ets->ets_cap = IEEE_8021QAZ_MAX_TCS; |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 253 | |
| 254 | return 0; |
| 255 | } |
| 256 | |
Ido Schimmel | cc7cf51 | 2016-04-06 17:10:11 +0200 | [diff] [blame] | 257 | static int mlxsw_sp_dcbnl_ieee_getmaxrate(struct net_device *dev, |
| 258 | struct ieee_maxrate *maxrate) |
| 259 | { |
| 260 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 261 | |
| 262 | memcpy(maxrate, mlxsw_sp_port->dcb.maxrate, sizeof(*maxrate)); |
| 263 | |
| 264 | return 0; |
| 265 | } |
| 266 | |
| 267 | static int mlxsw_sp_dcbnl_ieee_setmaxrate(struct net_device *dev, |
| 268 | struct ieee_maxrate *maxrate) |
| 269 | { |
| 270 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 271 | struct ieee_maxrate *my_maxrate = mlxsw_sp_port->dcb.maxrate; |
| 272 | int err, i; |
| 273 | |
| 274 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 275 | err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, |
| 276 | MLXSW_REG_QEEC_HIERARCY_SUBGROUP, |
| 277 | i, 0, |
| 278 | maxrate->tc_maxrate[i]); |
| 279 | if (err) { |
| 280 | netdev_err(dev, "Failed to set maxrate for TC %d\n", i); |
| 281 | goto err_port_ets_maxrate_set; |
| 282 | } |
| 283 | } |
| 284 | |
| 285 | memcpy(mlxsw_sp_port->dcb.maxrate, maxrate, sizeof(*maxrate)); |
| 286 | |
| 287 | return 0; |
| 288 | |
| 289 | err_port_ets_maxrate_set: |
| 290 | for (i--; i >= 0; i--) |
| 291 | mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, |
| 292 | MLXSW_REG_QEEC_HIERARCY_SUBGROUP, |
| 293 | i, 0, my_maxrate->tc_maxrate[i]); |
| 294 | return err; |
| 295 | } |
| 296 | |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 297 | static int mlxsw_sp_port_pfc_cnt_get(struct mlxsw_sp_port *mlxsw_sp_port, |
| 298 | u8 prio) |
| 299 | { |
| 300 | struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; |
| 301 | struct ieee_pfc *my_pfc = mlxsw_sp_port->dcb.pfc; |
| 302 | char ppcnt_pl[MLXSW_REG_PPCNT_LEN]; |
| 303 | int err; |
| 304 | |
| 305 | mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, |
| 306 | MLXSW_REG_PPCNT_PRIO_CNT, prio); |
| 307 | err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl); |
| 308 | if (err) |
| 309 | return err; |
| 310 | |
| 311 | my_pfc->requests[prio] = mlxsw_reg_ppcnt_tx_pause_get(ppcnt_pl); |
| 312 | my_pfc->indications[prio] = mlxsw_reg_ppcnt_rx_pause_get(ppcnt_pl); |
| 313 | |
| 314 | return 0; |
| 315 | } |
| 316 | |
| 317 | static int mlxsw_sp_dcbnl_ieee_getpfc(struct net_device *dev, |
| 318 | struct ieee_pfc *pfc) |
| 319 | { |
| 320 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 321 | int err, i; |
| 322 | |
| 323 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { |
| 324 | err = mlxsw_sp_port_pfc_cnt_get(mlxsw_sp_port, i); |
| 325 | if (err) { |
| 326 | netdev_err(dev, "Failed to get PFC count for priority %d\n", |
| 327 | i); |
| 328 | return err; |
| 329 | } |
| 330 | } |
| 331 | |
| 332 | memcpy(pfc, mlxsw_sp_port->dcb.pfc, sizeof(*pfc)); |
| 333 | |
| 334 | return 0; |
| 335 | } |
| 336 | |
| 337 | static int mlxsw_sp_port_pfc_set(struct mlxsw_sp_port *mlxsw_sp_port, |
| 338 | struct ieee_pfc *pfc) |
| 339 | { |
| 340 | char pfcc_pl[MLXSW_REG_PFCC_LEN]; |
| 341 | |
| 342 | mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port); |
| 343 | mlxsw_reg_pfcc_prio_pack(pfcc_pl, pfc->pfc_en); |
| 344 | |
| 345 | return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc), |
| 346 | pfcc_pl); |
| 347 | } |
| 348 | |
| 349 | static int mlxsw_sp_dcbnl_ieee_setpfc(struct net_device *dev, |
| 350 | struct ieee_pfc *pfc) |
| 351 | { |
| 352 | struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); |
| 353 | int err; |
| 354 | |
Ido Schimmel | 7347180 | 2016-07-15 11:15:00 +0200 | [diff] [blame] | 355 | if ((mlxsw_sp_port->link.tx_pause || mlxsw_sp_port->link.rx_pause) && |
| 356 | pfc->pfc_en) { |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 357 | netdev_err(dev, "PAUSE frames already enabled on port\n"); |
| 358 | return -EINVAL; |
| 359 | } |
| 360 | |
| 361 | err = __mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, |
| 362 | mlxsw_sp_port->dcb.ets->prio_tc, |
| 363 | false, pfc); |
| 364 | if (err) { |
| 365 | netdev_err(dev, "Failed to configure port's headroom for PFC\n"); |
| 366 | return err; |
| 367 | } |
| 368 | |
| 369 | err = mlxsw_sp_port_pfc_set(mlxsw_sp_port, pfc); |
| 370 | if (err) { |
| 371 | netdev_err(dev, "Failed to configure PFC\n"); |
| 372 | goto err_port_pfc_set; |
| 373 | } |
| 374 | |
| 375 | memcpy(mlxsw_sp_port->dcb.pfc, pfc, sizeof(*pfc)); |
Ido Schimmel | 28f5275 | 2016-07-15 11:15:01 +0200 | [diff] [blame^] | 376 | mlxsw_sp_port->dcb.pfc->pfc_cap = IEEE_8021QAZ_MAX_TCS; |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 377 | |
| 378 | return 0; |
| 379 | |
| 380 | err_port_pfc_set: |
| 381 | __mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, |
| 382 | mlxsw_sp_port->dcb.ets->prio_tc, false, |
| 383 | mlxsw_sp_port->dcb.pfc); |
| 384 | return err; |
| 385 | } |
| 386 | |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 387 | static const struct dcbnl_rtnl_ops mlxsw_sp_dcbnl_ops = { |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 388 | .ieee_getets = mlxsw_sp_dcbnl_ieee_getets, |
| 389 | .ieee_setets = mlxsw_sp_dcbnl_ieee_setets, |
Ido Schimmel | cc7cf51 | 2016-04-06 17:10:11 +0200 | [diff] [blame] | 390 | .ieee_getmaxrate = mlxsw_sp_dcbnl_ieee_getmaxrate, |
| 391 | .ieee_setmaxrate = mlxsw_sp_dcbnl_ieee_setmaxrate, |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 392 | .ieee_getpfc = mlxsw_sp_dcbnl_ieee_getpfc, |
| 393 | .ieee_setpfc = mlxsw_sp_dcbnl_ieee_setpfc, |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 394 | |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 395 | .getdcbx = mlxsw_sp_dcbnl_getdcbx, |
| 396 | .setdcbx = mlxsw_sp_dcbnl_setdcbx, |
| 397 | }; |
| 398 | |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 399 | static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 400 | { |
| 401 | mlxsw_sp_port->dcb.ets = kzalloc(sizeof(*mlxsw_sp_port->dcb.ets), |
| 402 | GFP_KERNEL); |
| 403 | if (!mlxsw_sp_port->dcb.ets) |
| 404 | return -ENOMEM; |
| 405 | |
| 406 | mlxsw_sp_port->dcb.ets->ets_cap = IEEE_8021QAZ_MAX_TCS; |
| 407 | |
| 408 | return 0; |
| 409 | } |
| 410 | |
| 411 | static void mlxsw_sp_port_ets_fini(struct mlxsw_sp_port *mlxsw_sp_port) |
| 412 | { |
| 413 | kfree(mlxsw_sp_port->dcb.ets); |
| 414 | } |
| 415 | |
Ido Schimmel | cc7cf51 | 2016-04-06 17:10:11 +0200 | [diff] [blame] | 416 | static int mlxsw_sp_port_maxrate_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 417 | { |
| 418 | int i; |
| 419 | |
| 420 | mlxsw_sp_port->dcb.maxrate = kmalloc(sizeof(*mlxsw_sp_port->dcb.maxrate), |
| 421 | GFP_KERNEL); |
| 422 | if (!mlxsw_sp_port->dcb.maxrate) |
| 423 | return -ENOMEM; |
| 424 | |
| 425 | for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) |
| 426 | mlxsw_sp_port->dcb.maxrate->tc_maxrate[i] = MLXSW_REG_QEEC_MAS_DIS; |
| 427 | |
| 428 | return 0; |
| 429 | } |
| 430 | |
| 431 | static void mlxsw_sp_port_maxrate_fini(struct mlxsw_sp_port *mlxsw_sp_port) |
| 432 | { |
| 433 | kfree(mlxsw_sp_port->dcb.maxrate); |
| 434 | } |
| 435 | |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 436 | static int mlxsw_sp_port_pfc_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 437 | { |
| 438 | mlxsw_sp_port->dcb.pfc = kzalloc(sizeof(*mlxsw_sp_port->dcb.pfc), |
| 439 | GFP_KERNEL); |
| 440 | if (!mlxsw_sp_port->dcb.pfc) |
| 441 | return -ENOMEM; |
| 442 | |
| 443 | mlxsw_sp_port->dcb.pfc->pfc_cap = IEEE_8021QAZ_MAX_TCS; |
| 444 | |
| 445 | return 0; |
| 446 | } |
| 447 | |
| 448 | static void mlxsw_sp_port_pfc_fini(struct mlxsw_sp_port *mlxsw_sp_port) |
| 449 | { |
| 450 | kfree(mlxsw_sp_port->dcb.pfc); |
| 451 | } |
| 452 | |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 453 | int mlxsw_sp_port_dcb_init(struct mlxsw_sp_port *mlxsw_sp_port) |
| 454 | { |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 455 | int err; |
| 456 | |
| 457 | err = mlxsw_sp_port_ets_init(mlxsw_sp_port); |
| 458 | if (err) |
| 459 | return err; |
Ido Schimmel | cc7cf51 | 2016-04-06 17:10:11 +0200 | [diff] [blame] | 460 | err = mlxsw_sp_port_maxrate_init(mlxsw_sp_port); |
| 461 | if (err) |
| 462 | goto err_port_maxrate_init; |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 463 | err = mlxsw_sp_port_pfc_init(mlxsw_sp_port); |
| 464 | if (err) |
| 465 | goto err_port_pfc_init; |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 466 | |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 467 | mlxsw_sp_port->dev->dcbnl_ops = &mlxsw_sp_dcbnl_ops; |
| 468 | |
| 469 | return 0; |
Ido Schimmel | cc7cf51 | 2016-04-06 17:10:11 +0200 | [diff] [blame] | 470 | |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 471 | err_port_pfc_init: |
| 472 | mlxsw_sp_port_maxrate_fini(mlxsw_sp_port); |
Ido Schimmel | cc7cf51 | 2016-04-06 17:10:11 +0200 | [diff] [blame] | 473 | err_port_maxrate_init: |
| 474 | mlxsw_sp_port_ets_fini(mlxsw_sp_port); |
| 475 | return err; |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 476 | } |
| 477 | |
| 478 | void mlxsw_sp_port_dcb_fini(struct mlxsw_sp_port *mlxsw_sp_port) |
| 479 | { |
Ido Schimmel | d81a6bd | 2016-04-06 17:10:16 +0200 | [diff] [blame] | 480 | mlxsw_sp_port_pfc_fini(mlxsw_sp_port); |
Ido Schimmel | cc7cf51 | 2016-04-06 17:10:11 +0200 | [diff] [blame] | 481 | mlxsw_sp_port_maxrate_fini(mlxsw_sp_port); |
Ido Schimmel | 8e8dfe9 | 2016-04-06 17:10:10 +0200 | [diff] [blame] | 482 | mlxsw_sp_port_ets_fini(mlxsw_sp_port); |
Ido Schimmel | f00817d | 2016-04-06 17:10:09 +0200 | [diff] [blame] | 483 | } |