blob: aab91d60af57dd2446962de4a5d8a21a50397374 [file] [log] [blame]
Banajit Goswamib45bc032017-02-15 21:38:26 -08001/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13&slim_aud {
14 tavil_codec {
15 wcd: wcd_pinctrl@5 {
16 compatible = "qcom,wcd-pinctrl";
17 qcom,num-gpios = <5>;
18 gpio-controller;
19 #gpio-cells = <2>;
20
21 us_euro_sw_wcd_active: us_euro_sw_wcd_active {
22 mux {
23 pins = "gpio1";
24 };
25
26 config {
27 pins = "gpio1";
28 output-high;
29 };
30 };
31
32 us_euro_sw_wcd_sleep: us_euro_sw_wcd_sleep {
33 mux {
34 pins = "gpio1";
35 };
36
37 config {
38 pins = "gpio1";
39 output-low;
40 };
41 };
42
43 spkr_1_wcd_en_active: spkr_1_wcd_en_active {
44 mux {
45 pins = "gpio2";
46 };
47
48 config {
49 pins = "gpio2";
50 output-high;
51 };
52 };
53
54 spkr_1_wcd_en_sleep: spkr_1_wcd_en_sleep {
55 mux {
56 pins = "gpio2";
57 };
58
59 config {
60 pins = "gpio2";
61 input-enable;
62 };
63 };
64
65 spkr_2_wcd_en_active: spkr_2_sd_n_active {
66 mux {
67 pins = "gpio3";
68 };
69
70 config {
71 pins = "gpio3";
72 output-high;
73 };
74 };
75
76 spkr_2_wcd_en_sleep: spkr_2_sd_n_sleep {
77 mux {
78 pins = "gpio3";
79 };
80
81 config {
82 pins = "gpio3";
83 input-enable;
84 };
85 };
86
87 hph_en0_wcd_active: hph_en0_wcd_active {
88 mux {
89 pins = "gpio4";
90 };
91
92 config {
93 pins = "gpio4";
94 output-high;
95 };
96 };
97
98 hph_en0_wcd_sleep: hph_en0_wcd_sleep {
99 mux {
100 pins = "gpio4";
101 };
102
103 config {
104 pins = "gpio4";
105 output-low;
106 };
107 };
108
109 hph_en1_wcd_active: hph_en1_wcd_active {
110 mux {
111 pins = "gpio5";
112 };
113
114 config {
115 pins = "gpio5";
116 output-high;
117 };
118 };
119
120 hph_en1_wcd_sleep: hph_en1_wcd_sleep {
121 mux {
122 pins = "gpio5";
123 };
124
125 config {
126 pins = "gpio5";
127 output-low;
128 };
129 };
130 };
131
132 wsa_spkr_wcd_sd1: msm_cdc_pinctrll {
133 compatible = "qcom,msm-cdc-pinctrl";
134 pinctrl-names = "aud_active", "aud_sleep";
135 pinctrl-0 = <&spkr_1_wcd_en_active>;
136 pinctrl-1 = <&spkr_1_wcd_en_sleep>;
137 };
138
139 wsa_spkr_wcd_sd2: msm_cdc_pinctrlr {
140 compatible = "qcom,msm-cdc-pinctrl";
141 pinctrl-names = "aud_active", "aud_sleep";
142 pinctrl-0 = <&spkr_2_wcd_en_active>;
143 pinctrl-1 = <&spkr_2_wcd_en_sleep>;
144 };
145
146 tavil_us_euro_sw: msm_cdc_pinctrl_us_euro_sw {
147 compatible = "qcom,msm-cdc-pinctrl";
148 pinctrl-names = "aud_active", "aud_sleep";
149 pinctrl-0 = <&us_euro_sw_wcd_active>;
150 pinctrl-1 = <&us_euro_sw_wcd_sleep>;
151 };
152
153 tavil_hph_en0: msm_cdc_pinctrl_hph_en0 {
154 compatible = "qcom,msm-cdc-pinctrl";
155 pinctrl-names = "aud_active", "aud_sleep";
156 pinctrl-0 = <&hph_en0_wcd_active>;
157 pinctrl-1 = <&hph_en0_wcd_sleep>;
158 };
159
160 tavil_hph_en1: msm_cdc_pinctrl_hph_en1 {
161 compatible = "qcom,msm-cdc-pinctrl";
162 pinctrl-names = "aud_active", "aud_sleep";
163 pinctrl-0 = <&hph_en1_wcd_active>;
164 pinctrl-1 = <&hph_en1_wcd_sleep>;
165 };
166 };
167};