blob: 938df5e8402b5886770bf3e17f88cf454c3e9045 [file] [log] [blame]
Ingo Molnar9f4c8152008-01-30 13:33:41 +01001/*
2 * Copyright 2002 Andi Kleen, SuSE Labs.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * Thanks to Ben LaHaise for precious feedback.
Ingo Molnar9f4c8152008-01-30 13:33:41 +01004 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005#include <linux/highmem.h>
Ingo Molnar81922062008-01-30 13:34:04 +01006#include <linux/bootmem.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007#include <linux/module.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +01008#include <linux/sched.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07009#include <linux/slab.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010010#include <linux/mm.h>
Thomas Gleixner76ebd052008-02-09 23:24:09 +010011#include <linux/interrupt.h>
Thomas Gleixneree7ae7a2008-04-17 17:40:45 +020012#include <linux/seq_file.h>
13#include <linux/debugfs.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010014
Thomas Gleixner950f9d92008-01-30 13:34:06 +010015#include <asm/e820.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070016#include <asm/processor.h>
17#include <asm/tlbflush.h>
Dave Jonesf8af0952006-01-06 00:12:10 -080018#include <asm/sections.h>
Ingo Molnar9f4c8152008-01-30 13:33:41 +010019#include <asm/uaccess.h>
20#include <asm/pgalloc.h>
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010021#include <asm/proto.h>
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -070022#include <asm/pat.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023
Ingo Molnar9df84992008-02-04 16:48:09 +010024/*
25 * The current flushing context - we pass it instead of 5 arguments:
26 */
Thomas Gleixner72e458d2008-02-04 16:48:07 +010027struct cpa_data {
28 unsigned long vaddr;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010029 pgprot_t mask_set;
30 pgprot_t mask_clr;
Thomas Gleixner65e074d2008-02-04 16:48:07 +010031 int numpages;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +010032 int flushtlb;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010033 unsigned long pfn;
Thomas Gleixner72e458d2008-02-04 16:48:07 +010034};
35
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +010036#ifdef CONFIG_X86_64
37
38static inline unsigned long highmap_start_pfn(void)
39{
40 return __pa(_text) >> PAGE_SHIFT;
41}
42
43static inline unsigned long highmap_end_pfn(void)
44{
45 return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT;
46}
47
48#endif
49
Ingo Molnar92cb54a2008-02-13 14:37:52 +010050#ifdef CONFIG_DEBUG_PAGEALLOC
51# define debug_pagealloc 1
52#else
53# define debug_pagealloc 0
54#endif
55
Arjan van de Vened724be2008-01-30 13:34:04 +010056static inline int
57within(unsigned long addr, unsigned long start, unsigned long end)
Ingo Molnar687c4822008-01-30 13:34:04 +010058{
Arjan van de Vened724be2008-01-30 13:34:04 +010059 return addr >= start && addr < end;
60}
61
62/*
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +010063 * Flushing functions
64 */
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +010065
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +010066/**
67 * clflush_cache_range - flush a cache range with clflush
68 * @addr: virtual start address
69 * @size: number of bytes to flush
70 *
71 * clflush is an unordered instruction which needs fencing with mfence
72 * to avoid ordering issues.
73 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +010074void clflush_cache_range(void *vaddr, unsigned int size)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +010075{
Ingo Molnar4c61afc2008-01-30 13:34:09 +010076 void *vend = vaddr + size - 1;
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +010077
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +010078 mb();
Ingo Molnar4c61afc2008-01-30 13:34:09 +010079
80 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
81 clflush(vaddr);
82 /*
83 * Flush any possible final partial cacheline:
84 */
85 clflush(vend);
86
Thomas Gleixnercd8ddf12008-01-30 13:34:08 +010087 mb();
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +010088}
89
Thomas Gleixneraf1e6842008-01-30 13:34:08 +010090static void __cpa_flush_all(void *arg)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +010091{
Andi Kleen6bb83832008-02-04 16:48:06 +010092 unsigned long cache = (unsigned long)arg;
93
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +010094 /*
95 * Flush all to work around Errata in early athlons regarding
96 * large page flushing.
97 */
98 __flush_tlb_all();
99
Andi Kleen6bb83832008-02-04 16:48:06 +0100100 if (cache && boot_cpu_data.x86_model >= 4)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100101 wbinvd();
102}
103
Andi Kleen6bb83832008-02-04 16:48:06 +0100104static void cpa_flush_all(unsigned long cache)
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100105{
106 BUG_ON(irqs_disabled());
107
Andi Kleen6bb83832008-02-04 16:48:06 +0100108 on_each_cpu(__cpa_flush_all, (void *) cache, 1, 1);
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100109}
110
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100111static void __cpa_flush_range(void *arg)
112{
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100113 /*
114 * We could optimize that further and do individual per page
115 * tlb invalidates for a low number of pages. Caveat: we must
116 * flush the high aliases on 64bit as well.
117 */
118 __flush_tlb_all();
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100119}
120
Andi Kleen6bb83832008-02-04 16:48:06 +0100121static void cpa_flush_range(unsigned long start, int numpages, int cache)
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100122{
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100123 unsigned int i, level;
124 unsigned long addr;
125
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100126 BUG_ON(irqs_disabled());
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100127 WARN_ON(PAGE_ALIGN(start) != start);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100128
Thomas Gleixner3b233e52008-01-30 13:34:08 +0100129 on_each_cpu(__cpa_flush_range, NULL, 1, 1);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100130
Andi Kleen6bb83832008-02-04 16:48:06 +0100131 if (!cache)
132 return;
133
Thomas Gleixner3b233e52008-01-30 13:34:08 +0100134 /*
135 * We only need to flush on one CPU,
136 * clflush is a MESI-coherent instruction that
137 * will cause all other CPUs to flush the same
138 * cachelines:
139 */
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100140 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
141 pte_t *pte = lookup_address(addr, &level);
142
143 /*
144 * Only flush present addresses:
145 */
Thomas Gleixner7bfb72e2008-02-04 16:48:08 +0100146 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
Ingo Molnar4c61afc2008-01-30 13:34:09 +0100147 clflush_cache_range((void *) addr, PAGE_SIZE);
148 }
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100149}
150
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100151/*
Arjan van de Vened724be2008-01-30 13:34:04 +0100152 * Certain areas of memory on x86 require very specific protection flags,
153 * for example the BIOS area or kernel text. Callers don't always get this
154 * right (again, ioremap() on BIOS memory is not uncommon) so this function
155 * checks and fixes these known static required protection bits.
156 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100157static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
158 unsigned long pfn)
Arjan van de Vened724be2008-01-30 13:34:04 +0100159{
160 pgprot_t forbidden = __pgprot(0);
161
Ingo Molnar687c4822008-01-30 13:34:04 +0100162 /*
Arjan van de Vened724be2008-01-30 13:34:04 +0100163 * The BIOS area between 640k and 1Mb needs to be executable for
164 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
Ingo Molnar687c4822008-01-30 13:34:04 +0100165 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100166 if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
Arjan van de Vened724be2008-01-30 13:34:04 +0100167 pgprot_val(forbidden) |= _PAGE_NX;
168
169 /*
170 * The kernel text needs to be executable for obvious reasons
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100171 * Does not cover __inittext since that is gone later on. On
172 * 64bit we do not enforce !NX on the low mapping
Arjan van de Vened724be2008-01-30 13:34:04 +0100173 */
174 if (within(address, (unsigned long)_text, (unsigned long)_etext))
175 pgprot_val(forbidden) |= _PAGE_NX;
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100176
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100177 /*
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100178 * The .rodata section needs to be read-only. Using the pfn
179 * catches all aliases.
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100180 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100181 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
182 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
Arjan van de Vencc0f21b2008-02-04 16:48:05 +0100183 pgprot_val(forbidden) |= _PAGE_RW;
Arjan van de Vened724be2008-01-30 13:34:04 +0100184
185 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
Ingo Molnar687c4822008-01-30 13:34:04 +0100186
187 return prot;
188}
189
Thomas Gleixner9a14aef2008-02-04 16:48:07 +0100190/*
191 * Lookup the page table entry for a virtual address. Return a pointer
192 * to the entry and the level of the mapping.
193 *
194 * Note: We return pud and pmd either when the entry is marked large
195 * or when the present bit is not set. Otherwise we would return a
196 * pointer to a nonexisting mapping.
197 */
Harvey Harrisonda7bfc52008-02-09 23:24:08 +0100198pte_t *lookup_address(unsigned long address, unsigned int *level)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100199{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200 pgd_t *pgd = pgd_offset_k(address);
201 pud_t *pud;
202 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100203
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100204 *level = PG_LEVEL_NONE;
205
Linus Torvalds1da177e2005-04-16 15:20:36 -0700206 if (pgd_none(*pgd))
207 return NULL;
Ingo Molnar9df84992008-02-04 16:48:09 +0100208
Linus Torvalds1da177e2005-04-16 15:20:36 -0700209 pud = pud_offset(pgd, address);
210 if (pud_none(*pud))
211 return NULL;
Andi Kleenc2f71ee2008-02-04 16:48:09 +0100212
213 *level = PG_LEVEL_1G;
214 if (pud_large(*pud) || !pud_present(*pud))
215 return (pte_t *)pud;
216
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217 pmd = pmd_offset(pud, address);
218 if (pmd_none(*pmd))
219 return NULL;
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100220
221 *level = PG_LEVEL_2M;
Thomas Gleixner9a14aef2008-02-04 16:48:07 +0100222 if (pmd_large(*pmd) || !pmd_present(*pmd))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223 return (pte_t *)pmd;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100225 *level = PG_LEVEL_4K;
Ingo Molnar9df84992008-02-04 16:48:09 +0100226
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100227 return pte_offset_kernel(pmd, address);
228}
229
Ingo Molnar9df84992008-02-04 16:48:09 +0100230/*
231 * Set the new pmd in all the pgds we know about:
232 */
Ingo Molnar9a3dc782008-01-30 13:33:57 +0100233static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100234{
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100235 /* change init_mm */
236 set_pte_atomic(kpte, pte);
Ingo Molnar44af6c42008-01-30 13:34:03 +0100237#ifdef CONFIG_X86_32
Ingo Molnare4b71dc2008-01-30 13:34:04 +0100238 if (!SHARED_KERNEL_PMD) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100239 struct page *page;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240
Jeremy Fitzhardingee3ed9102008-01-30 13:34:11 +0100241 list_for_each_entry(page, &pgd_list, lru) {
Ingo Molnar44af6c42008-01-30 13:34:03 +0100242 pgd_t *pgd;
243 pud_t *pud;
244 pmd_t *pmd;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100245
Ingo Molnar44af6c42008-01-30 13:34:03 +0100246 pgd = (pgd_t *)page_address(page) + pgd_index(address);
247 pud = pud_offset(pgd, address);
248 pmd = pmd_offset(pud, address);
249 set_pte_atomic((pte_t *)pmd, pte);
250 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700251 }
Ingo Molnar44af6c42008-01-30 13:34:03 +0100252#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253}
254
Ingo Molnar9df84992008-02-04 16:48:09 +0100255static int
256try_preserve_large_page(pte_t *kpte, unsigned long address,
257 struct cpa_data *cpa)
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100258{
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100259 unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100260 pte_t new_pte, old_pte, *tmp;
261 pgprot_t old_prot, new_prot;
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100262 int i, do_split = 1;
Harvey Harrisonda7bfc52008-02-09 23:24:08 +0100263 unsigned int level;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100264
265 spin_lock_irqsave(&pgd_lock, flags);
266 /*
267 * Check for races, another CPU might have split this page
268 * up already:
269 */
270 tmp = lookup_address(address, &level);
271 if (tmp != kpte)
272 goto out_unlock;
273
274 switch (level) {
275 case PG_LEVEL_2M:
Andi Kleen31422c52008-02-04 16:48:08 +0100276 psize = PMD_PAGE_SIZE;
277 pmask = PMD_PAGE_MASK;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100278 break;
Andi Kleenf07333f2008-02-04 16:48:09 +0100279#ifdef CONFIG_X86_64
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100280 case PG_LEVEL_1G:
Andi Kleen5d3c8b22008-02-13 16:20:35 +0100281 psize = PUD_PAGE_SIZE;
282 pmask = PUD_PAGE_MASK;
Andi Kleenf07333f2008-02-04 16:48:09 +0100283 break;
284#endif
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100285 default:
Ingo Molnarbeaff632008-02-04 16:48:09 +0100286 do_split = -EINVAL;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100287 goto out_unlock;
288 }
289
290 /*
291 * Calculate the number of pages, which fit into this large
292 * page starting at address:
293 */
294 nextpage_addr = (address + psize) & pmask;
295 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100296 if (numpages < cpa->numpages)
297 cpa->numpages = numpages;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100298
299 /*
300 * We are safe now. Check whether the new pgprot is the same:
301 */
302 old_pte = *kpte;
303 old_prot = new_prot = pte_pgprot(old_pte);
304
305 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
306 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100307
308 /*
309 * old_pte points to the large page base address. So we need
310 * to add the offset of the virtual address:
311 */
312 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
313 cpa->pfn = pfn;
314
315 new_prot = static_protections(new_prot, address, pfn);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100316
317 /*
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100318 * We need to check the full range, whether
319 * static_protection() requires a different pgprot for one of
320 * the pages in the range we try to preserve:
321 */
322 addr = address + PAGE_SIZE;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100323 pfn++;
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100324 for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100325 pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
Thomas Gleixnerfac84932008-02-09 23:24:09 +0100326
327 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
328 goto out_unlock;
329 }
330
331 /*
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100332 * If there are no changes, return. maxpages has been updated
333 * above:
334 */
335 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
Ingo Molnarbeaff632008-02-04 16:48:09 +0100336 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100337 goto out_unlock;
338 }
339
340 /*
341 * We need to change the attributes. Check, whether we can
342 * change the large page in one go. We request a split, when
343 * the address is not aligned and the number of pages is
344 * smaller than the number of pages in the large page. Note
345 * that we limited the number of possible pages already to
346 * the number of pages in the large page.
347 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100348 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100349 /*
350 * The address is aligned and the number of pages
351 * covers the full page.
352 */
353 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
354 __set_pmd_pte(kpte, address, new_pte);
355 cpa->flushtlb = 1;
Ingo Molnarbeaff632008-02-04 16:48:09 +0100356 do_split = 0;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100357 }
358
359out_unlock:
360 spin_unlock_irqrestore(&pgd_lock, flags);
Ingo Molnar9df84992008-02-04 16:48:09 +0100361
Ingo Molnarbeaff632008-02-04 16:48:09 +0100362 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100363}
364
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100365static LIST_HEAD(page_pool);
366static unsigned long pool_size, pool_pages, pool_low;
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100367static unsigned long pool_used, pool_failed;
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100368
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100369static void cpa_fill_pool(struct page **ret)
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100370{
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100371 gfp_t gfp = GFP_KERNEL;
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100372 unsigned long flags;
373 struct page *p;
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100374
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100375 /*
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100376 * Avoid recursion (on debug-pagealloc) and also signal
377 * our priority to get to these pagetables:
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100378 */
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100379 if (current->flags & PF_MEMALLOC)
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100380 return;
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100381 current->flags |= PF_MEMALLOC;
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100382
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100383 /*
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100384 * Allocate atomically from atomic contexts:
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100385 */
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100386 if (in_atomic() || irqs_disabled() || debug_pagealloc)
387 gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN;
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100388
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100389 while (pool_pages < pool_size || (ret && !*ret)) {
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100390 p = alloc_pages(gfp, 0);
391 if (!p) {
392 pool_failed++;
393 break;
394 }
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100395 /*
396 * If the call site needs a page right now, provide it:
397 */
398 if (ret && !*ret) {
399 *ret = p;
400 continue;
401 }
402 spin_lock_irqsave(&pgd_lock, flags);
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100403 list_add(&p->lru, &page_pool);
404 pool_pages++;
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100405 spin_unlock_irqrestore(&pgd_lock, flags);
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100406 }
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100407
408 current->flags &= ~PF_MEMALLOC;
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100409}
410
411#define SHIFT_MB (20 - PAGE_SHIFT)
412#define ROUND_MB_GB ((1 << 10) - 1)
413#define SHIFT_MB_GB 10
414#define POOL_PAGES_PER_GB 16
415
416void __init cpa_init(void)
417{
418 struct sysinfo si;
419 unsigned long gb;
420
421 si_meminfo(&si);
422 /*
423 * Calculate the number of pool pages:
424 *
425 * Convert totalram (nr of pages) to MiB and round to the next
426 * GiB. Shift MiB to Gib and multiply the result by
427 * POOL_PAGES_PER_GB:
428 */
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100429 if (debug_pagealloc) {
430 gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB;
431 pool_size = POOL_PAGES_PER_GB * gb;
432 } else {
433 pool_size = 1;
434 }
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100435 pool_low = pool_size;
436
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100437 cpa_fill_pool(NULL);
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100438 printk(KERN_DEBUG
439 "CPA: page pool initialized %lu of %lu pages preallocated\n",
440 pool_pages, pool_size);
441}
442
Ingo Molnar7afe15b2008-01-30 13:33:57 +0100443static int split_large_page(pte_t *kpte, unsigned long address)
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100444{
Thomas Gleixner7b610ee2008-02-04 16:48:10 +0100445 unsigned long flags, pfn, pfninc = 1;
Ingo Molnar86f03982008-01-30 13:34:09 +0100446 unsigned int i, level;
Ingo Molnar9df84992008-02-04 16:48:09 +0100447 pte_t *pbase, *tmp;
448 pgprot_t ref_prot;
449 struct page *base;
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100450
Thomas Gleixnereb5b5f02008-02-09 23:24:09 +0100451 /*
452 * Get a page from the pool. The pool list is protected by the
453 * pgd_lock, which we have to take anyway for the split
454 * operation:
455 */
Ingo Molnar9a3dc782008-01-30 13:33:57 +0100456 spin_lock_irqsave(&pgd_lock, flags);
Thomas Gleixnereb5b5f02008-02-09 23:24:09 +0100457 if (list_empty(&page_pool)) {
458 spin_unlock_irqrestore(&pgd_lock, flags);
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100459 base = NULL;
460 cpa_fill_pool(&base);
461 if (!base)
462 return -ENOMEM;
463 spin_lock_irqsave(&pgd_lock, flags);
464 } else {
465 base = list_first_entry(&page_pool, struct page, lru);
466 list_del(&base->lru);
467 pool_pages--;
468
469 if (pool_pages < pool_low)
470 pool_low = pool_pages;
Thomas Gleixnereb5b5f02008-02-09 23:24:09 +0100471 }
472
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100473 /*
474 * Check for races, another CPU might have split this page
475 * up for us already:
476 */
477 tmp = lookup_address(address, &level);
Ingo Molnar6ce9fc12008-02-04 16:48:08 +0100478 if (tmp != kpte)
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100479 goto out_unlock;
480
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100481 pbase = (pte_t *)page_address(base);
Ingo Molnar44af6c42008-01-30 13:34:03 +0100482#ifdef CONFIG_X86_32
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100483 paravirt_alloc_pt(&init_mm, page_to_pfn(base));
Ingo Molnar44af6c42008-01-30 13:34:03 +0100484#endif
Thomas Gleixner07cf89c2008-02-04 16:48:08 +0100485 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100486
Andi Kleenf07333f2008-02-04 16:48:09 +0100487#ifdef CONFIG_X86_64
488 if (level == PG_LEVEL_1G) {
489 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
490 pgprot_val(ref_prot) |= _PAGE_PSE;
Andi Kleenf07333f2008-02-04 16:48:09 +0100491 }
492#endif
493
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100494 /*
495 * Get the target pfn from the original entry:
496 */
497 pfn = pte_pfn(*kpte);
Andi Kleenf07333f2008-02-04 16:48:09 +0100498 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
Thomas Gleixner63c1dcf2008-02-04 16:48:05 +0100499 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100500
501 /*
Thomas Gleixner07cf89c2008-02-04 16:48:08 +0100502 * Install the new, split up pagetable. Important details here:
Huang, Ying4c881ca2008-01-30 13:34:04 +0100503 *
504 * On Intel the NX bit of all levels must be cleared to make a
505 * page executable. See section 4.13.2 of Intel 64 and IA-32
506 * Architectures Software Developer's Manual).
Thomas Gleixner07cf89c2008-02-04 16:48:08 +0100507 *
508 * Mark the entry present. The current mapping might be
509 * set to not present, which we preserved above.
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100510 */
Huang, Ying4c881ca2008-01-30 13:34:04 +0100511 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
Thomas Gleixner07cf89c2008-02-04 16:48:08 +0100512 pgprot_val(ref_prot) |= _PAGE_PRESENT;
Ingo Molnar9a3dc782008-01-30 13:33:57 +0100513 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100514 base = NULL;
515
516out_unlock:
Thomas Gleixnereb5b5f02008-02-09 23:24:09 +0100517 /*
518 * If we dropped out via the lookup_address check under
519 * pgd_lock then stick the page back into the pool:
520 */
521 if (base) {
522 list_add(&base->lru, &page_pool);
523 pool_pages++;
524 } else
525 pool_used++;
Ingo Molnar9a3dc782008-01-30 13:33:57 +0100526 spin_unlock_irqrestore(&pgd_lock, flags);
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100527
Ingo Molnarbb5c2db2008-01-30 13:33:56 +0100528 return 0;
529}
530
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100531static int __change_page_attr(struct cpa_data *cpa, int primary)
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100532{
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100533 unsigned long address = cpa->vaddr;
Harvey Harrisonda7bfc52008-02-09 23:24:08 +0100534 int do_split, err;
535 unsigned int level;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100536 pte_t *kpte, old_pte;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537
Ingo Molnar97f99fe2008-01-30 13:33:55 +0100538repeat:
Ingo Molnarf0646e42008-01-30 13:33:43 +0100539 kpte = lookup_address(address, &level);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700540 if (!kpte)
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100541 return primary ? -EINVAL : 0;
542
543 old_pte = *kpte;
544 if (!pte_val(old_pte)) {
545 if (!primary)
546 return 0;
547 printk(KERN_WARNING "CPA: called for zero pte. "
548 "vaddr = %lx cpa->vaddr = %lx\n", address,
549 cpa->vaddr);
550 WARN_ON(1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700551 return -EINVAL;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100552 }
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100553
Thomas Gleixner30551bb2008-01-30 13:34:04 +0100554 if (level == PG_LEVEL_4K) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100555 pte_t new_pte;
Arjan van de Ven626c2c92008-02-04 16:48:05 +0100556 pgprot_t new_prot = pte_pgprot(old_pte);
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100557 unsigned long pfn = pte_pfn(old_pte);
Thomas Gleixnera72a08a2008-01-30 13:34:07 +0100558
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100559 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
560 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
Ingo Molnar86f03982008-01-30 13:34:09 +0100561
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100562 new_prot = static_protections(new_prot, address, pfn);
Ingo Molnar86f03982008-01-30 13:34:09 +0100563
Arjan van de Ven626c2c92008-02-04 16:48:05 +0100564 /*
565 * We need to keep the pfn from the existing PTE,
566 * after all we're only going to change it's attributes
567 * not the memory it points to
568 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100569 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
570 cpa->pfn = pfn;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +0100571 /*
572 * Do we really change anything ?
573 */
574 if (pte_val(old_pte) != pte_val(new_pte)) {
575 set_pte_atomic(kpte, new_pte);
576 cpa->flushtlb = 1;
577 }
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100578 cpa->numpages = 1;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100579 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700580 }
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100581
582 /*
583 * Check, whether we can keep the large page intact
584 * and just change the pte:
585 */
Ingo Molnarbeaff632008-02-04 16:48:09 +0100586 do_split = try_preserve_large_page(kpte, address, cpa);
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100587 /*
588 * When the range fits into the existing large page,
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100589 * return. cp->numpages and cpa->tlbflush have been updated in
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100590 * try_large_page:
591 */
Ingo Molnar87f7f8f2008-02-04 16:48:10 +0100592 if (do_split <= 0)
593 return do_split;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100594
595 /*
596 * We have to split the large page:
597 */
Ingo Molnar87f7f8f2008-02-04 16:48:10 +0100598 err = split_large_page(kpte, address);
599 if (!err) {
600 cpa->flushtlb = 1;
601 goto repeat;
602 }
Ingo Molnarbeaff632008-02-04 16:48:09 +0100603
Ingo Molnar87f7f8f2008-02-04 16:48:10 +0100604 return err;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100605}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100607static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
608
609static int cpa_process_alias(struct cpa_data *cpa)
Ingo Molnar44af6c42008-01-30 13:34:03 +0100610{
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100611 struct cpa_data alias_cpa;
Thomas Gleixnerf34b4392008-02-15 22:17:57 +0100612 int ret = 0;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100613
614 if (cpa->pfn > max_pfn_mapped)
615 return 0;
616
Thomas Gleixnerf34b4392008-02-15 22:17:57 +0100617 /*
618 * No need to redo, when the primary call touched the direct
619 * mapping already:
620 */
621 if (!within(cpa->vaddr, PAGE_OFFSET,
622 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100623
Thomas Gleixnerf34b4392008-02-15 22:17:57 +0100624 alias_cpa = *cpa;
625 alias_cpa.vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
626
627 ret = __change_page_attr_set_clr(&alias_cpa, 0);
628 }
Ingo Molnar44af6c42008-01-30 13:34:03 +0100629
Arjan van de Ven488fd992008-01-30 13:34:07 +0100630#ifdef CONFIG_X86_64
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100631 if (ret)
632 return ret;
Thomas Gleixner08797502008-01-30 13:34:09 +0100633 /*
Thomas Gleixnerf34b4392008-02-15 22:17:57 +0100634 * No need to redo, when the primary call touched the high
635 * mapping already:
636 */
637 if (within(cpa->vaddr, (unsigned long) _text, (unsigned long) _end))
638 return 0;
639
640 /*
Thomas Gleixner08797502008-01-30 13:34:09 +0100641 * If the physical address is inside the kernel map, we need
642 * to touch the high mapped kernel as well:
643 */
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100644 if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
645 return 0;
Thomas Gleixner08797502008-01-30 13:34:09 +0100646
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100647 alias_cpa = *cpa;
648 alias_cpa.vaddr =
649 (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
650
651 /*
652 * The high mapping range is imprecise, so ignore the return value.
653 */
654 __change_page_attr_set_clr(&alias_cpa, 0);
Thomas Gleixner08797502008-01-30 13:34:09 +0100655#endif
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100656 return ret;
Ingo Molnar44af6c42008-01-30 13:34:03 +0100657}
658
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100659static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
Thomas Gleixnerff314522008-01-30 13:34:08 +0100660{
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100661 int ret, numpages = cpa->numpages;
Thomas Gleixnerff314522008-01-30 13:34:08 +0100662
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100663 while (numpages) {
664 /*
665 * Store the remaining nr of pages for the large page
666 * preservation check.
667 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100668 cpa->numpages = numpages;
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100669
670 ret = __change_page_attr(cpa, checkalias);
Thomas Gleixnerff314522008-01-30 13:34:08 +0100671 if (ret)
672 return ret;
Thomas Gleixnerff314522008-01-30 13:34:08 +0100673
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100674 if (checkalias) {
675 ret = cpa_process_alias(cpa);
676 if (ret)
677 return ret;
678 }
679
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100680 /*
681 * Adjust the number of pages with the result of the
682 * CPA operation. Either a large page has been
683 * preserved or a single page update happened.
684 */
Rafael J. Wysocki9b5cf482008-03-03 01:17:37 +0100685 BUG_ON(cpa->numpages > numpages);
686 numpages -= cpa->numpages;
687 cpa->vaddr += cpa->numpages * PAGE_SIZE;
Thomas Gleixner65e074d2008-02-04 16:48:07 +0100688 }
Thomas Gleixnerff314522008-01-30 13:34:08 +0100689 return 0;
690}
691
Andi Kleen6bb83832008-02-04 16:48:06 +0100692static inline int cache_attr(pgprot_t attr)
693{
694 return pgprot_val(attr) &
695 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
696}
697
Thomas Gleixnerff314522008-01-30 13:34:08 +0100698static int change_page_attr_set_clr(unsigned long addr, int numpages,
699 pgprot_t mask_set, pgprot_t mask_clr)
700{
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100701 struct cpa_data cpa;
Thomas Gleixneraf96e442008-02-15 21:49:46 +0100702 int ret, cache, checkalias;
Thomas Gleixner331e4062008-02-04 16:48:06 +0100703
704 /*
705 * Check, if we are requested to change a not supported
706 * feature:
707 */
708 mask_set = canon_pgprot(mask_set);
709 mask_clr = canon_pgprot(mask_clr);
710 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr))
711 return 0;
712
Thomas Gleixner69b14152008-02-13 11:04:50 +0100713 /* Ensure we are PAGE_SIZE aligned */
714 if (addr & ~PAGE_MASK) {
715 addr &= PAGE_MASK;
716 /*
717 * People should not be passing in unaligned addresses:
718 */
719 WARN_ON_ONCE(1);
720 }
721
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100722 cpa.vaddr = addr;
723 cpa.numpages = numpages;
724 cpa.mask_set = mask_set;
725 cpa.mask_clr = mask_clr;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +0100726 cpa.flushtlb = 0;
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100727
Thomas Gleixneraf96e442008-02-15 21:49:46 +0100728 /* No alias checking for _NX bit modifications */
729 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
730
731 ret = __change_page_attr_set_clr(&cpa, checkalias);
Thomas Gleixnerff314522008-01-30 13:34:08 +0100732
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100733 /*
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +0100734 * Check whether we really changed something:
735 */
736 if (!cpa.flushtlb)
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100737 goto out;
Thomas Gleixnerf4ae5da2008-02-04 16:48:07 +0100738
739 /*
Andi Kleen6bb83832008-02-04 16:48:06 +0100740 * No need to flush, when we did not set any of the caching
741 * attributes:
742 */
743 cache = cache_attr(mask_set);
744
745 /*
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100746 * On success we use clflush, when the CPU supports it to
747 * avoid the wbindv. If the CPU does not support it and in the
Thomas Gleixneraf1e6842008-01-30 13:34:08 +0100748 * error case we fall back to cpa_flush_all (which uses
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100749 * wbindv):
750 */
751 if (!ret && cpu_has_clflush)
Andi Kleen6bb83832008-02-04 16:48:06 +0100752 cpa_flush_range(addr, numpages, cache);
Thomas Gleixner57a6a462008-01-30 13:34:08 +0100753 else
Andi Kleen6bb83832008-02-04 16:48:06 +0100754 cpa_flush_all(cache);
Thomas Gleixnerff314522008-01-30 13:34:08 +0100755
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100756out:
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100757 cpa_fill_pool(NULL);
758
Thomas Gleixnerff314522008-01-30 13:34:08 +0100759 return ret;
760}
761
Thomas Gleixner56744542008-01-30 13:34:08 +0100762static inline int change_page_attr_set(unsigned long addr, int numpages,
763 pgprot_t mask)
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100764{
Thomas Gleixner56744542008-01-30 13:34:08 +0100765 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0));
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100766}
767
Thomas Gleixner56744542008-01-30 13:34:08 +0100768static inline int change_page_attr_clear(unsigned long addr, int numpages,
769 pgprot_t mask)
Thomas Gleixner72932c72008-01-30 13:34:08 +0100770{
Huang, Ying58270402008-01-31 22:05:43 +0100771 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask);
Thomas Gleixner72932c72008-01-30 13:34:08 +0100772}
773
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -0700774int _set_memory_uc(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100775{
Thomas Gleixner72932c72008-01-30 13:34:08 +0100776 return change_page_attr_set(addr, numpages,
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700777 __pgprot(_PAGE_CACHE_UC));
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100778}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -0700779
780int set_memory_uc(unsigned long addr, int numpages)
781{
782 if (reserve_memtype(addr, addr + numpages * PAGE_SIZE,
783 _PAGE_CACHE_UC, NULL))
784 return -EINVAL;
785
786 return _set_memory_uc(addr, numpages);
787}
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100788EXPORT_SYMBOL(set_memory_uc);
789
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -0700790int _set_memory_wb(unsigned long addr, int numpages)
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100791{
Thomas Gleixner72932c72008-01-30 13:34:08 +0100792 return change_page_attr_clear(addr, numpages,
venkatesh.pallipadi@intel.com2e5d9c82008-03-18 17:00:14 -0700793 __pgprot(_PAGE_CACHE_MASK));
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100794}
venkatesh.pallipadi@intel.com12193332008-03-18 17:00:18 -0700795
796int set_memory_wb(unsigned long addr, int numpages)
797{
798 free_memtype(addr, addr + numpages * PAGE_SIZE);
799
800 return _set_memory_wb(addr, numpages);
801}
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100802EXPORT_SYMBOL(set_memory_wb);
803
804int set_memory_x(unsigned long addr, int numpages)
805{
Thomas Gleixner72932c72008-01-30 13:34:08 +0100806 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100807}
808EXPORT_SYMBOL(set_memory_x);
809
810int set_memory_nx(unsigned long addr, int numpages)
811{
Thomas Gleixner72932c72008-01-30 13:34:08 +0100812 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100813}
814EXPORT_SYMBOL(set_memory_nx);
815
816int set_memory_ro(unsigned long addr, int numpages)
817{
Thomas Gleixner72932c72008-01-30 13:34:08 +0100818 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100819}
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100820
821int set_memory_rw(unsigned long addr, int numpages)
822{
Thomas Gleixner72932c72008-01-30 13:34:08 +0100823 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100824}
Ingo Molnarf62d0f02008-01-30 13:34:07 +0100825
826int set_memory_np(unsigned long addr, int numpages)
827{
Thomas Gleixner72932c72008-01-30 13:34:08 +0100828 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
Ingo Molnarf62d0f02008-01-30 13:34:07 +0100829}
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100830
831int set_pages_uc(struct page *page, int numpages)
832{
833 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100834
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100835 return set_memory_uc(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100836}
837EXPORT_SYMBOL(set_pages_uc);
838
839int set_pages_wb(struct page *page, int numpages)
840{
841 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100842
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100843 return set_memory_wb(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100844}
845EXPORT_SYMBOL(set_pages_wb);
846
847int set_pages_x(struct page *page, int numpages)
848{
849 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100850
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100851 return set_memory_x(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100852}
853EXPORT_SYMBOL(set_pages_x);
854
855int set_pages_nx(struct page *page, int numpages)
856{
857 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100858
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100859 return set_memory_nx(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100860}
861EXPORT_SYMBOL(set_pages_nx);
862
863int set_pages_ro(struct page *page, int numpages)
864{
865 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100866
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100867 return set_memory_ro(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100868}
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100869
870int set_pages_rw(struct page *page, int numpages)
871{
872 unsigned long addr = (unsigned long)page_address(page);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100873
Thomas Gleixnerd7c8f212008-01-30 13:34:07 +0100874 return set_memory_rw(addr, numpages);
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100875}
Arjan van de Ven75cbade2008-01-30 13:34:06 +0100876
Linus Torvalds1da177e2005-04-16 15:20:36 -0700877#ifdef CONFIG_DEBUG_PAGEALLOC
Ingo Molnarf62d0f02008-01-30 13:34:07 +0100878
879static int __set_pages_p(struct page *page, int numpages)
880{
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100881 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
882 .numpages = numpages,
883 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
884 .mask_clr = __pgprot(0)};
Thomas Gleixner72932c72008-01-30 13:34:08 +0100885
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100886 return __change_page_attr_set_clr(&cpa, 1);
Ingo Molnarf62d0f02008-01-30 13:34:07 +0100887}
888
889static int __set_pages_np(struct page *page, int numpages)
890{
Thomas Gleixner72e458d2008-02-04 16:48:07 +0100891 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
892 .numpages = numpages,
893 .mask_set = __pgprot(0),
894 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
Thomas Gleixner72932c72008-01-30 13:34:08 +0100895
Thomas Gleixnerc31c7d42008-02-18 20:54:14 +0100896 return __change_page_attr_set_clr(&cpa, 1);
Ingo Molnarf62d0f02008-01-30 13:34:07 +0100897}
898
Linus Torvalds1da177e2005-04-16 15:20:36 -0700899void kernel_map_pages(struct page *page, int numpages, int enable)
900{
901 if (PageHighMem(page))
902 return;
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100903 if (!enable) {
Ingo Molnarf9b84042006-06-27 02:54:49 -0700904 debug_check_no_locks_freed(page_address(page),
905 numpages * PAGE_SIZE);
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100906 }
Ingo Molnarde5097c2006-01-09 15:59:21 -0800907
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100908 /*
Ingo Molnar12d6f212008-01-30 13:33:58 +0100909 * If page allocator is not up yet then do not call c_p_a():
910 */
911 if (!debug_pagealloc_enabled)
912 return;
913
914 /*
Ingo Molnarf8d84062008-02-13 14:09:53 +0100915 * The return value is ignored as the calls cannot fail.
916 * Large pages are kept enabled at boot time, and are
917 * split up quickly with DEBUG_PAGEALLOC. If a splitup
918 * fails here (due to temporary memory shortage) no damage
919 * is done because we just keep the largepage intact up
920 * to the next attempt when it will likely be split up:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700921 */
Ingo Molnarf62d0f02008-01-30 13:34:07 +0100922 if (enable)
923 __set_pages_p(page, numpages);
924 else
925 __set_pages_np(page, numpages);
Ingo Molnar9f4c8152008-01-30 13:33:41 +0100926
927 /*
Ingo Molnare4b71dc2008-01-30 13:34:04 +0100928 * We should perform an IPI and flush all tlbs,
929 * but that can deadlock->flush only current cpu:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700930 */
931 __flush_tlb_all();
Thomas Gleixner76ebd052008-02-09 23:24:09 +0100932
933 /*
934 * Try to refill the page pool here. We can do this only after
935 * the tlb flush.
936 */
Ingo Molnar92cb54a2008-02-13 14:37:52 +0100937 cpa_fill_pool(NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700938}
Rafael J. Wysocki8a235ef2008-02-20 01:47:44 +0100939
Thomas Gleixneree7ae7a2008-04-17 17:40:45 +0200940#ifdef CONFIG_DEBUG_FS
941static int dpa_show(struct seq_file *m, void *v)
942{
943 seq_puts(m, "DEBUG_PAGEALLOC\n");
944 seq_printf(m, "pool_size : %lu\n", pool_size);
945 seq_printf(m, "pool_pages : %lu\n", pool_pages);
946 seq_printf(m, "pool_low : %lu\n", pool_low);
947 seq_printf(m, "pool_used : %lu\n", pool_used);
948 seq_printf(m, "pool_failed : %lu\n", pool_failed);
949
950 return 0;
951}
952
953static int dpa_open(struct inode *inode, struct file *filp)
954{
955 return single_open(filp, dpa_show, NULL);
956}
957
958static const struct file_operations dpa_fops = {
959 .open = dpa_open,
960 .read = seq_read,
961 .llseek = seq_lseek,
962 .release = single_release,
963};
964
965int __init debug_pagealloc_proc_init(void)
966{
967 struct dentry *de;
968
969 de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL,
970 &dpa_fops);
971 if (!de)
972 return -ENOMEM;
973
974 return 0;
975}
976__initcall(debug_pagealloc_proc_init);
977#endif
978
Rafael J. Wysocki8a235ef2008-02-20 01:47:44 +0100979#ifdef CONFIG_HIBERNATION
980
981bool kernel_page_present(struct page *page)
982{
983 unsigned int level;
984 pte_t *pte;
985
986 if (PageHighMem(page))
987 return false;
988
989 pte = lookup_address((unsigned long)page_address(page), &level);
990 return (pte_val(*pte) & _PAGE_PRESENT);
991}
992
993#endif /* CONFIG_HIBERNATION */
994
995#endif /* CONFIG_DEBUG_PAGEALLOC */
Arjan van de Vend1028a12008-01-30 13:34:07 +0100996
997/*
998 * The testcases use internal knowledge of the implementation that shouldn't
999 * be exposed to the rest of the kernel. Include these directly here.
1000 */
1001#ifdef CONFIG_CPA_DEBUG
1002#include "pageattr-test.c"
1003#endif