John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify it |
| 3 | * under the terms of the GNU General Public License version 2 as published |
| 4 | * by the Free Software Foundation. |
| 5 | * |
| 6 | * Copyright (C) 2010 John Crispin <blogic@openwrt.org> |
| 7 | */ |
| 8 | |
| 9 | #include <linux/init.h> |
| 10 | #include <linux/io.h> |
| 11 | #include <linux/ioport.h> |
| 12 | #include <linux/pm.h> |
John Crispin | 4af92e7 | 2011-11-10 21:33:07 +0100 | [diff] [blame] | 13 | #include <linux/export.h> |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame] | 14 | #include <linux/delay.h> |
| 15 | #include <linux/of_address.h> |
| 16 | #include <linux/of_platform.h> |
| 17 | |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 18 | #include <asm/reboot.h> |
| 19 | |
| 20 | #include <lantiq_soc.h> |
| 21 | |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame] | 22 | #include "../prom.h" |
| 23 | |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 24 | #define ltq_rcu_w32(x, y) ltq_w32((x), ltq_rcu_membase + (y)) |
| 25 | #define ltq_rcu_r32(x) ltq_r32(ltq_rcu_membase + (x)) |
| 26 | |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame] | 27 | /* reset request register */ |
| 28 | #define RCU_RST_REQ 0x0010 |
| 29 | /* reset status register */ |
| 30 | #define RCU_RST_STAT 0x0014 |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 31 | |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame] | 32 | /* reboot bit */ |
| 33 | #define RCU_RD_SRST BIT(30) |
| 34 | /* reset cause */ |
| 35 | #define RCU_STAT_SHIFT 26 |
| 36 | /* boot selection */ |
| 37 | #define RCU_BOOT_SEL_SHIFT 26 |
| 38 | #define RCU_BOOT_SEL_MASK 0x7 |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 39 | |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 40 | /* remapped base addr of the reset control unit */ |
| 41 | static void __iomem *ltq_rcu_membase; |
| 42 | |
| 43 | /* This function is used by the watchdog driver */ |
| 44 | int ltq_reset_cause(void) |
| 45 | { |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame] | 46 | u32 val = ltq_rcu_r32(RCU_RST_STAT); |
| 47 | return val >> RCU_STAT_SHIFT; |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 48 | } |
| 49 | EXPORT_SYMBOL_GPL(ltq_reset_cause); |
| 50 | |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame] | 51 | /* allow platform code to find out what source we booted from */ |
| 52 | unsigned char ltq_boot_select(void) |
| 53 | { |
| 54 | u32 val = ltq_rcu_r32(RCU_RST_STAT); |
| 55 | return (val >> RCU_BOOT_SEL_SHIFT) & RCU_BOOT_SEL_MASK; |
| 56 | } |
| 57 | |
| 58 | /* reset a io domain for u micro seconds */ |
| 59 | void ltq_reset_once(unsigned int module, ulong u) |
| 60 | { |
| 61 | ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ); |
| 62 | udelay(u); |
| 63 | ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~module, RCU_RST_REQ); |
| 64 | } |
| 65 | |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 66 | static void ltq_machine_restart(char *command) |
| 67 | { |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 68 | local_irq_disable(); |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame] | 69 | ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | RCU_RD_SRST, RCU_RST_REQ); |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 70 | unreachable(); |
| 71 | } |
| 72 | |
| 73 | static void ltq_machine_halt(void) |
| 74 | { |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 75 | local_irq_disable(); |
| 76 | unreachable(); |
| 77 | } |
| 78 | |
| 79 | static void ltq_machine_power_off(void) |
| 80 | { |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 81 | local_irq_disable(); |
| 82 | unreachable(); |
| 83 | } |
| 84 | |
| 85 | static int __init mips_reboot_setup(void) |
| 86 | { |
John Crispin | a039222 | 2012-04-13 20:56:13 +0200 | [diff] [blame] | 87 | struct resource res; |
| 88 | struct device_node *np = |
| 89 | of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway"); |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 90 | |
John Crispin | a039222 | 2012-04-13 20:56:13 +0200 | [diff] [blame] | 91 | /* check if all the reset register range is available */ |
| 92 | if (!np) |
| 93 | panic("Failed to load reset resources from devicetree"); |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 94 | |
John Crispin | a039222 | 2012-04-13 20:56:13 +0200 | [diff] [blame] | 95 | if (of_address_to_resource(np, 0, &res)) |
| 96 | panic("Failed to get rcu memory range"); |
| 97 | |
| 98 | if (request_mem_region(res.start, resource_size(&res), res.name) < 0) |
| 99 | pr_err("Failed to request rcu memory"); |
| 100 | |
| 101 | ltq_rcu_membase = ioremap_nocache(res.start, resource_size(&res)); |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 102 | if (!ltq_rcu_membase) |
John Crispin | 6697c69 | 2012-04-30 11:33:09 +0200 | [diff] [blame] | 103 | panic("Failed to remap core memory"); |
John Crispin | 8ec6d93 | 2011-03-30 09:27:48 +0200 | [diff] [blame] | 104 | |
| 105 | _machine_restart = ltq_machine_restart; |
| 106 | _machine_halt = ltq_machine_halt; |
| 107 | pm_power_off = ltq_machine_power_off; |
| 108 | |
| 109 | return 0; |
| 110 | } |
| 111 | |
| 112 | arch_initcall(mips_reboot_setup); |