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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* mga_state.c -- State support for MGA G200/G400 -*- linux-c -*-
2 * Created: Thu Jan 27 02:53:43 2000 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Authors:
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 * Rewritten by:
32 * Gareth Hughes <gareth@valinux.com>
33 */
34
35#include "drmP.h"
36#include "drm.h"
37#include "mga_drm.h"
38#include "mga_drv.h"
39
40/* ================================================================
41 * DMA hardware state programming functions
42 */
43
Dave Airlieb5e89ed2005-09-25 14:28:13 +100044static void mga_emit_clip_rect(drm_mga_private_t * dev_priv,
Dave Airlieeddca552007-07-11 16:09:54 +100045 struct drm_clip_rect * box)
Linus Torvalds1da177e2005-04-16 15:20:36 -070046{
47 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
48 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
49 unsigned int pitch = dev_priv->front_pitch;
50 DMA_LOCALS;
51
Dave Airlieb5e89ed2005-09-25 14:28:13 +100052 BEGIN_DMA(2);
Linus Torvalds1da177e2005-04-16 15:20:36 -070053
54 /* Force reset of DWGCTL on G400 (eliminates clip disable bit).
55 */
Dave Airliee29971f2005-10-20 23:49:00 +010056 if (dev_priv->chipset >= MGA_CARD_TYPE_G400) {
Dave Airlie6795c982005-07-10 18:20:09 +100057 DMA_BLOCK(MGA_DWGCTL, ctx->dwgctl,
58 MGA_LEN + MGA_EXEC, 0x80000000,
59 MGA_DWGCTL, ctx->dwgctl,
60 MGA_LEN + MGA_EXEC, 0x80000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 }
Dave Airlie6795c982005-07-10 18:20:09 +100062 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
63 MGA_CXBNDRY, ((box->x2 - 1) << 16) | box->x1,
Dave Airlieb5e89ed2005-09-25 14:28:13 +100064 MGA_YTOP, box->y1 * pitch, MGA_YBOT, (box->y2 - 1) * pitch);
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
66 ADVANCE_DMA();
67}
68
Dave Airlieb5e89ed2005-09-25 14:28:13 +100069static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -070070{
71 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
72 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
73 DMA_LOCALS;
74
Dave Airlieb5e89ed2005-09-25 14:28:13 +100075 BEGIN_DMA(3);
Linus Torvalds1da177e2005-04-16 15:20:36 -070076
Dave Airlieb5e89ed2005-09-25 14:28:13 +100077 DMA_BLOCK(MGA_DSTORG, ctx->dstorg,
78 MGA_MACCESS, ctx->maccess,
79 MGA_PLNWT, ctx->plnwt, MGA_DWGCTL, ctx->dwgctl);
Linus Torvalds1da177e2005-04-16 15:20:36 -070080
Dave Airlieb5e89ed2005-09-25 14:28:13 +100081 DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl,
82 MGA_FOGCOL, ctx->fogcolor,
83 MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -070084
Dave Airlieb5e89ed2005-09-25 14:28:13 +100085 DMA_BLOCK(MGA_FCOL, ctx->fcol,
86 MGA_DMAPAD, 0x00000000,
87 MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088
89 ADVANCE_DMA();
90}
91
Dave Airlieb5e89ed2005-09-25 14:28:13 +100092static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -070093{
94 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
95 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
96 DMA_LOCALS;
97
Dave Airlieb5e89ed2005-09-25 14:28:13 +100098 BEGIN_DMA(4);
Linus Torvalds1da177e2005-04-16 15:20:36 -070099
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000100 DMA_BLOCK(MGA_DSTORG, ctx->dstorg,
101 MGA_MACCESS, ctx->maccess,
102 MGA_PLNWT, ctx->plnwt, MGA_DWGCTL, ctx->dwgctl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000104 DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl,
105 MGA_FOGCOL, ctx->fogcolor,
106 MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700107
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000108 DMA_BLOCK(MGA_WFLAG1, ctx->wflag,
109 MGA_TDUALSTAGE0, ctx->tdualstage0,
110 MGA_TDUALSTAGE1, ctx->tdualstage1, MGA_FCOL, ctx->fcol);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000112 DMA_BLOCK(MGA_STENCIL, ctx->stencil,
113 MGA_STENCILCTL, ctx->stencilctl,
114 MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700115
116 ADVANCE_DMA();
117}
118
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000119static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120{
121 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
122 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
123 DMA_LOCALS;
124
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000125 BEGIN_DMA(4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000127 DMA_BLOCK(MGA_TEXCTL2, tex->texctl2,
128 MGA_TEXCTL, tex->texctl,
129 MGA_TEXFILTER, tex->texfilter,
130 MGA_TEXBORDERCOL, tex->texbordercol);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000132 DMA_BLOCK(MGA_TEXORG, tex->texorg,
133 MGA_TEXORG1, tex->texorg1,
134 MGA_TEXORG2, tex->texorg2, MGA_TEXORG3, tex->texorg3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000136 DMA_BLOCK(MGA_TEXORG4, tex->texorg4,
137 MGA_TEXWIDTH, tex->texwidth,
138 MGA_TEXHEIGHT, tex->texheight, MGA_WR24, tex->texwidth);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000140 DMA_BLOCK(MGA_WR34, tex->texheight,
141 MGA_TEXTRANS, 0x0000ffff,
142 MGA_TEXTRANSHIGH, 0x0000ffff, MGA_DMAPAD, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143
144 ADVANCE_DMA();
145}
146
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000147static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148{
149 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
150 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
151 DMA_LOCALS;
152
Dave Airliebc5f4522007-11-05 12:50:58 +1000153/* printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */
154/* tex->texctl, tex->texctl2); */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000156 BEGIN_DMA(6);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000158 DMA_BLOCK(MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC,
159 MGA_TEXCTL, tex->texctl,
160 MGA_TEXFILTER, tex->texfilter,
161 MGA_TEXBORDERCOL, tex->texbordercol);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000163 DMA_BLOCK(MGA_TEXORG, tex->texorg,
164 MGA_TEXORG1, tex->texorg1,
165 MGA_TEXORG2, tex->texorg2, MGA_TEXORG3, tex->texorg3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700166
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000167 DMA_BLOCK(MGA_TEXORG4, tex->texorg4,
168 MGA_TEXWIDTH, tex->texwidth,
169 MGA_TEXHEIGHT, tex->texheight, MGA_WR49, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000171 DMA_BLOCK(MGA_WR57, 0x00000000,
172 MGA_WR53, 0x00000000,
173 MGA_WR61, 0x00000000, MGA_WR52, MGA_G400_WR_MAGIC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000175 DMA_BLOCK(MGA_WR60, MGA_G400_WR_MAGIC,
176 MGA_WR54, tex->texwidth | MGA_G400_WR_MAGIC,
177 MGA_WR62, tex->texheight | MGA_G400_WR_MAGIC,
178 MGA_DMAPAD, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000180 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
181 MGA_DMAPAD, 0x00000000,
182 MGA_TEXTRANS, 0x0000ffff, MGA_TEXTRANSHIGH, 0x0000ffff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183
184 ADVANCE_DMA();
185}
186
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000187static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700188{
189 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
190 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
191 DMA_LOCALS;
192
Dave Airliebc5f4522007-11-05 12:50:58 +1000193/* printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg, */
194/* tex->texctl, tex->texctl2); */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000196 BEGIN_DMA(5);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000198 DMA_BLOCK(MGA_TEXCTL2, (tex->texctl2 |
199 MGA_MAP1_ENABLE |
200 MGA_G400_TC2_MAGIC),
201 MGA_TEXCTL, tex->texctl,
202 MGA_TEXFILTER, tex->texfilter,
203 MGA_TEXBORDERCOL, tex->texbordercol);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000205 DMA_BLOCK(MGA_TEXORG, tex->texorg,
206 MGA_TEXORG1, tex->texorg1,
207 MGA_TEXORG2, tex->texorg2, MGA_TEXORG3, tex->texorg3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700208
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000209 DMA_BLOCK(MGA_TEXORG4, tex->texorg4,
210 MGA_TEXWIDTH, tex->texwidth,
211 MGA_TEXHEIGHT, tex->texheight, MGA_WR49, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000213 DMA_BLOCK(MGA_WR57, 0x00000000,
214 MGA_WR53, 0x00000000,
215 MGA_WR61, 0x00000000,
216 MGA_WR52, tex->texwidth | MGA_G400_WR_MAGIC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000218 DMA_BLOCK(MGA_WR60, tex->texheight | MGA_G400_WR_MAGIC,
219 MGA_TEXTRANS, 0x0000ffff,
220 MGA_TEXTRANSHIGH, 0x0000ffff,
221 MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222
223 ADVANCE_DMA();
224}
225
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000226static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700227{
228 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
229 unsigned int pipe = sarea_priv->warp_pipe;
230 DMA_LOCALS;
231
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000232 BEGIN_DMA(3);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700233
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000234 DMA_BLOCK(MGA_WIADDR, MGA_WMODE_SUSPEND,
235 MGA_WVRTXSZ, 0x00000007,
236 MGA_WFLAG, 0x00000000, MGA_WR24, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000238 DMA_BLOCK(MGA_WR25, 0x00000100,
239 MGA_WR34, 0x00000000,
240 MGA_WR42, 0x0000ffff, MGA_WR60, 0x0000ffff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241
Anand Gadiyarfd589a82009-07-16 17:13:03 +0200242 /* Padding required due to hardware bug.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700243 */
Dave Airlie6795c982005-07-10 18:20:09 +1000244 DMA_BLOCK(MGA_DMAPAD, 0xffffffff,
245 MGA_DMAPAD, 0xffffffff,
246 MGA_DMAPAD, 0xffffffff,
247 MGA_WIADDR, (dev_priv->warp_pipe_phys[pipe] |
248 MGA_WMODE_START | dev_priv->wagp_enable));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249
250 ADVANCE_DMA();
251}
252
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000253static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254{
255 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
256 unsigned int pipe = sarea_priv->warp_pipe;
257 DMA_LOCALS;
258
Dave Airliebc5f4522007-11-05 12:50:58 +1000259/* printk("mga_g400_emit_pipe %x\n", pipe); */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700260
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000261 BEGIN_DMA(10);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000263 DMA_BLOCK(MGA_WIADDR2, MGA_WMODE_SUSPEND,
264 MGA_DMAPAD, 0x00000000,
265 MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000267 if (pipe & MGA_T2) {
268 DMA_BLOCK(MGA_WVRTXSZ, 0x00001e09,
269 MGA_DMAPAD, 0x00000000,
270 MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000272 DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000,
273 MGA_WACCEPTSEQ, 0x00000000,
274 MGA_WACCEPTSEQ, 0x00000000,
275 MGA_WACCEPTSEQ, 0x1e000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700276 } else {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000277 if (dev_priv->warp_pipe & MGA_T2) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700278 /* Flush the WARP pipe */
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000279 DMA_BLOCK(MGA_YDST, 0x00000000,
280 MGA_FXLEFT, 0x00000000,
281 MGA_FXRIGHT, 0x00000001,
282 MGA_DWGCTL, MGA_DWGCTL_FLUSH);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700283
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000284 DMA_BLOCK(MGA_LEN + MGA_EXEC, 0x00000001,
285 MGA_DWGSYNC, 0x00007000,
286 MGA_TEXCTL2, MGA_G400_TC2_MAGIC,
287 MGA_LEN + MGA_EXEC, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000289 DMA_BLOCK(MGA_TEXCTL2, (MGA_DUALTEX |
290 MGA_G400_TC2_MAGIC),
291 MGA_LEN + MGA_EXEC, 0x00000000,
292 MGA_TEXCTL2, MGA_G400_TC2_MAGIC,
293 MGA_DMAPAD, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700294 }
295
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000296 DMA_BLOCK(MGA_WVRTXSZ, 0x00001807,
297 MGA_DMAPAD, 0x00000000,
298 MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700299
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000300 DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000,
301 MGA_WACCEPTSEQ, 0x00000000,
302 MGA_WACCEPTSEQ, 0x00000000,
303 MGA_WACCEPTSEQ, 0x18000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304 }
305
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000306 DMA_BLOCK(MGA_WFLAG, 0x00000000,
307 MGA_WFLAG1, 0x00000000,
308 MGA_WR56, MGA_G400_WR56_MAGIC, MGA_DMAPAD, 0x00000000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700309
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000310 DMA_BLOCK(MGA_WR49, 0x00000000, /* tex0 */
311 MGA_WR57, 0x00000000, /* tex0 */
312 MGA_WR53, 0x00000000, /* tex1 */
313 MGA_WR61, 0x00000000); /* tex1 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700314
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000315 DMA_BLOCK(MGA_WR54, MGA_G400_WR_MAGIC, /* tex0 width */
316 MGA_WR62, MGA_G400_WR_MAGIC, /* tex0 height */
317 MGA_WR52, MGA_G400_WR_MAGIC, /* tex1 width */
318 MGA_WR60, MGA_G400_WR_MAGIC); /* tex1 height */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319
Anand Gadiyarfd589a82009-07-16 17:13:03 +0200320 /* Padding required due to hardware bug */
Dave Airlie6795c982005-07-10 18:20:09 +1000321 DMA_BLOCK(MGA_DMAPAD, 0xffffffff,
322 MGA_DMAPAD, 0xffffffff,
323 MGA_DMAPAD, 0xffffffff,
324 MGA_WIADDR2, (dev_priv->warp_pipe_phys[pipe] |
325 MGA_WMODE_START | dev_priv->wagp_enable));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700326
327 ADVANCE_DMA();
328}
329
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000330static void mga_g200_emit_state(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700331{
332 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
333 unsigned int dirty = sarea_priv->dirty;
334
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000335 if (sarea_priv->warp_pipe != dev_priv->warp_pipe) {
336 mga_g200_emit_pipe(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337 dev_priv->warp_pipe = sarea_priv->warp_pipe;
338 }
339
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000340 if (dirty & MGA_UPLOAD_CONTEXT) {
341 mga_g200_emit_context(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342 sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
343 }
344
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000345 if (dirty & MGA_UPLOAD_TEX0) {
346 mga_g200_emit_tex0(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347 sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
348 }
349}
350
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000351static void mga_g400_emit_state(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700352{
353 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
354 unsigned int dirty = sarea_priv->dirty;
355 int multitex = sarea_priv->warp_pipe & MGA_T2;
356
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000357 if (sarea_priv->warp_pipe != dev_priv->warp_pipe) {
358 mga_g400_emit_pipe(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700359 dev_priv->warp_pipe = sarea_priv->warp_pipe;
360 }
361
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000362 if (dirty & MGA_UPLOAD_CONTEXT) {
363 mga_g400_emit_context(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700364 sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
365 }
366
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000367 if (dirty & MGA_UPLOAD_TEX0) {
368 mga_g400_emit_tex0(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700369 sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
370 }
371
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000372 if ((dirty & MGA_UPLOAD_TEX1) && multitex) {
373 mga_g400_emit_tex1(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700374 sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
375 }
376}
377
Linus Torvalds1da177e2005-04-16 15:20:36 -0700378/* ================================================================
379 * SAREA state verification
380 */
381
382/* Disallow all write destinations except the front and backbuffer.
383 */
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000384static int mga_verify_context(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700385{
386 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
387 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
388
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000389 if (ctx->dstorg != dev_priv->front_offset &&
390 ctx->dstorg != dev_priv->back_offset) {
391 DRM_ERROR("*** bad DSTORG: %x (front %x, back %x)\n\n",
392 ctx->dstorg, dev_priv->front_offset,
393 dev_priv->back_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700394 ctx->dstorg = 0;
Eric Anholt20caafa2007-08-25 19:22:43 +1000395 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 }
397
398 return 0;
399}
400
401/* Disallow texture reads from PCI space.
402 */
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000403static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700404{
405 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
406 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
407 unsigned int org;
408
409 org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK);
410
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000411 if (org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI)) {
412 DRM_ERROR("*** bad TEXORG: 0x%x, unit %d\n", tex->texorg, unit);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413 tex->texorg = 0;
Eric Anholt20caafa2007-08-25 19:22:43 +1000414 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700415 }
416
417 return 0;
418}
419
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000420static int mga_verify_state(drm_mga_private_t * dev_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421{
422 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
423 unsigned int dirty = sarea_priv->dirty;
424 int ret = 0;
425
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000426 if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
428
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000429 if (dirty & MGA_UPLOAD_CONTEXT)
430 ret |= mga_verify_context(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700431
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000432 if (dirty & MGA_UPLOAD_TEX0)
433 ret |= mga_verify_tex(dev_priv, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434
Dave Airlie6795c982005-07-10 18:20:09 +1000435 if (dev_priv->chipset >= MGA_CARD_TYPE_G400) {
436 if (dirty & MGA_UPLOAD_TEX1)
437 ret |= mga_verify_tex(dev_priv, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700438
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000439 if (dirty & MGA_UPLOAD_PIPE)
440 ret |= (sarea_priv->warp_pipe > MGA_MAX_G400_PIPES);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441 } else {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000442 if (dirty & MGA_UPLOAD_PIPE)
443 ret |= (sarea_priv->warp_pipe > MGA_MAX_G200_PIPES);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700444 }
445
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000446 return (ret == 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700447}
448
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000449static int mga_verify_iload(drm_mga_private_t * dev_priv,
450 unsigned int dstorg, unsigned int length)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451{
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000452 if (dstorg < dev_priv->texture_offset ||
453 dstorg + length > (dev_priv->texture_offset +
454 dev_priv->texture_size)) {
455 DRM_ERROR("*** bad iload DSTORG: 0x%x\n", dstorg);
Eric Anholt20caafa2007-08-25 19:22:43 +1000456 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457 }
458
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000459 if (length & MGA_ILOAD_MASK) {
460 DRM_ERROR("*** bad iload length: 0x%x\n",
461 length & MGA_ILOAD_MASK);
Eric Anholt20caafa2007-08-25 19:22:43 +1000462 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700463 }
464
465 return 0;
466}
467
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000468static int mga_verify_blit(drm_mga_private_t * dev_priv,
469 unsigned int srcorg, unsigned int dstorg)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700470{
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000471 if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
472 (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM)) {
473 DRM_ERROR("*** bad blit: src=0x%x dst=0x%x\n", srcorg, dstorg);
Eric Anholt20caafa2007-08-25 19:22:43 +1000474 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475 }
476 return 0;
477}
478
Linus Torvalds1da177e2005-04-16 15:20:36 -0700479/* ================================================================
480 *
481 */
482
Dave Airlieeddca552007-07-11 16:09:54 +1000483static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * clear)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484{
485 drm_mga_private_t *dev_priv = dev->dev_private;
486 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
487 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
Dave Airlieeddca552007-07-11 16:09:54 +1000488 struct drm_clip_rect *pbox = sarea_priv->boxes;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700489 int nbox = sarea_priv->nbox;
490 int i;
491 DMA_LOCALS;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000492 DRM_DEBUG("\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700493
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000494 BEGIN_DMA(1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700495
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000496 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
497 MGA_DMAPAD, 0x00000000,
498 MGA_DWGSYNC, 0x00007100, MGA_DWGSYNC, 0x00007000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499
500 ADVANCE_DMA();
501
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000502 for (i = 0; i < nbox; i++) {
Dave Airlieeddca552007-07-11 16:09:54 +1000503 struct drm_clip_rect *box = &pbox[i];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504 u32 height = box->y2 - box->y1;
505
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000506 DRM_DEBUG(" from=%d,%d to=%d,%d\n",
507 box->x1, box->y1, box->x2, box->y2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700508
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000509 if (clear->flags & MGA_FRONT) {
510 BEGIN_DMA(2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000512 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
513 MGA_PLNWT, clear->color_mask,
514 MGA_YDSTLEN, (box->y1 << 16) | height,
515 MGA_FXBNDRY, (box->x2 << 16) | box->x1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700516
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000517 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
518 MGA_FCOL, clear->clear_color,
519 MGA_DSTORG, dev_priv->front_offset,
520 MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521
522 ADVANCE_DMA();
523 }
524
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000525 if (clear->flags & MGA_BACK) {
526 BEGIN_DMA(2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000528 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
529 MGA_PLNWT, clear->color_mask,
530 MGA_YDSTLEN, (box->y1 << 16) | height,
531 MGA_FXBNDRY, (box->x2 << 16) | box->x1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000533 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
534 MGA_FCOL, clear->clear_color,
535 MGA_DSTORG, dev_priv->back_offset,
536 MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537
538 ADVANCE_DMA();
539 }
540
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000541 if (clear->flags & MGA_DEPTH) {
542 BEGIN_DMA(2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700543
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000544 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
545 MGA_PLNWT, clear->depth_mask,
546 MGA_YDSTLEN, (box->y1 << 16) | height,
547 MGA_FXBNDRY, (box->x2 << 16) | box->x1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700548
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000549 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
550 MGA_FCOL, clear->clear_depth,
551 MGA_DSTORG, dev_priv->depth_offset,
552 MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553
554 ADVANCE_DMA();
555 }
556
557 }
558
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000559 BEGIN_DMA(1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700560
561 /* Force reset of DWGCTL */
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000562 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
563 MGA_DMAPAD, 0x00000000,
564 MGA_PLNWT, ctx->plnwt, MGA_DWGCTL, ctx->dwgctl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565
566 ADVANCE_DMA();
567
568 FLUSH_DMA();
569}
570
Dave Airlieeddca552007-07-11 16:09:54 +1000571static void mga_dma_dispatch_swap(struct drm_device * dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572{
573 drm_mga_private_t *dev_priv = dev->dev_private;
574 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
575 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
Dave Airlieeddca552007-07-11 16:09:54 +1000576 struct drm_clip_rect *pbox = sarea_priv->boxes;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700577 int nbox = sarea_priv->nbox;
578 int i;
579 DMA_LOCALS;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000580 DRM_DEBUG("\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700581
582 sarea_priv->last_frame.head = dev_priv->prim.tail;
583 sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap;
584
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000585 BEGIN_DMA(4 + nbox);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000587 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
588 MGA_DMAPAD, 0x00000000,
589 MGA_DWGSYNC, 0x00007100, MGA_DWGSYNC, 0x00007000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700590
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000591 DMA_BLOCK(MGA_DSTORG, dev_priv->front_offset,
592 MGA_MACCESS, dev_priv->maccess,
593 MGA_SRCORG, dev_priv->back_offset,
594 MGA_AR5, dev_priv->front_pitch);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000596 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
597 MGA_DMAPAD, 0x00000000,
598 MGA_PLNWT, 0xffffffff, MGA_DWGCTL, MGA_DWGCTL_COPY);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000600 for (i = 0; i < nbox; i++) {
Dave Airlieeddca552007-07-11 16:09:54 +1000601 struct drm_clip_rect *box = &pbox[i];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700602 u32 height = box->y2 - box->y1;
603 u32 start = box->y1 * dev_priv->front_pitch;
604
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000605 DRM_DEBUG(" from=%d,%d to=%d,%d\n",
606 box->x1, box->y1, box->x2, box->y2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000608 DMA_BLOCK(MGA_AR0, start + box->x2 - 1,
609 MGA_AR3, start + box->x1,
610 MGA_FXBNDRY, ((box->x2 - 1) << 16) | box->x1,
611 MGA_YDSTLEN + MGA_EXEC, (box->y1 << 16) | height);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700612 }
613
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000614 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
615 MGA_PLNWT, ctx->plnwt,
616 MGA_SRCORG, dev_priv->front_offset, MGA_DWGCTL, ctx->dwgctl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700617
618 ADVANCE_DMA();
619
620 FLUSH_DMA();
621
Márton Németh3e684ea2008-01-24 15:58:57 +1000622 DRM_DEBUG("... done.\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623}
624
Dave Airlie056219e2007-07-11 16:17:42 +1000625static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700626{
627 drm_mga_private_t *dev_priv = dev->dev_private;
628 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
629 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
630 u32 address = (u32) buf->bus_address;
631 u32 length = (u32) buf->used;
632 int i = 0;
633 DMA_LOCALS;
Márton Németh3e684ea2008-01-24 15:58:57 +1000634 DRM_DEBUG("buf=%d used=%d\n", buf->idx, buf->used);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700635
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000636 if (buf->used) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700637 buf_priv->dispatched = 1;
638
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000639 MGA_EMIT_STATE(dev_priv, sarea_priv->dirty);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640
641 do {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000642 if (i < sarea_priv->nbox) {
643 mga_emit_clip_rect(dev_priv,
644 &sarea_priv->boxes[i]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700645 }
646
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000647 BEGIN_DMA(1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648
Dave Airlie6795c982005-07-10 18:20:09 +1000649 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
650 MGA_DMAPAD, 0x00000000,
651 MGA_SECADDRESS, (address |
652 MGA_DMA_VERTEX),
653 MGA_SECEND, ((address + length) |
654 dev_priv->dma_access));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655
656 ADVANCE_DMA();
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000657 } while (++i < sarea_priv->nbox);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700658 }
659
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000660 if (buf_priv->discard) {
661 AGE_BUFFER(buf_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662 buf->pending = 0;
663 buf->used = 0;
664 buf_priv->dispatched = 0;
665
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000666 mga_freelist_put(dev, buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700667 }
668
669 FLUSH_DMA();
670}
671
Dave Airlie056219e2007-07-11 16:17:42 +1000672static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * buf,
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000673 unsigned int start, unsigned int end)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700674{
675 drm_mga_private_t *dev_priv = dev->dev_private;
676 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
677 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
678 u32 address = (u32) buf->bus_address;
679 int i = 0;
680 DMA_LOCALS;
Márton Németh3e684ea2008-01-24 15:58:57 +1000681 DRM_DEBUG("buf=%d start=%d end=%d\n", buf->idx, start, end);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700682
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000683 if (start != end) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700684 buf_priv->dispatched = 1;
685
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000686 MGA_EMIT_STATE(dev_priv, sarea_priv->dirty);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687
688 do {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000689 if (i < sarea_priv->nbox) {
690 mga_emit_clip_rect(dev_priv,
691 &sarea_priv->boxes[i]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700692 }
693
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000694 BEGIN_DMA(1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700695
Dave Airlie6795c982005-07-10 18:20:09 +1000696 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
697 MGA_DMAPAD, 0x00000000,
698 MGA_SETUPADDRESS, address + start,
699 MGA_SETUPEND, ((address + end) |
700 dev_priv->dma_access));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701
702 ADVANCE_DMA();
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000703 } while (++i < sarea_priv->nbox);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700704 }
705
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000706 if (buf_priv->discard) {
707 AGE_BUFFER(buf_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700708 buf->pending = 0;
709 buf->used = 0;
710 buf_priv->dispatched = 0;
711
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000712 mga_freelist_put(dev, buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700713 }
714
715 FLUSH_DMA();
716}
717
718/* This copies a 64 byte aligned agp region to the frambuffer with a
719 * standard blit, the ioctl needs to do checking.
720 */
Dave Airlie056219e2007-07-11 16:17:42 +1000721static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf,
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000722 unsigned int dstorg, unsigned int length)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700723{
724 drm_mga_private_t *dev_priv = dev->dev_private;
725 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
726 drm_mga_context_regs_t *ctx = &dev_priv->sarea_priv->context_state;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000727 u32 srcorg =
728 buf->bus_address | dev_priv->dma_access | MGA_SRCMAP_SYSMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700729 u32 y2;
730 DMA_LOCALS;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000731 DRM_DEBUG("buf=%d used=%d\n", buf->idx, buf->used);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700732
733 y2 = length / 64;
734
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000735 BEGIN_DMA(5);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000737 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
738 MGA_DMAPAD, 0x00000000,
739 MGA_DWGSYNC, 0x00007100, MGA_DWGSYNC, 0x00007000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700740
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000741 DMA_BLOCK(MGA_DSTORG, dstorg,
742 MGA_MACCESS, 0x00000000, MGA_SRCORG, srcorg, MGA_AR5, 64);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700743
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000744 DMA_BLOCK(MGA_PITCH, 64,
745 MGA_PLNWT, 0xffffffff,
746 MGA_DMAPAD, 0x00000000, MGA_DWGCTL, MGA_DWGCTL_COPY);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000748 DMA_BLOCK(MGA_AR0, 63,
749 MGA_AR3, 0,
750 MGA_FXBNDRY, (63 << 16) | 0, MGA_YDSTLEN + MGA_EXEC, y2);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000752 DMA_BLOCK(MGA_PLNWT, ctx->plnwt,
753 MGA_SRCORG, dev_priv->front_offset,
754 MGA_PITCH, dev_priv->front_pitch, MGA_DWGSYNC, 0x00007000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700755
756 ADVANCE_DMA();
757
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000758 AGE_BUFFER(buf_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700759
760 buf->pending = 0;
761 buf->used = 0;
762 buf_priv->dispatched = 0;
763
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000764 mga_freelist_put(dev, buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765
766 FLUSH_DMA();
767}
768
Dave Airlieeddca552007-07-11 16:09:54 +1000769static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700770{
771 drm_mga_private_t *dev_priv = dev->dev_private;
772 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
773 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
Dave Airlieeddca552007-07-11 16:09:54 +1000774 struct drm_clip_rect *pbox = sarea_priv->boxes;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700775 int nbox = sarea_priv->nbox;
776 u32 scandir = 0, i;
777 DMA_LOCALS;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000778 DRM_DEBUG("\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000780 BEGIN_DMA(4 + nbox);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700781
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000782 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
783 MGA_DMAPAD, 0x00000000,
784 MGA_DWGSYNC, 0x00007100, MGA_DWGSYNC, 0x00007000);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700785
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000786 DMA_BLOCK(MGA_DWGCTL, MGA_DWGCTL_COPY,
787 MGA_PLNWT, blit->planemask,
788 MGA_SRCORG, blit->srcorg, MGA_DSTORG, blit->dstorg);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700789
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000790 DMA_BLOCK(MGA_SGN, scandir,
791 MGA_MACCESS, dev_priv->maccess,
792 MGA_AR5, blit->ydir * blit->src_pitch,
793 MGA_PITCH, blit->dst_pitch);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700794
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000795 for (i = 0; i < nbox; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796 int srcx = pbox[i].x1 + blit->delta_sx;
797 int srcy = pbox[i].y1 + blit->delta_sy;
798 int dstx = pbox[i].x1 + blit->delta_dx;
799 int dsty = pbox[i].y1 + blit->delta_dy;
800 int h = pbox[i].y2 - pbox[i].y1;
801 int w = pbox[i].x2 - pbox[i].x1 - 1;
802 int start;
803
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000804 if (blit->ydir == -1) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700805 srcy = blit->height - srcy - 1;
806 }
807
808 start = srcy * blit->src_pitch + srcx;
809
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000810 DMA_BLOCK(MGA_AR0, start + w,
811 MGA_AR3, start,
812 MGA_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff),
813 MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700814 }
815
816 /* Do something to flush AGP?
817 */
818
819 /* Force reset of DWGCTL */
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000820 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
821 MGA_PLNWT, ctx->plnwt,
822 MGA_PITCH, dev_priv->front_pitch, MGA_DWGCTL, ctx->dwgctl);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700823
824 ADVANCE_DMA();
825}
826
Linus Torvalds1da177e2005-04-16 15:20:36 -0700827/* ================================================================
828 *
829 */
830
Eric Anholtc153f452007-09-03 12:06:45 +1000831static int mga_dma_clear(struct drm_device *dev, void *data, struct drm_file *file_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833 drm_mga_private_t *dev_priv = dev->dev_private;
834 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
Eric Anholtc153f452007-09-03 12:06:45 +1000835 drm_mga_clear_t *clear = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836
Eric Anholt6c340ea2007-08-25 20:23:09 +1000837 LOCK_TEST_WITH_RETURN(dev, file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000839 if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700840 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
841
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000842 WRAP_TEST_WITH_RETURN(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700843
Eric Anholtc153f452007-09-03 12:06:45 +1000844 mga_dma_dispatch_clear(dev, clear);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700845
846 /* Make sure we restore the 3D state next time.
847 */
848 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
849
850 return 0;
851}
852
Eric Anholtc153f452007-09-03 12:06:45 +1000853static int mga_dma_swap(struct drm_device *dev, void *data, struct drm_file *file_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700854{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700855 drm_mga_private_t *dev_priv = dev->dev_private;
856 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
857
Eric Anholt6c340ea2007-08-25 20:23:09 +1000858 LOCK_TEST_WITH_RETURN(dev, file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700859
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000860 if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700861 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
862
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000863 WRAP_TEST_WITH_RETURN(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700864
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000865 mga_dma_dispatch_swap(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700866
867 /* Make sure we restore the 3D state next time.
868 */
869 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
870
871 return 0;
872}
873
Eric Anholtc153f452007-09-03 12:06:45 +1000874static int mga_dma_vertex(struct drm_device *dev, void *data, struct drm_file *file_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700875{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700876 drm_mga_private_t *dev_priv = dev->dev_private;
Dave Airliecdd55a22007-07-11 16:32:08 +1000877 struct drm_device_dma *dma = dev->dma;
Dave Airlie056219e2007-07-11 16:17:42 +1000878 struct drm_buf *buf;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700879 drm_mga_buf_priv_t *buf_priv;
Eric Anholtc153f452007-09-03 12:06:45 +1000880 drm_mga_vertex_t *vertex = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881
Eric Anholt6c340ea2007-08-25 20:23:09 +1000882 LOCK_TEST_WITH_RETURN(dev, file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700883
Eric Anholtc153f452007-09-03 12:06:45 +1000884 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
Eric Anholt20caafa2007-08-25 19:22:43 +1000885 return -EINVAL;
Eric Anholtc153f452007-09-03 12:06:45 +1000886 buf = dma->buflist[vertex->idx];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700887 buf_priv = buf->dev_private;
888
Eric Anholtc153f452007-09-03 12:06:45 +1000889 buf->used = vertex->used;
890 buf_priv->discard = vertex->discard;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700891
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000892 if (!mga_verify_state(dev_priv)) {
Eric Anholtc153f452007-09-03 12:06:45 +1000893 if (vertex->discard) {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000894 if (buf_priv->dispatched == 1)
895 AGE_BUFFER(buf_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700896 buf_priv->dispatched = 0;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000897 mga_freelist_put(dev, buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700898 }
Eric Anholt20caafa2007-08-25 19:22:43 +1000899 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700900 }
901
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000902 WRAP_TEST_WITH_RETURN(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700903
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000904 mga_dma_dispatch_vertex(dev, buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700905
906 return 0;
907}
908
Eric Anholtc153f452007-09-03 12:06:45 +1000909static int mga_dma_indices(struct drm_device *dev, void *data, struct drm_file *file_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700910{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700911 drm_mga_private_t *dev_priv = dev->dev_private;
Dave Airliecdd55a22007-07-11 16:32:08 +1000912 struct drm_device_dma *dma = dev->dma;
Dave Airlie056219e2007-07-11 16:17:42 +1000913 struct drm_buf *buf;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914 drm_mga_buf_priv_t *buf_priv;
Eric Anholtc153f452007-09-03 12:06:45 +1000915 drm_mga_indices_t *indices = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916
Eric Anholt6c340ea2007-08-25 20:23:09 +1000917 LOCK_TEST_WITH_RETURN(dev, file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700918
Eric Anholtc153f452007-09-03 12:06:45 +1000919 if (indices->idx < 0 || indices->idx > dma->buf_count)
Eric Anholt20caafa2007-08-25 19:22:43 +1000920 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700921
Eric Anholtc153f452007-09-03 12:06:45 +1000922 buf = dma->buflist[indices->idx];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700923 buf_priv = buf->dev_private;
924
Eric Anholtc153f452007-09-03 12:06:45 +1000925 buf_priv->discard = indices->discard;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000927 if (!mga_verify_state(dev_priv)) {
Eric Anholtc153f452007-09-03 12:06:45 +1000928 if (indices->discard) {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000929 if (buf_priv->dispatched == 1)
930 AGE_BUFFER(buf_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700931 buf_priv->dispatched = 0;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000932 mga_freelist_put(dev, buf);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700933 }
Eric Anholt20caafa2007-08-25 19:22:43 +1000934 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700935 }
936
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000937 WRAP_TEST_WITH_RETURN(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700938
Eric Anholtc153f452007-09-03 12:06:45 +1000939 mga_dma_dispatch_indices(dev, buf, indices->start, indices->end);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940
941 return 0;
942}
943
Eric Anholtc153f452007-09-03 12:06:45 +1000944static int mga_dma_iload(struct drm_device *dev, void *data, struct drm_file *file_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700945{
Dave Airliecdd55a22007-07-11 16:32:08 +1000946 struct drm_device_dma *dma = dev->dma;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947 drm_mga_private_t *dev_priv = dev->dev_private;
Dave Airlie056219e2007-07-11 16:17:42 +1000948 struct drm_buf *buf;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700949 drm_mga_buf_priv_t *buf_priv;
Eric Anholtc153f452007-09-03 12:06:45 +1000950 drm_mga_iload_t *iload = data;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000951 DRM_DEBUG("\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700952
Eric Anholt6c340ea2007-08-25 20:23:09 +1000953 LOCK_TEST_WITH_RETURN(dev, file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700954
Linus Torvalds1da177e2005-04-16 15:20:36 -0700955#if 0
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000956 if (mga_do_wait_for_idle(dev_priv) < 0) {
957 if (MGA_DMA_DEBUG)
Márton Németh3e684ea2008-01-24 15:58:57 +1000958 DRM_INFO("-EBUSY\n");
Eric Anholt20caafa2007-08-25 19:22:43 +1000959 return -EBUSY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700960 }
961#endif
Eric Anholtc153f452007-09-03 12:06:45 +1000962 if (iload->idx < 0 || iload->idx > dma->buf_count)
Eric Anholt20caafa2007-08-25 19:22:43 +1000963 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700964
Eric Anholtc153f452007-09-03 12:06:45 +1000965 buf = dma->buflist[iload->idx];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 buf_priv = buf->dev_private;
967
Eric Anholtc153f452007-09-03 12:06:45 +1000968 if (mga_verify_iload(dev_priv, iload->dstorg, iload->length)) {
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000969 mga_freelist_put(dev, buf);
Eric Anholt20caafa2007-08-25 19:22:43 +1000970 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700971 }
972
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000973 WRAP_TEST_WITH_RETURN(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700974
Eric Anholtc153f452007-09-03 12:06:45 +1000975 mga_dma_dispatch_iload(dev, buf, iload->dstorg, iload->length);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976
977 /* Make sure we restore the 3D state next time.
978 */
979 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
980
981 return 0;
982}
983
Eric Anholtc153f452007-09-03 12:06:45 +1000984static int mga_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700985{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700986 drm_mga_private_t *dev_priv = dev->dev_private;
987 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
Eric Anholtc153f452007-09-03 12:06:45 +1000988 drm_mga_blit_t *blit = data;
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000989 DRM_DEBUG("\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700990
Eric Anholt6c340ea2007-08-25 20:23:09 +1000991 LOCK_TEST_WITH_RETURN(dev, file_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700992
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000993 if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700994 sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
995
Eric Anholtc153f452007-09-03 12:06:45 +1000996 if (mga_verify_blit(dev_priv, blit->srcorg, blit->dstorg))
Eric Anholt20caafa2007-08-25 19:22:43 +1000997 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998
Dave Airlieb5e89ed2005-09-25 14:28:13 +1000999 WRAP_TEST_WITH_RETURN(dev_priv);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001000
Eric Anholtc153f452007-09-03 12:06:45 +10001001 mga_dma_dispatch_blit(dev, blit);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001002
1003 /* Make sure we restore the 3D state next time.
1004 */
1005 dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CONTEXT;
1006
1007 return 0;
1008}
1009
Eric Anholtc153f452007-09-03 12:06:45 +10001010static int mga_getparam(struct drm_device *dev, void *data, struct drm_file *file_priv)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001011{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001012 drm_mga_private_t *dev_priv = dev->dev_private;
Eric Anholtc153f452007-09-03 12:06:45 +10001013 drm_mga_getparam_t *param = data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001014 int value;
1015
Dave Airlieb5e89ed2005-09-25 14:28:13 +10001016 if (!dev_priv) {
Márton Németh3e684ea2008-01-24 15:58:57 +10001017 DRM_ERROR("called with no initialization\n");
Eric Anholt20caafa2007-08-25 19:22:43 +10001018 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001019 }
1020
Dave Airlieb5e89ed2005-09-25 14:28:13 +10001021 DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001022
Eric Anholtc153f452007-09-03 12:06:45 +10001023 switch (param->param) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001024 case MGA_PARAM_IRQ_NR:
Jesse Barnes9bfbd5c2008-09-15 15:00:33 -07001025 value = drm_dev_to_irq(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001026 break;
Dave Airlie6795c982005-07-10 18:20:09 +10001027 case MGA_PARAM_CARD_TYPE:
1028 value = dev_priv->chipset;
1029 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030 default:
Eric Anholt20caafa2007-08-25 19:22:43 +10001031 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001032 }
1033
Eric Anholtc153f452007-09-03 12:06:45 +10001034 if (DRM_COPY_TO_USER(param->value, &value, sizeof(int))) {
Dave Airlieb5e89ed2005-09-25 14:28:13 +10001035 DRM_ERROR("copy_to_user\n");
Eric Anholt20caafa2007-08-25 19:22:43 +10001036 return -EFAULT;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001037 }
Dave Airlieb5e89ed2005-09-25 14:28:13 +10001038
Linus Torvalds1da177e2005-04-16 15:20:36 -07001039 return 0;
1040}
1041
Eric Anholtc153f452007-09-03 12:06:45 +10001042static int mga_set_fence(struct drm_device *dev, void *data, struct drm_file *file_priv)
Dave Airlie6795c982005-07-10 18:20:09 +10001043{
Dave Airlie6795c982005-07-10 18:20:09 +10001044 drm_mga_private_t *dev_priv = dev->dev_private;
Eric Anholtc153f452007-09-03 12:06:45 +10001045 u32 *fence = data;
Dave Airlie6795c982005-07-10 18:20:09 +10001046 DMA_LOCALS;
1047
1048 if (!dev_priv) {
Márton Németh3e684ea2008-01-24 15:58:57 +10001049 DRM_ERROR("called with no initialization\n");
Eric Anholt20caafa2007-08-25 19:22:43 +10001050 return -EINVAL;
Dave Airlie6795c982005-07-10 18:20:09 +10001051 }
1052
1053 DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
1054
Eric Anholtc153f452007-09-03 12:06:45 +10001055 /* I would normal do this assignment in the declaration of fence,
Dave Airlie6795c982005-07-10 18:20:09 +10001056 * but dev_priv may be NULL.
1057 */
1058
Eric Anholtc153f452007-09-03 12:06:45 +10001059 *fence = dev_priv->next_fence_to_post;
Dave Airlie6795c982005-07-10 18:20:09 +10001060 dev_priv->next_fence_to_post++;
1061
1062 BEGIN_DMA(1);
1063 DMA_BLOCK(MGA_DMAPAD, 0x00000000,
1064 MGA_DMAPAD, 0x00000000,
Dave Airlieb5e89ed2005-09-25 14:28:13 +10001065 MGA_DMAPAD, 0x00000000, MGA_SOFTRAP, 0x00000000);
Dave Airlie6795c982005-07-10 18:20:09 +10001066 ADVANCE_DMA();
1067
Dave Airlie6795c982005-07-10 18:20:09 +10001068 return 0;
1069}
1070
Eric Anholtc153f452007-09-03 12:06:45 +10001071static int mga_wait_fence(struct drm_device *dev, void *data, struct drm_file *
1072file_priv)
Dave Airlie6795c982005-07-10 18:20:09 +10001073{
Dave Airlie6795c982005-07-10 18:20:09 +10001074 drm_mga_private_t *dev_priv = dev->dev_private;
Eric Anholtc153f452007-09-03 12:06:45 +10001075 u32 *fence = data;
Dave Airlie6795c982005-07-10 18:20:09 +10001076
1077 if (!dev_priv) {
Márton Németh3e684ea2008-01-24 15:58:57 +10001078 DRM_ERROR("called with no initialization\n");
Eric Anholt20caafa2007-08-25 19:22:43 +10001079 return -EINVAL;
Dave Airlie6795c982005-07-10 18:20:09 +10001080 }
1081
Dave Airlie6795c982005-07-10 18:20:09 +10001082 DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
1083
Eric Anholtc153f452007-09-03 12:06:45 +10001084 mga_driver_fence_wait(dev, fence);
Dave Airlie6795c982005-07-10 18:20:09 +10001085 return 0;
1086}
1087
Eric Anholtc153f452007-09-03 12:06:45 +10001088struct drm_ioctl_desc mga_ioctls[] = {
1089 DRM_IOCTL_DEF(DRM_MGA_INIT, mga_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1090 DRM_IOCTL_DEF(DRM_MGA_FLUSH, mga_dma_flush, DRM_AUTH),
1091 DRM_IOCTL_DEF(DRM_MGA_RESET, mga_dma_reset, DRM_AUTH),
1092 DRM_IOCTL_DEF(DRM_MGA_SWAP, mga_dma_swap, DRM_AUTH),
1093 DRM_IOCTL_DEF(DRM_MGA_CLEAR, mga_dma_clear, DRM_AUTH),
1094 DRM_IOCTL_DEF(DRM_MGA_VERTEX, mga_dma_vertex, DRM_AUTH),
1095 DRM_IOCTL_DEF(DRM_MGA_INDICES, mga_dma_indices, DRM_AUTH),
1096 DRM_IOCTL_DEF(DRM_MGA_ILOAD, mga_dma_iload, DRM_AUTH),
1097 DRM_IOCTL_DEF(DRM_MGA_BLIT, mga_dma_blit, DRM_AUTH),
1098 DRM_IOCTL_DEF(DRM_MGA_GETPARAM, mga_getparam, DRM_AUTH),
1099 DRM_IOCTL_DEF(DRM_MGA_SET_FENCE, mga_set_fence, DRM_AUTH),
1100 DRM_IOCTL_DEF(DRM_MGA_WAIT_FENCE, mga_wait_fence, DRM_AUTH),
1101 DRM_IOCTL_DEF(DRM_MGA_DMA_BOOTSTRAP, mga_dma_bootstrap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001102};
1103
1104int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls);