blob: 273770432298b72ae5687505e156fe5b03e0e4e4 [file] [log] [blame]
Ben Skeggs6ee73862009-12-11 19:24:15 +10001/*
2 * Copyright 2005 Stephane Marchesin.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25#include <linux/console.h>
26
27#include "drmP.h"
28#include "drm.h"
29#include "drm_crtc_helper.h"
30#include "nouveau_drv.h"
31#include "nouveau_hw.h"
32#include "nouveau_fb.h"
33#include "nouveau_fbcon.h"
34#include "nv50_display.h"
35
36#include "drm_pciids.h"
37
Ben Skeggs054b93e2009-12-15 22:02:47 +100038MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
39int nouveau_ctxfw = 0;
40module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
41
Ben Skeggs6ee73862009-12-11 19:24:15 +100042MODULE_PARM_DESC(noagp, "Disable AGP");
43int nouveau_noagp;
44module_param_named(noagp, nouveau_noagp, int, 0400);
45
46MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
47static int nouveau_modeset = -1; /* kms */
48module_param_named(modeset, nouveau_modeset, int, 0400);
49
50MODULE_PARM_DESC(vbios, "Override default VBIOS location");
51char *nouveau_vbios;
52module_param_named(vbios, nouveau_vbios, charp, 0400);
53
54MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
55int nouveau_vram_pushbuf;
56module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
57
58MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
Ben Skeggsf927b892010-01-27 14:29:05 +100059int nouveau_vram_notify = 1;
Ben Skeggs6ee73862009-12-11 19:24:15 +100060module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
61
62MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
63int nouveau_duallink = 1;
64module_param_named(duallink, nouveau_duallink, int, 0400);
65
66MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
67int nouveau_uscript_lvds = -1;
68module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
69
70MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
71int nouveau_uscript_tmds = -1;
72module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
73
Ben Skeggsa1470892010-01-18 11:42:37 +100074MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
75int nouveau_ignorelid = 0;
76module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
77
Marcin Kościelnicki81e2d422010-02-25 00:54:04 +000078MODULE_PARM_DESC(noaccel, "Disable all acceleration");
Marcin Kościelnickia32ed692010-01-26 14:00:42 +000079int nouveau_noaccel = 0;
80module_param_named(noaccel, nouveau_noaccel, int, 0400);
81
Marcin Kościelnicki81e2d422010-02-25 00:54:04 +000082MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
Marcin Kościelnickia32ed692010-01-26 14:00:42 +000083int nouveau_nofbaccel = 0;
84module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
85
Ben Skeggsda647d52010-03-04 12:00:39 +100086MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
87int nouveau_override_conntype = 0;
88module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
89
Ben Skeggsf4053502010-03-15 09:43:51 +100090MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
91int nouveau_tv_disable = 0;
92module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
93
Ben Skeggs6ee73862009-12-11 19:24:15 +100094MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
95 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
96 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
97 "\t\tDefault: PAL\n"
98 "\t\t*NOTE* Ignored for cards with external TV encoders.");
99char *nouveau_tv_norm;
100module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
101
102MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
103 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
104 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
105 "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
106int nouveau_reg_debug;
107module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
108
109int nouveau_fbpercrtc;
110#if 0
111module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
112#endif
113
114static struct pci_device_id pciidlist[] = {
115 {
116 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
117 .class = PCI_BASE_CLASS_DISPLAY << 16,
118 .class_mask = 0xff << 16,
119 },
120 {
121 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
122 .class = PCI_BASE_CLASS_DISPLAY << 16,
123 .class_mask = 0xff << 16,
124 },
125 {}
126};
127
128MODULE_DEVICE_TABLE(pci, pciidlist);
129
130static struct drm_driver driver;
131
132static int __devinit
133nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
134{
135 return drm_get_dev(pdev, ent, &driver);
136}
137
138static void
139nouveau_pci_remove(struct pci_dev *pdev)
140{
141 struct drm_device *dev = pci_get_drvdata(pdev);
142
143 drm_put_dev(dev);
144}
145
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000146int
Ben Skeggs6ee73862009-12-11 19:24:15 +1000147nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
148{
149 struct drm_device *dev = pci_get_drvdata(pdev);
150 struct drm_nouveau_private *dev_priv = dev->dev_private;
151 struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
152 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
153 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
154 struct nouveau_channel *chan;
155 struct drm_crtc *crtc;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000156 int ret, i;
157
158 if (!drm_core_check_feature(dev, DRIVER_MODESET))
159 return -ENODEV;
160
161 if (pm_state.event == PM_EVENT_PRETHAW)
162 return 0;
163
Maarten Maathuis814415702010-02-21 13:28:35 +0100164 NV_INFO(dev, "Disabling fbcon acceleration...\n");
Dave Airlie38651672010-03-30 05:34:13 +0000165 nouveau_fbcon_save_disable_accel(dev);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000166
Maarten Maathuis814415702010-02-21 13:28:35 +0100167 NV_INFO(dev, "Unpinning framebuffer(s)...\n");
Ben Skeggs6ee73862009-12-11 19:24:15 +1000168 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
169 struct nouveau_framebuffer *nouveau_fb;
170
171 nouveau_fb = nouveau_framebuffer(crtc->fb);
172 if (!nouveau_fb || !nouveau_fb->nvbo)
173 continue;
174
175 nouveau_bo_unpin(nouveau_fb->nvbo);
176 }
177
Maarten Maathuisb334f2b2010-05-09 14:49:52 +0200178 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
179 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
180
181 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
182 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
183 }
184
Ben Skeggs6ee73862009-12-11 19:24:15 +1000185 NV_INFO(dev, "Evicting buffers...\n");
186 ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
187
188 NV_INFO(dev, "Idling channels...\n");
189 for (i = 0; i < pfifo->channels; i++) {
190 struct nouveau_fence *fence = NULL;
191
192 chan = dev_priv->fifos[i];
193 if (!chan || (dev_priv->card_type >= NV_50 &&
194 chan == dev_priv->fifos[0]))
195 continue;
196
197 ret = nouveau_fence_new(chan, &fence, true);
198 if (ret == 0) {
199 ret = nouveau_fence_wait(fence, NULL, false, false);
200 nouveau_fence_unref((void *)&fence);
201 }
202
203 if (ret) {
204 NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
205 chan->id);
206 }
207 }
208
209 pgraph->fifo_access(dev, false);
210 nouveau_wait_for_idle(dev);
211 pfifo->reassign(dev, false);
212 pfifo->disable(dev);
213 pfifo->unload_context(dev);
214 pgraph->unload_context(dev);
215
216 NV_INFO(dev, "Suspending GPU objects...\n");
217 ret = nouveau_gpuobj_suspend(dev);
218 if (ret) {
219 NV_ERROR(dev, "... failed: %d\n", ret);
220 goto out_abort;
221 }
222
223 ret = pinstmem->suspend(dev);
224 if (ret) {
225 NV_ERROR(dev, "... failed: %d\n", ret);
226 nouveau_gpuobj_suspend_cleanup(dev);
227 goto out_abort;
228 }
229
230 NV_INFO(dev, "And we're gone!\n");
231 pci_save_state(pdev);
232 if (pm_state.event == PM_EVENT_SUSPEND) {
233 pci_disable_device(pdev);
234 pci_set_power_state(pdev, PCI_D3hot);
235 }
236
237 acquire_console_sem();
Dave Airlie38651672010-03-30 05:34:13 +0000238 nouveau_fbcon_set_suspend(dev, 1);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000239 release_console_sem();
Dave Airlie38651672010-03-30 05:34:13 +0000240 nouveau_fbcon_restore_accel(dev);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000241 return 0;
242
243out_abort:
244 NV_INFO(dev, "Re-enabling acceleration..\n");
245 pfifo->enable(dev);
246 pfifo->reassign(dev, true);
247 pgraph->fifo_access(dev, true);
248 return ret;
249}
250
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000251int
Ben Skeggs6ee73862009-12-11 19:24:15 +1000252nouveau_pci_resume(struct pci_dev *pdev)
253{
254 struct drm_device *dev = pci_get_drvdata(pdev);
255 struct drm_nouveau_private *dev_priv = dev->dev_private;
256 struct nouveau_engine *engine = &dev_priv->engine;
257 struct drm_crtc *crtc;
Ben Skeggs6ee73862009-12-11 19:24:15 +1000258 int ret, i;
259
260 if (!drm_core_check_feature(dev, DRIVER_MODESET))
261 return -ENODEV;
262
Dave Airlie38651672010-03-30 05:34:13 +0000263 nouveau_fbcon_save_disable_accel(dev);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000264
265 NV_INFO(dev, "We're back, enabling device...\n");
266 pci_set_power_state(pdev, PCI_D0);
267 pci_restore_state(pdev);
268 if (pci_enable_device(pdev))
269 return -1;
270 pci_set_master(dev->pdev);
271
272 NV_INFO(dev, "POSTing device...\n");
273 ret = nouveau_run_vbios_init(dev);
274 if (ret)
275 return ret;
276
277 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
278 ret = nouveau_mem_init_agp(dev);
279 if (ret) {
280 NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
281 return ret;
282 }
283 }
284
285 NV_INFO(dev, "Reinitialising engines...\n");
286 engine->instmem.resume(dev);
287 engine->mc.init(dev);
288 engine->timer.init(dev);
289 engine->fb.init(dev);
290 engine->graph.init(dev);
291 engine->fifo.init(dev);
292
293 NV_INFO(dev, "Restoring GPU objects...\n");
294 nouveau_gpuobj_resume(dev);
295
296 nouveau_irq_postinstall(dev);
297
298 /* Re-write SKIPS, they'll have been lost over the suspend */
299 if (nouveau_vram_pushbuf) {
300 struct nouveau_channel *chan;
301 int j;
302
303 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
304 chan = dev_priv->fifos[i];
Ben Skeggs3c8868d2009-12-16 14:51:13 +1000305 if (!chan || !chan->pushbuf_bo)
Ben Skeggs6ee73862009-12-11 19:24:15 +1000306 continue;
307
308 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
309 nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
310 }
311 }
312
313 NV_INFO(dev, "Restoring mode...\n");
314 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
315 struct nouveau_framebuffer *nouveau_fb;
316
317 nouveau_fb = nouveau_framebuffer(crtc->fb);
318 if (!nouveau_fb || !nouveau_fb->nvbo)
319 continue;
320
321 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
322 }
323
Maarten Maathuisb334f2b2010-05-09 14:49:52 +0200324 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
325 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
326 int ret;
327
328 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
329 if (!ret)
330 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
331 if (ret)
332 NV_ERROR(dev, "Could not pin/map cursor.\n");
333 }
334
Ben Skeggs6ee73862009-12-11 19:24:15 +1000335 if (dev_priv->card_type < NV_50) {
336 nv04_display_restore(dev);
337 NVLockVgaCrtcs(dev, false);
338 } else
339 nv50_display_init(dev);
340
Maarten Maathuisb334f2b2010-05-09 14:49:52 +0200341 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
342 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
343
344 nv_crtc->cursor.set_offset(nv_crtc,
345 nv_crtc->cursor.nvbo->bo.offset -
346 dev_priv->vm_vram_base);
347
348 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
349 nv_crtc->cursor_saved_y);
350 }
351
Ben Skeggs6ee73862009-12-11 19:24:15 +1000352 /* Force CLUT to get re-loaded during modeset */
353 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
354 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
355
356 nv_crtc->lut.depth = 0;
357 }
358
359 acquire_console_sem();
Dave Airlie38651672010-03-30 05:34:13 +0000360 nouveau_fbcon_set_suspend(dev, 0);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000361 release_console_sem();
362
Dave Airlie38651672010-03-30 05:34:13 +0000363 nouveau_fbcon_zfill_all(dev);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000364
365 drm_helper_resume_force_mode(dev);
Dave Airlie38651672010-03-30 05:34:13 +0000366
367 nouveau_fbcon_restore_accel(dev);
Ben Skeggs6ee73862009-12-11 19:24:15 +1000368 return 0;
369}
370
371static struct drm_driver driver = {
372 .driver_features =
373 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
374 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
375 .load = nouveau_load,
376 .firstopen = nouveau_firstopen,
377 .lastclose = nouveau_lastclose,
378 .unload = nouveau_unload,
379 .preclose = nouveau_preclose,
380#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
381 .debugfs_init = nouveau_debugfs_init,
382 .debugfs_cleanup = nouveau_debugfs_takedown,
383#endif
384 .irq_preinstall = nouveau_irq_preinstall,
385 .irq_postinstall = nouveau_irq_postinstall,
386 .irq_uninstall = nouveau_irq_uninstall,
387 .irq_handler = nouveau_irq_handler,
388 .reclaim_buffers = drm_core_reclaim_buffers,
389 .get_map_ofs = drm_core_get_map_ofs,
390 .get_reg_ofs = drm_core_get_reg_ofs,
391 .ioctls = nouveau_ioctls,
392 .fops = {
393 .owner = THIS_MODULE,
394 .open = drm_open,
395 .release = drm_release,
Arnd Bergmanned8b6702009-12-16 22:17:09 +0000396 .unlocked_ioctl = drm_ioctl,
Ben Skeggs6ee73862009-12-11 19:24:15 +1000397 .mmap = nouveau_ttm_mmap,
398 .poll = drm_poll,
399 .fasync = drm_fasync,
400#if defined(CONFIG_COMPAT)
401 .compat_ioctl = nouveau_compat_ioctl,
402#endif
403 },
404 .pci_driver = {
405 .name = DRIVER_NAME,
406 .id_table = pciidlist,
407 .probe = nouveau_pci_probe,
408 .remove = nouveau_pci_remove,
409 .suspend = nouveau_pci_suspend,
410 .resume = nouveau_pci_resume
411 },
412
413 .gem_init_object = nouveau_gem_object_new,
414 .gem_free_object = nouveau_gem_object_del,
415
416 .name = DRIVER_NAME,
417 .desc = DRIVER_DESC,
418#ifdef GIT_REVISION
419 .date = GIT_REVISION,
420#else
421 .date = DRIVER_DATE,
422#endif
423 .major = DRIVER_MAJOR,
424 .minor = DRIVER_MINOR,
425 .patchlevel = DRIVER_PATCHLEVEL,
426};
427
428static int __init nouveau_init(void)
429{
430 driver.num_ioctls = nouveau_max_ioctl;
431
432 if (nouveau_modeset == -1) {
433#ifdef CONFIG_VGA_CONSOLE
434 if (vgacon_text_force())
435 nouveau_modeset = 0;
436 else
437#endif
438 nouveau_modeset = 1;
439 }
440
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000441 if (nouveau_modeset == 1) {
Ben Skeggs6ee73862009-12-11 19:24:15 +1000442 driver.driver_features |= DRIVER_MODESET;
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000443 nouveau_register_dsm_handler();
444 }
Ben Skeggs6ee73862009-12-11 19:24:15 +1000445
446 return drm_init(&driver);
447}
448
449static void __exit nouveau_exit(void)
450{
451 drm_exit(&driver);
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000452 nouveau_unregister_dsm_handler();
Ben Skeggs6ee73862009-12-11 19:24:15 +1000453}
454
455module_init(nouveau_init);
456module_exit(nouveau_exit);
457
458MODULE_AUTHOR(DRIVER_AUTHOR);
459MODULE_DESCRIPTION(DRIVER_DESC);
460MODULE_LICENSE("GPL and additional rights");