blob: 4812d1fed0c2ccf7390830c719daad0546a2b0b3 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1994, 95, 96, 97, 98, 99, 2000, 01, 02, 03 by Ralf Baechle
7 * Copyright (C) 1999, 2000, 2001 Silicon Graphics, Inc.
8 */
9#ifndef _ASM_CACHEFLUSH_H
10#define _ASM_CACHEFLUSH_H
11
12/* Keep includes the same across arches. */
13#include <linux/mm.h>
14#include <asm/cpu-features.h>
15
16/* Cache flushing:
17 *
18 * - flush_cache_all() flushes entire cache
19 * - flush_cache_mm(mm) flushes the specified mm context's cache lines
Ralf Baechleec8c0442006-12-12 17:14:57 +000020 * - flush_cache_dup mm(mm) handles cache flushing when forking
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 * - flush_cache_page(mm, vmaddr, pfn) flushes a single page
22 * - flush_cache_range(vma, start, end) flushes a range of pages
23 * - flush_icache_range(start, end) flush a range of instructions
24 * - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
Linus Torvalds1da177e2005-04-16 15:20:36 -070025 *
26 * MIPS specific flush operations:
27 *
28 * - flush_cache_sigtramp() flush signal trampoline
29 * - flush_icache_all() flush the entire instruction cache
30 * - flush_data_cache_page() flushes a page from the data cache
James Hogan01882b42016-09-01 17:30:11 +010031 * - __flush_icache_user_range(start, end) flushes range of user instructions
Linus Torvalds1da177e2005-04-16 15:20:36 -070032 */
Lars Persson4d46a672015-02-26 14:16:03 +010033
34 /*
35 * This flag is used to indicate that the page pointed to by a pte
36 * is dirty and requires cleaning before returning it to the user.
37 */
38#define PG_dcache_dirty PG_arch_1
39
40#define Page_dcache_dirty(page) \
41 test_bit(PG_dcache_dirty, &(page)->flags)
42#define SetPageDcacheDirty(page) \
43 set_bit(PG_dcache_dirty, &(page)->flags)
44#define ClearPageDcacheDirty(page) \
45 clear_bit(PG_dcache_dirty, &(page)->flags)
46
Linus Torvalds1da177e2005-04-16 15:20:36 -070047extern void (*flush_cache_all)(void);
48extern void (*__flush_cache_all)(void);
49extern void (*flush_cache_mm)(struct mm_struct *mm);
Ralf Baechleec8c0442006-12-12 17:14:57 +000050#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070051extern void (*flush_cache_range)(struct vm_area_struct *vma,
52 unsigned long start, unsigned long end);
53extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn);
54extern void __flush_dcache_page(struct page *page);
55
Ilya Loginov2d4dc892009-11-26 09:16:19 +010056#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
Linus Torvalds1da177e2005-04-16 15:20:36 -070057static inline void flush_dcache_page(struct page *page)
58{
Lars Persson4d46a672015-02-26 14:16:03 +010059 if (cpu_has_dc_aliases)
Linus Torvalds1da177e2005-04-16 15:20:36 -070060 __flush_dcache_page(page);
Lars Persson4d46a672015-02-26 14:16:03 +010061 else if (!cpu_has_ic_fills_f_dc)
62 SetPageDcacheDirty(page);
Linus Torvalds1da177e2005-04-16 15:20:36 -070063}
64
65#define flush_dcache_mmap_lock(mapping) do { } while (0)
66#define flush_dcache_mmap_unlock(mapping) do { } while (0)
67
Ralf Baechle7575a492007-03-23 21:36:37 +000068#define ARCH_HAS_FLUSH_ANON_PAGE
69extern void __flush_anon_page(struct page *, unsigned long);
70static inline void flush_anon_page(struct vm_area_struct *vma,
71 struct page *page, unsigned long vmaddr)
72{
73 if (cpu_has_dc_aliases && PageAnon(page))
74 __flush_anon_page(page, vmaddr);
75}
76
Ralf Baechle585fa722006-08-12 16:40:08 +010077static inline void flush_icache_page(struct vm_area_struct *vma,
78 struct page *page)
79{
80}
81
Atsushi Nemotod4264f12006-01-29 02:27:51 +090082extern void (*flush_icache_range)(unsigned long start, unsigned long end);
Thomas Bogendoerfere0cee3e2008-08-04 20:53:57 +020083extern void (*local_flush_icache_range)(unsigned long start, unsigned long end);
James Hogan01882b42016-09-01 17:30:11 +010084extern void (*__flush_icache_user_range)(unsigned long start,
85 unsigned long end);
86extern void (*__local_flush_icache_user_range)(unsigned long start,
87 unsigned long end);
Ralf Baechle9c5a3d72008-04-05 15:13:23 +010088
89extern void (*__flush_cache_vmap)(void);
90
91static inline void flush_cache_vmap(unsigned long start, unsigned long end)
92{
93 if (cpu_has_dc_aliases)
94 __flush_cache_vmap();
95}
96
97extern void (*__flush_cache_vunmap)(void);
98
99static inline void flush_cache_vunmap(unsigned long start, unsigned long end)
100{
101 if (cpu_has_dc_aliases)
102 __flush_cache_vunmap();
103}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104
Ralf Baechlef8829ca2006-10-21 23:17:35 +0100105extern void copy_to_user_page(struct vm_area_struct *vma,
Ralf Baechle53de0d42005-03-18 17:36:42 +0000106 struct page *page, unsigned long vaddr, void *dst, const void *src,
Ralf Baechlef8829ca2006-10-21 23:17:35 +0100107 unsigned long len);
Ralf Baechle53de0d42005-03-18 17:36:42 +0000108
Ralf Baechlef8829ca2006-10-21 23:17:35 +0100109extern void copy_from_user_page(struct vm_area_struct *vma,
Ralf Baechle53de0d42005-03-18 17:36:42 +0000110 struct page *page, unsigned long vaddr, void *dst, const void *src,
Ralf Baechlef8829ca2006-10-21 23:17:35 +0100111 unsigned long len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112
113extern void (*flush_cache_sigtramp)(unsigned long addr);
114extern void (*flush_icache_all)(void);
Ralf Baechle7e3bfc72006-04-05 20:42:04 +0100115extern void (*local_flush_data_cache_page)(void * addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116extern void (*flush_data_cache_page)(unsigned long addr);
117
Thiemo Seuferba5187d2005-04-25 16:36:23 +0000118/* Run kernel code uncached, useful for cache probing functions. */
Ralf Baechle234fcd12008-03-08 09:56:28 +0000119unsigned long run_uncached(void *func);
Thiemo Seuferba5187d2005-04-25 16:36:23 +0000120
Ralf Baechle7575a492007-03-23 21:36:37 +0000121extern void *kmap_coherent(struct page *page, unsigned long addr);
Ralf Baechleeacb9d62007-04-26 15:46:25 +0100122extern void kunmap_coherent(void);
Paul Burtone2a9e5a2014-03-03 12:08:40 +0000123extern void *kmap_noncoherent(struct page *page, unsigned long addr);
124
125static inline void kunmap_noncoherent(void)
126{
127 kunmap_coherent();
128}
Ralf Baechle7575a492007-03-23 21:36:37 +0000129
Ralf Baechled9cdc9012011-06-17 16:20:28 +0100130#define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE
131static inline void flush_kernel_dcache_page(struct page *page)
132{
133 BUG_ON(cpu_has_dc_aliases && PageHighMem(page));
Paul Burton763fee92016-03-01 02:37:56 +0000134 flush_dcache_page(page);
Ralf Baechled9cdc9012011-06-17 16:20:28 +0100135}
136
137/*
138 * For now flush_kernel_vmap_range and invalidate_kernel_vmap_range both do a
139 * cache writeback and invalidate operation.
140 */
141extern void (*__flush_kernel_vmap_range)(unsigned long vaddr, int size);
142
143static inline void flush_kernel_vmap_range(void *vaddr, int size)
144{
145 if (cpu_has_dc_aliases)
146 __flush_kernel_vmap_range((unsigned long) vaddr, size);
147}
148
149static inline void invalidate_kernel_vmap_range(void *vaddr, int size)
150{
151 if (cpu_has_dc_aliases)
152 __flush_kernel_vmap_range((unsigned long) vaddr, size);
153}
154
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155#endif /* _ASM_CACHEFLUSH_H */