blob: 41c69469ce2000ec223170970c856a2287f10db2 [file] [log] [blame]
Stephen Warrenae278a92012-11-19 16:41:20 -07001config CLKSRC_OF
2 bool
3
Russell King89c0b8e2011-05-08 18:47:58 +01004config CLKSRC_I8253
5 bool
Russell King442c8172011-05-08 14:06:52 +01006
Thomas Gleixnere6220bd2011-06-09 13:08:25 +00007config CLKEVT_I8253
8 bool
9
Ralf Baechle15f304b2011-06-01 19:04:59 +010010config I8253_LOCK
11 bool
12
13config CLKBLD_I8253
Thomas Gleixnere6220bd2011-06-09 13:08:25 +000014 def_bool y if CLKSRC_I8253 || CLKEVT_I8253 || I8253_LOCK
Ralf Baechle15f304b2011-06-01 19:04:59 +010015
Russell King442c8172011-05-08 14:06:52 +010016config CLKSRC_MMIO
17 bool
Jamie Iles06c3df42011-06-06 12:43:07 +010018
19config DW_APB_TIMER
20 bool
Mattias Wallin489bcce2011-05-27 10:30:12 +020021
Dinh Nguyencfda5902012-07-11 15:13:16 -050022config DW_APB_TIMER_OF
23 bool
Heiko Stuebner1b4eca02013-06-04 11:38:11 +020024 select DW_APB_TIMER
Heiko Stuebner10021482013-06-04 11:38:42 +020025 select CLKSRC_OF
Dinh Nguyencfda5902012-07-11 15:13:16 -050026
Gregory CLEMENT6fe9cbd2012-06-13 18:58:09 +020027config ARMADA_370_XP_TIMER
28 bool
29
Sebastian Hesselbarth0c1dcfd2013-06-11 08:38:50 +020030config ORION_TIMER
31 select CLKSRC_OF
32 select CLKSRC_MMIO
33 bool
34
Maxime Ripard119fd632013-03-24 11:49:25 +010035config SUN4I_TIMER
Maxime Ripardb2ac5d72012-11-12 15:07:50 +010036 bool
37
Tony Priskff7ec342013-01-14 17:58:21 +130038config VT8500_TIMER
39 bool
40
Michal Simek4f0f2342013-03-20 10:46:01 +010041config CADENCE_TTC_TIMER
42 bool
43
Linus Walleij694e33a2012-10-18 14:01:25 +020044config CLKSRC_NOMADIK_MTU
45 bool
46 depends on (ARCH_NOMADIK || ARCH_U8500)
47 select CLKSRC_MMIO
48 help
49 Support for Multi Timer Unit. MTU provides access
50 to multiple interrupt generating programmable
51 32-bit free running decrementing counters.
52
53config CLKSRC_NOMADIK_MTU_SCHED_CLOCK
54 bool
55 depends on CLKSRC_NOMADIK_MTU
56 help
57 Use the Multi Timer Unit as the sched_clock.
58
Mattias Wallin489bcce2011-05-27 10:30:12 +020059config CLKSRC_DBX500_PRCMU
60 bool "Clocksource PRCMU Timer"
Linus Walleij29746f42012-04-13 13:16:31 +020061 depends on UX500_SOC_DB8500
Mattias Wallin489bcce2011-05-27 10:30:12 +020062 default y
63 help
64 Use the always on PRCMU Timer as clocksource
65
66config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
67 bool "Clocksource PRCMU Timer sched_clock"
Linus Walleij694e33a2012-10-18 14:01:25 +020068 depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK)
Mattias Wallin489bcce2011-05-27 10:30:12 +020069 default y
70 help
71 Use the always on PRCMU Timer as sched_clock
Marc Zyngier985c0672012-03-05 11:49:30 +000072
Mark Rutland8a4da6e2012-11-12 14:33:44 +000073config ARM_ARCH_TIMER
74 bool
Rob Herring0583fe42013-04-10 18:27:51 -050075 select CLKSRC_OF if OF
James Hogana2c5d4e2012-10-09 10:54:39 +010076
Stuart Menefyc1b40e42013-06-26 12:48:38 +010077config ARM_GLOBAL_TIMER
78 bool
79 select CLKSRC_OF if OF
80 help
81 This options enables support for the ARM global timer unit
82
83config CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
84 bool
85 depends on ARM_GLOBAL_TIMER
86 default y
87 help
88 Use ARM global timer clock source as sched_clock
89
James Hogana2c5d4e2012-10-09 10:54:39 +010090config CLKSRC_METAG_GENERIC
91 def_bool y if METAG
92 help
93 This option enables support for the Meta per-thread timers.
Thomas Abraham6938d75a2013-03-09 16:16:13 +090094
95config CLKSRC_EXYNOS_MCT
96 def_bool y if ARCH_EXYNOS
97 help
98 Support for Multi Core Timer controller on Exynos SoCs.
Arnd Bergmann241a9872013-05-06 23:49:09 +020099
Tomasz Figaf1189982013-04-20 23:22:13 +0200100config CLKSRC_SAMSUNG_PWM
Tomasz Figa77d84432013-04-23 17:46:23 +0200101 bool
Tomasz Figaf1189982013-04-20 23:22:13 +0200102 help
103 This is a new clocksource driver for the PWM timer found in
104 Samsung S3C, S5P and Exynos SoCs, replacing an earlier driver
105 for all devicetree enabled platforms. This driver will be
106 needed only on systems that do not have the Exynos MCT available.
Jingchang Luc1967242013-05-29 10:12:17 +0200107
108config VF_PIT_TIMER
109 bool
110 help
111 Support for Period Interrupt Timer on Freescale Vybrid Family SoCs.