blob: 792bab03b577407573e5cfd369383c2c53f14ac1 [file] [log] [blame]
Sebastian Hesselbarth80a8b542012-08-15 19:07:34 +02001/include/ "skeleton.dtsi"
2
3/ {
4 compatible = "marvell,dove";
5 model = "Marvell Armada 88AP510 SoC";
6
Sebastian Hesselbarth138ee962012-09-25 02:02:16 +02007 soc@f1000000 {
Sebastian Hesselbarth80a8b542012-08-15 19:07:34 +02008 compatible = "simple-bus";
Sebastian Hesselbarth80a8b542012-08-15 19:07:34 +02009 #address-cells = <1>;
10 #size-cells = <1>;
Sebastian Hesselbarth138ee962012-09-25 02:02:16 +020011 interrupt-parent = <&intc>;
12
13 ranges = <0xc8000000 0xc8000000 0x0100000 /* CESA SRAM 1M */
14 0xe0000000 0xe0000000 0x8000000 /* PCIe0 Mem 128M */
15 0xe8000000 0xe8000000 0x8000000 /* PCIe1 Mem 128M */
16 0xf0000000 0xf0000000 0x0100000 /* ScratchPad 1M */
17 0x00000000 0xf1000000 0x1000000 /* SB/NB regs 16M */
18 0xf2000000 0xf2000000 0x0100000 /* PCIe0 I/O 1M */
19 0xf2100000 0xf2100000 0x0100000 /* PCIe0 I/O 1M */
20 0xf8000000 0xf8000000 0x8000000>; /* BootROM 128M */
Sebastian Hesselbarth80a8b542012-08-15 19:07:34 +020021
Sebastian Hesselbarthfd57c652012-09-25 02:02:14 +020022 l2: l2-cache {
23 compatible = "marvell,tauros2-cache";
24 marvell,tauros2-cache-features = <0>;
25 };
26
Sebastian Hesselbarth138ee962012-09-25 02:02:16 +020027 intc: interrupt-controller {
28 compatible = "marvell,orion-intc";
29 interrupt-controller;
30 #interrupt-cells = <1>;
31 reg = <0x20204 0x04>, <0x20214 0x04>;
32 };
33
Sebastian Hesselbarth80a8b542012-08-15 19:07:34 +020034 uart0: serial@12000 {
35 compatible = "ns16550a";
36 reg = <0x12000 0x100>;
37 reg-shift = <2>;
38 interrupts = <7>;
39 clock-frequency = <166666667>;
40 status = "disabled";
41 };
42
43 uart1: serial@12100 {
44 compatible = "ns16550a";
45 reg = <0x12100 0x100>;
46 reg-shift = <2>;
47 interrupts = <8>;
48 clock-frequency = <166666667>;
49 status = "disabled";
50 };
51
52 uart2: serial@12200 {
53 compatible = "ns16550a";
54 reg = <0x12000 0x100>;
55 reg-shift = <2>;
56 interrupts = <9>;
57 clock-frequency = <166666667>;
58 status = "disabled";
59 };
60
61 uart3: serial@12300 {
62 compatible = "ns16550a";
63 reg = <0x12100 0x100>;
64 reg-shift = <2>;
65 interrupts = <10>;
66 clock-frequency = <166666667>;
67 status = "disabled";
68 };
69
70 wdt: wdt@20300 {
71 compatible = "marvell,orion-wdt";
72 reg = <0x20300 0x28>;
73 };
74
75 gpio0: gpio@d0400 {
76 compatible = "marvell,orion-gpio";
77 #gpio-cells = <2>;
78 gpio-controller;
79 reg = <0xd0400 0x20>;
80 ngpio = <32>;
81 interrupts = <12>, <13>, <14>, <60>;
82 };
83
84 gpio1: gpio@d0420 {
85 compatible = "marvell,orion-gpio";
86 #gpio-cells = <2>;
87 gpio-controller;
88 reg = <0xd0420 0x20>;
89 ngpio = <32>;
90 interrupts = <61>;
91 };
92
93 gpio2: gpio@e8400 {
94 compatible = "marvell,orion-gpio";
95 #gpio-cells = <2>;
96 gpio-controller;
97 reg = <0xe8400 0x0c>;
98 ngpio = <8>;
99 };
100
101 spi0: spi@10600 {
102 compatible = "marvell,orion-spi";
103 #address-cells = <1>;
104 #size-cells = <0>;
105 cell-index = <0>;
106 interrupts = <6>;
107 reg = <0x10600 0x28>;
108 status = "disabled";
109 };
110
111 spi1: spi@14600 {
112 compatible = "marvell,orion-spi";
113 #address-cells = <1>;
114 #size-cells = <0>;
115 cell-index = <1>;
116 interrupts = <5>;
117 reg = <0x14600 0x28>;
118 status = "disabled";
119 };
120
121 i2c0: i2c@11000 {
122 compatible = "marvell,mv64xxx-i2c";
123 reg = <0x11000 0x20>;
124 #address-cells = <1>;
125 #size-cells = <0>;
126 interrupts = <11>;
127 clock-frequency = <400000>;
128 timeout-ms = <1000>;
129 status = "disabled";
130 };
131
132 sdio0: sdio@92000 {
133 compatible = "marvell,dove-sdhci";
134 reg = <0x92000 0x100>;
135 interrupts = <35>, <37>;
136 status = "disabled";
137 };
138
139 sdio1: sdio@90000 {
140 compatible = "marvell,dove-sdhci";
141 reg = <0x90000 0x100>;
142 interrupts = <36>, <38>;
143 status = "disabled";
144 };
145
146 sata0: sata@a0000 {
147 compatible = "marvell,orion-sata";
148 reg = <0xa0000 0x2400>;
149 interrupts = <62>;
150 nr-ports = <1>;
151 status = "disabled";
152 };
153 };
154};