blob: 487ced4a40de1004729bd68d9a063f107c4bb94a [file] [log] [blame]
Ralf Baechle07119622005-09-03 15:56:11 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 by Ralf Baechle (ralf@linux-mips.org)
7 */
8#ifndef __ASM_QEMU_H
9#define __ASM_QEMU_H
10
11/*
12 * Interrupt numbers
13 */
14#define Q_PIC_IRQ_BASE 0
Ralf Baechle7bcf7712007-10-11 23:46:09 +010015#define Q_COUNT_COMPARE_IRQ 23
Ralf Baechle07119622005-09-03 15:56:11 -070016
17/*
18 * Qemu clock rate. Unlike on real MIPS this has no relation to the
19 * instruction issue rate, so the choosen value is pure fiction, just needs
20 * to match the value in Qemu itself.
21 */
22#define QEMU_C0_COUNTER_CLOCK 100000000
23
Thiemo Seuferc5831222006-05-15 18:59:34 +010024/*
25 * Magic qemu system control location.
26 */
27#define QEMU_RESTART_REG 0xBFBF0000
28#define QEMU_HALT_REG 0xBFBF0004
29
Ralf Baechle07119622005-09-03 15:56:11 -070030#endif /* __ASM_QEMU_H */