blob: 645217094e510ceb8fc8f3b76d8ffb5da68222ab [file] [log] [blame]
Paul Walmsleyc0718df2011-03-10 22:17:45 -07001/*
2 * OMAP3 Voltage Processor (VP) data
3 *
4 * Copyright (C) 2007, 2010 Texas Instruments, Inc.
5 * Rajendra Nayak <rnayak@ti.com>
6 * Lesly A M <x0080970@ti.com>
7 * Thara Gopinath <thara@ti.com>
8 *
9 * Copyright (C) 2008, 2011 Nokia Corporation
10 * Kalle Jokiniemi
11 * Paul Walmsley
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18#include <linux/io.h>
19#include <linux/err.h>
20#include <linux/init.h>
21
22#include <plat/common.h>
23
24#include "prm-regbits-34xx.h"
25#include "voltage.h"
26
27#include "vp.h"
28
29/*
30 * VP data common to 34xx/36xx chips
31 * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file.
32 */
33static const struct omap_vp_common_data omap3_vp_common = {
34 .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT,
35 .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK,
36 .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT,
37 .vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT,
38 .vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK,
39 .vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK,
40 .vpconfig_initvdd = OMAP3430_INITVDD_MASK,
41 .vpconfig_forceupdate = OMAP3430_FORCEUPDATE_MASK,
42 .vpconfig_vpenable = OMAP3430_VPENABLE_MASK,
43 .vstepmin_smpswaittimemin_shift = OMAP3430_SMPSWAITTIMEMIN_SHIFT,
44 .vstepmax_smpswaittimemax_shift = OMAP3430_SMPSWAITTIMEMAX_SHIFT,
45 .vstepmin_stepmin_shift = OMAP3430_VSTEPMIN_SHIFT,
46 .vstepmax_stepmax_shift = OMAP3430_VSTEPMAX_SHIFT,
47 .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT,
48 .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT,
49 .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT,
50};
51
52static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = {
53 .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
54 .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK,
55};
56
57struct omap_vp_instance_data omap3_vp1_data = {
58 .vp_common = &omap3_vp_common,
59 .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET,
60 .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET,
61 .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET,
62 .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET,
63 .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET,
64 .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET,
65 .prm_irqst_data = &omap3_vp1_prm_irqst_data,
66};
67
68static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = {
69 .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET,
70 .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK,
71};
72
73struct omap_vp_instance_data omap3_vp2_data = {
74 .vp_common = &omap3_vp_common,
75 .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET,
76 .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET,
77 .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET,
78 .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET,
79 .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET,
80 .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET,
81 .prm_irqst_data = &omap3_vp2_prm_irqst_data,
82};