Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 140a23e0dfec6ddf09d3426b288e2653251f666d / . / arch / arm64 / boot / dts / qcom / msm8937.dtsi
blob: 285727d4687966ab4103626f1c9682f8a88d0913 [file] [log] [blame]
Jingbiao Lucff00372018-02-01 15:18:17 +0800[diff] [blame]1/*
2 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include "skeleton64.dtsi"
15#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
16#include <dt-bindings/spmi/spmi.h>
17#include <dt-bindings/interrupt-controller/arm-gic.h>
18
19/ {
20 model = "Qualcomm Technologies, Inc. MSM8937";
21 compatible = "qcom,msm8937";
22 qcom,msm-id = <294 0x0>;
23 interrupt-parent = <&intc>;
24
25 chosen {
26 bootargs = "sched_enable_hmp=1";
27 };
28
29 reserved-memory {
30 #address-cells = <2>;
31 #size-cells = <2>;
32 ranges;
33
34 other_ext_mem: other_ext_region@0 {
35 compatible = "removed-dma-pool";
36 no-map;
37 reg = <0x0 0x85b00000 0x0 0xd00000>;
38 };
39
40 modem_mem: modem_region@0 {
41 compatible = "removed-dma-pool";
42 no-map;
43 reg = <0x0 0x86800000 0x0 0x5000000>;
44 };
45
46 adsp_fw_mem: adsp_fw_region@0 {
47 compatible = "removed-dma-pool";
48 no-map;
49 reg = <0x0 0x8b800000 0x0 0x1100000>;
50 };
51
52 wcnss_fw_mem: wcnss_fw_region@0 {
53 compatible = "removed-dma-pool";
54 no-map;
55 reg = <0x0 0x8c900000 0x0 0x700000>;
56 };
57
58
59 venus_mem: venus_region@0 {
60 compatible = "shared-dma-pool";
61 reusable;
62 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
63 alignment = <0 0x400000>;
64 size = <0 0x0800000>;
65 };
66
67 secure_mem: secure_region@0 {
68 compatible = "shared-dma-pool";
69 reusable;
70 alignment = <0 0x400000>;
71 size = <0 0x7000000>;
72 };
73
74 qseecom_mem: qseecom_region@0 {
75 compatible = "shared-dma-pool";
76 reusable;
77 alignment = <0 0x400000>;
78 size = <0 0x1000000>;
79 };
80
81 adsp_mem: adsp_region@0 {
82 compatible = "shared-dma-pool";
83 reusable;
84 alignment = <0 0x400000>;
85 size = <0 0x400000>;
86 };
87
88 cont_splash_mem: splash_region@83000000 {
89 reg = <0x0 0x90000000 0x0 0x1400000>;
90 };
91
92 };
93
94 aliases {
95 /* smdtty devices */
96 smd1 = &smdtty_apps_fm;
97 smd2 = &smdtty_apps_riva_bt_acl;
98 smd3 = &smdtty_apps_riva_bt_cmd;
99 smd4 = &smdtty_mbalbridge;
100 smd5 = &smdtty_apps_riva_ant_cmd;
101 smd6 = &smdtty_apps_riva_ant_data;
102 smd7 = &smdtty_data1;
103 smd8 = &smdtty_data4;
104 smd11 = &smdtty_data11;
105 smd21 = &smdtty_data21;
106 smd36 = &smdtty_loopback;
107 };
108
109 soc: soc { };
110
111 vendor: vendor {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 ranges = <0 0 0 0xffffffff>;
115 compatible = "simple-bus";
116 };
117
118
119};
120
121#include "msm8937-pinctrl.dtsi"
122#include "msm8937-cpu.dtsi"
123#include "msm8937-ion.dtsi"
124
125&soc {
126 #address-cells = <1>;
127 #size-cells = <1>;
128 ranges = <0 0 0 0xffffffff>;
129 compatible = "simple-bus";
130
131 intc: interrupt-controller@b000000 {
132 compatible = "qcom,msm-qgic2";
133 interrupt-controller;
134 #interrupt-cells = <3>;
135 reg = <0x0b000000 0x1000>,
136 <0x0b002000 0x1000>;
137 };
138
139 timer {
140 compatible = "arm,armv8-timer";
141 interrupts = <1 2 0xff08>,
142 <1 3 0xff08>,
143 <1 4 0xff08>,
144 <1 1 0xff08>;
145 clock-frequency = <19200000>;
146 };
147
148 timer@b120000 {
149 #address-cells = <1>;
150 #size-cells = <1>;
151 ranges;
152 compatible = "arm,armv7-timer-mem";
153 reg = <0xb120000 0x1000>;
154 clock-frequency = <19200000>;
155
156 frame@b121000 {
157 frame-number = <0>;
158 interrupts = <0 8 0x4>,
159 <0 7 0x4>;
160 reg = <0xb121000 0x1000>,
161 <0xb122000 0x1000>;
162 };
163
164 frame@b123000 {
165 frame-number = <1>;
166 interrupts = <0 9 0x4>;
167 reg = <0xb123000 0x1000>;
168 status = "disabled";
169 };
170
171 frame@b124000 {
172 frame-number = <2>;
173 interrupts = <0 10 0x4>;
174 reg = <0xb124000 0x1000>;
175 status = "disabled";
176 };
177
178 frame@b125000 {
179 frame-number = <3>;
180 interrupts = <0 11 0x4>;
181 reg = <0xb125000 0x1000>;
182 status = "disabled";
183 };
184
185 frame@b126000 {
186 frame-number = <4>;
187 interrupts = <0 12 0x4>;
188 reg = <0xb126000 0x1000>;
189 status = "disabled";
190 };
191
192 frame@b127000 {
193 frame-number = <5>;
194 interrupts = <0 13 0x4>;
195 reg = <0xb127000 0x1000>;
196 status = "disabled";
197 };
198
199 frame@b128000 {
200 frame-number = <6>;
201 interrupts = <0 14 0x4>;
202 reg = <0xb128000 0x1000>;
203 status = "disabled";
204 };
205 };
206
207 qcom,rmtfs_sharedmem@00000000 {
208 compatible = "qcom,sharedmem-uio";
209 reg = <0x00000000 0x00180000>;
210 reg-names = "rmtfs";
211 qcom,client-id = <0x00000001>;
212 };
213
214 restart@4ab000 {
215 compatible = "qcom,pshold";
216 reg = <0x4ab000 0x4>,
217 <0x193d100 0x4>;
218 reg-names = "pshold-base", "tcsr-boot-misc-detect";
219 };
220
221 qcom,mpm2-sleep-counter@4a3000 {
222 compatible = "qcom,mpm2-sleep-counter";
223 reg = <0x4a3000 0x1000>;
224 clock-frequency = <32768>;
225 };
226
227 cpu-pmu {
228 compatible = "arm,armv8-pmuv3";
229 interrupts = <1 7 0xff00>;
230 };
231
232 qcom,sps {
233 compatible = "qcom,msm_sps_4k";
234 qcom,pipe-attr-ee;
235 };
236
237 slim_msm: slim@c140000{
238 cell-index = <1>;
239 compatible = "qcom,slim-ngd";
240 reg = <0xc140000 0x2c000>,
241 <0xc104000 0x2a000>;
242 reg-names = "slimbus_physical", "slimbus_bam_physical";
243 interrupts = <0 163 0>, <0 180 0>;
244 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
245 qcom,apps-ch-pipes = <0x600000>;
246 qcom,ea-pc = <0x230>;
247 status = "disabled";
248 };
249
250 blsp1_uart2: serial@78b0000 {
251 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
252 reg = <0x78b0000 0x200>;
253 interrupts = <0 108 0>;
254 status = "disabled";
255 };
256
257 dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
258 #dma-cells = <4>;
259 compatible = "qcom,sps-dma";
260 reg = <0x7884000 0x1f000>;
261 interrupts = <0 238 0>;
262 qcom,summing-threshold = <10>;
263 };
264
265 dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */
266 #dma-cells = <4>;
267 compatible = "qcom,sps-dma";
268 reg = <0x7ac4000 0x1f000>;
269 interrupts = <0 239 0>;
270 qcom,summing-threshold = <10>;
271 };
272
273
274 cpubw: qcom,cpubw {
275 compatible = "qcom,devbw";
276 governor = "cpufreq";
277 qcom,src-dst-ports = <1 512>;
278 qcom,active-only;
279 qcom,bw-tbl =
280 < 769 /* 100.8 MHz */ >,
281 < 1611 /* 211.2 MHz */ >,
282 < 2124 /* 278.4 MHz */ >,
283 < 2929 /* 384 MHz */ >, /* SVS */
284 < 4101 /* 537.6 MHz */ >,
285 < 4248 /* 556.8 MHz */ >,
286 < 5053 /* 662.4 MHz */ >, /* SVS+ */
287 < 5712 /* 748.8 MHz */ >, /* NOM */
288 < 6152 /* 806.4 MHz */ >, /* NOM+ */
289 < 7031 /* 921.6 MHz */ >; /* TURBO */
290 };
291
292 qcom,cpu-bwmon {
293 compatible = "qcom,bimc-bwmon2";
294 reg = <0x408000 0x300>, <0x401000 0x200>;
295 reg-names = "base", "global_base";
296 interrupts = <0 183 4>;
297 qcom,mport = <0>;
298 qcom,target-dev = <&cpubw>;
299 };
300
301 mincpubw: qcom,mincpubw {
302 compatible = "qcom,devbw";
303 governor = "cpufreq";
304 qcom,src-dst-ports = <1 512>;
305 qcom,active-only;
306 qcom,bw-tbl =
307 < 769 /* 100.8 MHz */ >,
308 < 1611 /* 211.2 MHz */ >,
309 < 2124 /* 278.4 MHz */ >,
310 < 2929 /* 384 MHz */ >, /* SVS */
311 < 4101 /* 537.6 MHz */ >,
312 < 4248 /* 556.8 MHz */ >,
313 < 5053 /* 662.4 MHz */ >, /* SVS+ */
314 < 5712 /* 748.8 MHz */ >, /* NOM */
315 < 6152 /* 806.4 MHz */ >, /* NOM+ */
316 < 7031 /* 921.6 MHz */ >; /* TURBO */
317 };
318
319 qcom,ipc-spinlock@1905000 {
320 compatible = "qcom,ipc-spinlock-sfpb";
321 reg = <0x1905000 0x8000>;
322 qcom,num-locks = <8>;
323 };
324
325 qcom,smem@86300000 {
326 compatible = "qcom,smem";
327 reg = <0x86300000 0x100000>,
328 <0xb011008 0x4>,
329 <0x60000 0x8000>,
330 <0x193d000 0x8>;
331 reg-names = "smem", "irq-reg-base", "aux-mem1",
332 "smem_targ_info_reg";
333 qcom,mpu-enabled;
334
335 qcom,smd-modem {
336 compatible = "qcom,smd";
337 qcom,smd-edge = <0>;
338 qcom,smd-irq-offset = <0x0>;
339 qcom,smd-irq-bitmask = <0x1000>;
340 interrupts = <0 25 1>;
341 label = "modem";
342 qcom,not-loadable;
343 };
344
345 qcom,smsm-modem {
346 compatible = "qcom,smsm";
347 qcom,smsm-edge = <0>;
348 qcom,smsm-irq-offset = <0x0>;
349 qcom,smsm-irq-bitmask = <0x2000>;
350 interrupts = <0 26 1>;
351 };
352
353 qcom,smd-wcnss {
354 compatible = "qcom,smd";
355 qcom,smd-edge = <6>;
356 qcom,smd-irq-offset = <0x0>;
357 qcom,smd-irq-bitmask = <0x20000>;
358 interrupts = <0 142 1>;
359 label = "wcnss";
360 };
361
362 qcom,smsm-wcnss {
363 compatible = "qcom,smsm";
364 qcom,smsm-edge = <6>;
365 qcom,smsm-irq-offset = <0x0>;
366 qcom,smsm-irq-bitmask = <0x80000>;
367 interrupts = <0 144 1>;
368 };
369
370 qcom,smd-adsp {
371 compatible = "qcom,smd";
372 qcom,smd-edge = <1>;
373 qcom,smd-irq-offset = <0x0>;
374 qcom,smd-irq-bitmask = <0x100>;
375 interrupts = <0 289 1>;
376 label = "adsp";
377 };
378
379 qcom,smsm-adsp {
380 compatible = "qcom,smsm";
381 qcom,smsm-edge = <1>;
382 qcom,smsm-irq-offset = <0x0>;
383 qcom,smsm-irq-bitmask = <0x200>;
384 interrupts = <0 290 1>;
385 };
386
387 qcom,smd-rpm {
388 compatible = "qcom,smd";
389 qcom,smd-edge = <15>;
390 qcom,smd-irq-offset = <0x0>;
391 qcom,smd-irq-bitmask = <0x1>;
392 interrupts = <0 168 1>;
393 label = "rpm";
394 qcom,irq-no-suspend;
395 qcom,not-loadable;
396 };
397 };
398
399 rpm_bus: qcom,rpm-smd {
400 compatible = "qcom,rpm-smd";
401 rpm-channel-name = "rpm_requests";
402 rpm-channel-type = <15>; /* SMD_APPS_RPM */
403 };
404
405 qcom,wdt@b017000 {
406 compatible = "qcom,msm-watchdog";
407 reg = <0xb017000 0x1000>;
408 reg-names = "wdt-base";
409 interrupts = <0 3 0>, <0 4 0>;
410 qcom,bark-time = <11000>;
411 qcom,pet-time = <10000>;
412 qcom,ipi-ping;
413 qcom,wakeup-enable;
414 status = "okay";
415 };
416
417 spmi_bus: qcom,spmi@200f000 {
418 compatible = "qcom,spmi-pmic-arb";
419 reg = <0x200f000 0x1000>,
420 <0x2400000 0x800000>,
421 <0x2c00000 0x800000>,
422 <0x3800000 0x200000>,
423 <0x200a000 0x2100>;
424 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
425 interrupt-names = "periph_irq";
426 interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
427 qcom,ee = <0>;
428 qcom,channel = <0>;
429 #address-cells = <1>;
430 #size-cells = <1>;
431 interrupt-controller;
432 #interrupt-cells = <4>;
433 cell-index = <0>;
434 };
435
436 qcom,chd {
437 compatible = "qcom,core-hang-detect";
438 qcom,threshold-arr = <0xb088094 0xb098094 0xb0a8094
439 0xb0b8094 0xb188094 0xb198094 0xb1a8094 0xb1a8094>;
440 qcom,config-arr = <0xb08809c 0xb09809c 0xb0a809c
441 0xb0b809c 0xb18809c 0xb19809c 0xb1a809c 0xb1b809c>;
442 };
443
444 qcom,msm-rtb {
445 compatible = "qcom,msm-rtb";
446 qcom,rtb-size = <0x100000>; /* 1M EBI1 buffer */
447 };
448
449 qcom,msm-imem@8600000 {
450 compatible = "qcom,msm-imem";
451 reg = <0x08600000 0x1000>; /* Address and size of IMEM */
452 ranges = <0x0 0x08600000 0x1000>;
453 #address-cells = <1>;
454 #size-cells = <1>;
455
456 mem_dump_table@10 {
457 compatible = "qcom,msm-imem-mem_dump_table";
458 reg = <0x10 8>;
459 };
460
461 dload_type@18 {
462 compatible = "qcom,msm-imem-dload-type";
463 reg = <0x18 4>;
464 };
465
466 restart_reason@65c {
467 compatible = "qcom,msm-imem-restart_reason";
468 reg = <0x65c 4>;
469 };
470
471 boot_stats@6b0 {
472 compatible = "qcom,msm-imem-boot_stats";
473 reg = <0x6b0 32>;
474 };
475
476 pil@94c {
477 compatible = "qcom,msm-imem-pil";
478 reg = <0x94c 200>;
479 };
480 };
481
482 qcom,smdtty {
483 compatible = "qcom,smdtty";
484
485 smdtty_apps_fm: qcom,smdtty-apps-fm {
486 qcom,smdtty-remote = "wcnss";
487 qcom,smdtty-port-name = "APPS_FM";
488 };
489
490 smdtty_apps_riva_bt_acl: smdtty-apps-riva-bt-acl {
491 qcom,smdtty-remote = "wcnss";
492 qcom,smdtty-port-name = "APPS_RIVA_BT_ACL";
493 };
494
495 smdtty_apps_riva_bt_cmd: qcom,smdtty-apps-riva-bt-cmd {
496 qcom,smdtty-remote = "wcnss";
497 qcom,smdtty-port-name = "APPS_RIVA_BT_CMD";
498 };
499
500 smdtty_mbalbridge: qcom,smdtty-mbalbridge {
501 qcom,smdtty-remote = "modem";
502 qcom,smdtty-port-name = "MBALBRIDGE";
503 };
504
505 smdtty_apps_riva_ant_cmd: smdtty-apps-riva-ant-cmd {
506 qcom,smdtty-remote = "wcnss";
507 qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD";
508 };
509
510 smdtty_apps_riva_ant_data: smdtty-apps-riva-ant-data {
511 qcom,smdtty-remote = "wcnss";
512 qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA";
513 };
514
515 smdtty_data1: qcom,smdtty-data1 {
516 qcom,smdtty-remote = "modem";
517 qcom,smdtty-port-name = "DATA1";
518 };
519
520 smdtty_data4: qcom,smdtty-data4 {
521 qcom,smdtty-remote = "modem";
522 qcom,smdtty-port-name = "DATA4";
523 };
524
525 smdtty_data11: qcom,smdtty-data11 {
526 qcom,smdtty-remote = "modem";
527 qcom,smdtty-port-name = "DATA11";
528 };
529
530 smdtty_data21: qcom,smdtty-data21 {
531 qcom,smdtty-remote = "modem";
532 qcom,smdtty-port-name = "DATA21";
533 };
534
535 smdtty_loopback: smdtty-loopback {
536 qcom,smdtty-remote = "modem";
537 qcom,smdtty-port-name = "LOOPBACK";
538 qcom,smdtty-dev-name = "LOOPBACK_TTY";
539 };
540 };
541
542 qcom,smdpkt {
543 compatible = "qcom,smdpkt";
544
545 qcom,smdpkt-data5-cntl {
546 qcom,smdpkt-remote = "modem";
547 qcom,smdpkt-port-name = "DATA5_CNTL";
548 qcom,smdpkt-dev-name = "smdcntl0";
549 };
550
551 qcom,smdpkt-data22 {
552 qcom,smdpkt-remote = "modem";
553 qcom,smdpkt-port-name = "DATA22";
554 qcom,smdpkt-dev-name = "smd22";
555 };
556
557 qcom,smdpkt-data40-cntl {
558 qcom,smdpkt-remote = "modem";
559 qcom,smdpkt-port-name = "DATA40_CNTL";
560 qcom,smdpkt-dev-name = "smdcntl8";
561 };
562
563 qcom,smdpkt-apr-apps2 {
564 qcom,smdpkt-remote = "adsp";
565 qcom,smdpkt-port-name = "apr_apps2";
566 qcom,smdpkt-dev-name = "apr_apps2";
567 };
568
569 qcom,smdpkt-loopback {
570 qcom,smdpkt-remote = "modem";
571 qcom,smdpkt-port-name = "LOOPBACK";
572 qcom,smdpkt-dev-name = "smd_pkt_loopback";
573 };
574 };
575
576 qcom_tzlog: tz-log@08600720 {
577 compatible = "qcom,tz-log";
578 reg = <0x08600720 0x2000>;
579 };
580
581 qcom,ipc_router {
582 compatible = "qcom,ipc_router";
583 qcom,node-id = <1>;
584 };
585
586 qcom,ipc_router_modem_xprt {
587 compatible = "qcom,ipc_router_smd_xprt";
588 qcom,ch-name = "IPCRTR";
589 qcom,xprt-remote = "modem";
590 qcom,xprt-linkid = <1>;
591 qcom,xprt-version = <1>;
592 qcom,fragmented-data;
593 qcom,disable-pil-loading;
594 };
595
596 qcom,ipc_router_q6_xprt {
597 compatible = "qcom,ipc_router_smd_xprt";
598 qcom,ch-name = "IPCRTR";
599 qcom,xprt-remote = "adsp";
600 qcom,xprt-linkid = <1>;
601 qcom,xprt-version = <1>;
602 qcom,fragmented-data;
603 };
604
605 qcom,ipc_router_wcnss_xprt {
606 compatible = "qcom,ipc_router_smd_xprt";
607 qcom,ch-name = "IPCRTR";
608 qcom,xprt-remote = "wcnss";
609 qcom,xprt-linkid = <1>;
610 qcom,xprt-version = <1>;
611 qcom,fragmented-data;
612 };
613
614 qcom,adsprpc-mem {
615 compatible = "qcom,msm-adsprpc-mem-region";
616 memory-region = <&adsp_mem>;
617 };
618
619};
620
621#include "pm8937-rpm-regulator.dtsi"
622#include "msm8937-regulator.dtsi"
623#include "pm8937.dtsi"