Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2012-2015, 2017-2018, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | * |
| 12 | */ |
| 13 | #include <linux/delay.h> |
| 14 | #include <linux/io.h> |
| 15 | #include <linux/dma-mapping.h> |
| 16 | #include <linux/slab.h> |
| 17 | #include <linux/iopoll.h> |
| 18 | #include <linux/of_device.h> |
| 19 | #include <linux/of_gpio.h> |
| 20 | |
| 21 | #include "dsi_v2.h" |
| 22 | |
| 23 | static struct dsi_interface dsi_intf; |
| 24 | |
| 25 | static int dsi_off(struct mdss_panel_data *pdata) |
| 26 | { |
| 27 | int rc = 0; |
| 28 | |
| 29 | pr_debug("turn off dsi controller\n"); |
| 30 | if (dsi_intf.off) |
| 31 | rc = dsi_intf.off(pdata); |
| 32 | |
| 33 | if (rc) { |
| 34 | pr_err("mdss_dsi_off DSI failed %d\n", rc); |
| 35 | return rc; |
| 36 | } |
| 37 | return rc; |
| 38 | } |
| 39 | |
| 40 | static int dsi_on(struct mdss_panel_data *pdata) |
| 41 | { |
| 42 | int rc = 0; |
| 43 | |
| 44 | pr_debug("dsi_on DSI controller on\n"); |
| 45 | if (dsi_intf.on) |
| 46 | rc = dsi_intf.on(pdata); |
| 47 | |
| 48 | if (rc) { |
| 49 | pr_err("mdss_dsi_on DSI failed %d\n", rc); |
| 50 | return rc; |
| 51 | } |
| 52 | return rc; |
| 53 | } |
| 54 | |
| 55 | static int dsi_update_pconfig(struct mdss_panel_data *pdata, |
| 56 | int mode) |
| 57 | { |
| 58 | int ret = 0; |
| 59 | struct mdss_panel_info *pinfo = &pdata->panel_info; |
| 60 | struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; |
| 61 | |
| 62 | if (!pdata) |
| 63 | return -ENODEV; |
| 64 | ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, |
| 65 | panel_data); |
| 66 | |
| 67 | if (mode == DSI_CMD_MODE) { |
| 68 | pinfo->mipi.mode = DSI_CMD_MODE; |
| 69 | pinfo->type = MIPI_CMD_PANEL; |
| 70 | pinfo->mipi.vsync_enable = 1; |
| 71 | pinfo->mipi.hw_vsync_mode = 1; |
| 72 | } else { |
| 73 | pinfo->mipi.mode = DSI_VIDEO_MODE; |
| 74 | pinfo->type = MIPI_VIDEO_PANEL; |
| 75 | pinfo->mipi.vsync_enable = 0; |
| 76 | pinfo->mipi.hw_vsync_mode = 0; |
| 77 | } |
| 78 | |
| 79 | ctrl_pdata->panel_mode = pinfo->mipi.mode; |
| 80 | mdss_panel_get_dst_fmt(pinfo->bpp, pinfo->mipi.mode, |
| 81 | pinfo->mipi.pixel_packing, &(pinfo->mipi.dst_format)); |
| 82 | pinfo->cont_splash_enabled = 0; |
| 83 | |
| 84 | return ret; |
| 85 | } |
| 86 | |
| 87 | static int dsi_panel_handler(struct mdss_panel_data *pdata, int enable) |
| 88 | { |
| 89 | int rc = 0; |
| 90 | struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL; |
| 91 | |
| 92 | pr_debug("dsi_panel_handler enable=%d\n", enable); |
| 93 | if (!pdata) |
| 94 | return -ENODEV; |
| 95 | ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata, |
| 96 | panel_data); |
| 97 | |
| 98 | if (enable && |
| 99 | (pdata->panel_info.panel_power_state == MDSS_PANEL_POWER_OFF)) { |
| 100 | if (!pdata->panel_info.dynamic_switch_pending) { |
| 101 | mdss_dsi_panel_reset(pdata, 1); |
| 102 | rc = ctrl_pdata->on(pdata); |
| 103 | if (rc) |
| 104 | pr_err("dsi_panel_handler panel on failed %d\n", |
| 105 | rc); |
| 106 | } |
| 107 | pdata->panel_info.panel_power_state = MDSS_PANEL_POWER_ON; |
| 108 | if (pdata->panel_info.type == MIPI_CMD_PANEL) |
| 109 | mdss_dsi_set_tear_on(ctrl_pdata); |
| 110 | } else if (!enable && |
| 111 | (pdata->panel_info.panel_power_state == MDSS_PANEL_POWER_ON)) { |
| 112 | msm_dsi_sw_reset(); |
| 113 | if (dsi_intf.op_mode_config) |
| 114 | dsi_intf.op_mode_config(DSI_CMD_MODE, pdata); |
| 115 | if (pdata->panel_info.dynamic_switch_pending) { |
| 116 | pr_info("%s: switching to %s mode\n", __func__, |
| 117 | (pdata->panel_info.mipi.mode ? "video" : "command")); |
| 118 | if (pdata->panel_info.type == MIPI_CMD_PANEL) { |
| 119 | ctrl_pdata->switch_mode(pdata, DSI_VIDEO_MODE); |
| 120 | } else if (pdata->panel_info.type == MIPI_VIDEO_PANEL) { |
| 121 | ctrl_pdata->switch_mode(pdata, DSI_CMD_MODE); |
| 122 | mdss_dsi_set_tear_off(ctrl_pdata); |
| 123 | } |
| 124 | } |
| 125 | pdata->panel_info.panel_power_state = MDSS_PANEL_POWER_OFF; |
| 126 | if (!pdata->panel_info.dynamic_switch_pending) { |
| 127 | rc = ctrl_pdata->off(pdata); |
| 128 | mdss_dsi_panel_reset(pdata, 0); |
| 129 | } |
| 130 | } |
| 131 | return rc; |
| 132 | } |
| 133 | |
| 134 | static int dsi_splash_on(struct mdss_panel_data *pdata) |
| 135 | { |
| 136 | int rc = 0; |
| 137 | |
| 138 | pr_debug("%s:\n", __func__); |
| 139 | |
| 140 | if (dsi_intf.cont_on) |
| 141 | rc = dsi_intf.cont_on(pdata); |
| 142 | |
| 143 | if (rc) { |
| 144 | pr_err("mdss_dsi_on DSI failed %d\n", rc); |
| 145 | return rc; |
| 146 | } |
| 147 | return rc; |
| 148 | } |
| 149 | |
| 150 | static int dsi_clk_ctrl(struct mdss_panel_data *pdata, int enable) |
| 151 | { |
| 152 | int rc = 0; |
| 153 | |
| 154 | pr_debug("%s:\n", __func__); |
| 155 | |
| 156 | if (dsi_intf.clk_ctrl) |
| 157 | rc = dsi_intf.clk_ctrl(pdata, enable); |
| 158 | |
| 159 | return rc; |
| 160 | } |
| 161 | |
| 162 | static int dsi_event_handler(struct mdss_panel_data *pdata, |
| 163 | int event, void *arg) |
| 164 | { |
| 165 | int rc = 0; |
| 166 | |
| 167 | if (!pdata) { |
| 168 | pr_err("%s: Invalid input data\n", __func__); |
| 169 | return -ENODEV; |
| 170 | } |
| 171 | |
| 172 | switch (event) { |
| 173 | case MDSS_EVENT_UNBLANK: |
| 174 | rc = dsi_on(pdata); |
| 175 | break; |
| 176 | case MDSS_EVENT_BLANK: |
| 177 | rc = dsi_off(pdata); |
| 178 | break; |
| 179 | case MDSS_EVENT_PANEL_ON: |
| 180 | rc = dsi_panel_handler(pdata, 1); |
| 181 | break; |
| 182 | case MDSS_EVENT_PANEL_OFF: |
| 183 | rc = dsi_panel_handler(pdata, 0); |
| 184 | break; |
| 185 | case MDSS_EVENT_CONT_SPLASH_BEGIN: |
| 186 | rc = dsi_splash_on(pdata); |
| 187 | break; |
| 188 | case MDSS_EVENT_PANEL_CLK_CTRL: |
| 189 | rc = dsi_clk_ctrl(pdata, |
| 190 | (int)(((struct dsi_panel_clk_ctrl *)arg)->state)); |
| 191 | break; |
| 192 | case MDSS_EVENT_DSI_UPDATE_PANEL_DATA: |
| 193 | rc = dsi_update_pconfig(pdata, (int)(unsigned long) arg); |
| 194 | break; |
| 195 | default: |
| 196 | pr_debug("%s: unhandled event=%d\n", __func__, event); |
| 197 | break; |
| 198 | } |
| 199 | return rc; |
| 200 | } |
| 201 | |
| 202 | static int dsi_parse_gpio(struct platform_device *pdev, |
| 203 | struct mdss_dsi_ctrl_pdata *ctrl_pdata) |
| 204 | { |
| 205 | struct device_node *np = pdev->dev.of_node; |
| 206 | |
| 207 | ctrl_pdata->disp_en_gpio = of_get_named_gpio(np, |
| 208 | "qcom,platform-enable-gpio", 0); |
| 209 | |
| 210 | if (!gpio_is_valid(ctrl_pdata->disp_en_gpio)) |
| 211 | pr_err("%s:%d, Disp_en gpio not specified\n", |
| 212 | __func__, __LINE__); |
| 213 | |
| 214 | ctrl_pdata->rst_gpio = of_get_named_gpio(np, |
| 215 | "qcom,platform-reset-gpio", 0); |
| 216 | if (!gpio_is_valid(ctrl_pdata->rst_gpio)) |
| 217 | pr_err("%s:%d, reset gpio not specified\n", |
| 218 | __func__, __LINE__); |
| 219 | |
| 220 | ctrl_pdata->mode_gpio = -1; |
| 221 | if (ctrl_pdata->panel_data.panel_info.mode_gpio_state != |
| 222 | MODE_GPIO_NOT_VALID) { |
| 223 | ctrl_pdata->mode_gpio = of_get_named_gpio(np, |
| 224 | "qcom,platform-mode-gpio", 0); |
| 225 | if (!gpio_is_valid(ctrl_pdata->mode_gpio)) |
| 226 | pr_info("%s:%d, reset gpio not specified\n", |
| 227 | __func__, __LINE__); |
| 228 | } |
| 229 | |
| 230 | ctrl_pdata->bklt_en_gpio = of_get_named_gpio(np, |
| 231 | "qcom,platform-bklight-en-gpio", 0); |
| 232 | if (!gpio_is_valid(ctrl_pdata->bklt_en_gpio)) |
| 233 | pr_err("%s:%d, bklt_en gpio not specified\n", |
| 234 | __func__, __LINE__); |
| 235 | |
| 236 | return 0; |
| 237 | } |
| 238 | |
| 239 | static void mdss_dsi_put_dt_vreg_data(struct device *dev, |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 240 | struct mdss_module_power *module_power) |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 241 | { |
| 242 | if (!module_power) { |
| 243 | pr_err("%s: invalid input\n", __func__); |
| 244 | return; |
| 245 | } |
| 246 | |
| 247 | if (module_power->vreg_config) { |
| 248 | devm_kfree(dev, module_power->vreg_config); |
| 249 | module_power->vreg_config = NULL; |
| 250 | } |
| 251 | module_power->num_vreg = 0; |
| 252 | } |
| 253 | |
| 254 | static int mdss_dsi_get_dt_vreg_data(struct device *dev, |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 255 | struct mdss_module_power *mp, enum dsi_pm_type module) |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 256 | { |
| 257 | int i = 0, rc = 0; |
| 258 | u32 tmp = 0; |
| 259 | struct device_node *of_node = NULL, *supply_node = NULL; |
| 260 | const char *pm_supply_name = NULL; |
| 261 | struct device_node *supply_root_node = NULL; |
| 262 | |
| 263 | if (!dev || !mp) { |
| 264 | pr_err("%s: invalid input\n", __func__); |
| 265 | rc = -EINVAL; |
| 266 | return rc; |
| 267 | } |
| 268 | |
| 269 | of_node = dev->of_node; |
| 270 | |
| 271 | mp->num_vreg = 0; |
| 272 | pm_supply_name = __mdss_dsi_pm_supply_node_name(module); |
| 273 | supply_root_node = of_get_child_by_name(of_node, pm_supply_name); |
| 274 | if (!supply_root_node) { |
| 275 | pr_err("no supply entry present\n"); |
| 276 | goto novreg; |
| 277 | } |
| 278 | |
| 279 | for_each_child_of_node(supply_root_node, supply_node) { |
| 280 | mp->num_vreg++; |
| 281 | } |
| 282 | |
| 283 | if (mp->num_vreg == 0) { |
| 284 | pr_debug("%s: no vreg\n", __func__); |
| 285 | goto novreg; |
| 286 | } else { |
| 287 | pr_debug("%s: vreg found. count=%d\n", __func__, mp->num_vreg); |
| 288 | } |
| 289 | |
Sachin Bhayare | 5076e25 | 2018-01-18 14:56:45 +0530 | [diff] [blame] | 290 | mp->vreg_config = devm_kzalloc(dev, sizeof(struct mdss_vreg) * |
Sachin Bhayare | eeb8889 | 2018-01-02 16:36:01 +0530 | [diff] [blame] | 291 | mp->num_vreg, GFP_KERNEL); |
| 292 | if (!mp->vreg_config) { |
| 293 | rc = -ENOMEM; |
| 294 | goto error; |
| 295 | } |
| 296 | |
| 297 | for_each_child_of_node(supply_root_node, supply_node) { |
| 298 | const char *st = NULL; |
| 299 | /* vreg-name */ |
| 300 | rc = of_property_read_string(supply_node, |
| 301 | "qcom,supply-name", &st); |
| 302 | if (rc) { |
| 303 | pr_err("%s: error reading name. rc=%d\n", |
| 304 | __func__, rc); |
| 305 | goto error; |
| 306 | } |
| 307 | snprintf(mp->vreg_config[i].vreg_name, |
| 308 | ARRAY_SIZE((mp->vreg_config[i].vreg_name)), "%s", st); |
| 309 | /* vreg-min-voltage */ |
| 310 | rc = of_property_read_u32(supply_node, |
| 311 | "qcom,supply-min-voltage", &tmp); |
| 312 | if (rc) { |
| 313 | pr_err("%s: error reading min volt. rc=%d\n", |
| 314 | __func__, rc); |
| 315 | goto error; |
| 316 | } |
| 317 | mp->vreg_config[i].min_voltage = tmp; |
| 318 | |
| 319 | /* vreg-max-voltage */ |
| 320 | rc = of_property_read_u32(supply_node, |
| 321 | "qcom,supply-max-voltage", &tmp); |
| 322 | if (rc) { |
| 323 | pr_err("%s: error reading max volt. rc=%d\n", |
| 324 | __func__, rc); |
| 325 | goto error; |
| 326 | } |
| 327 | mp->vreg_config[i].max_voltage = tmp; |
| 328 | |
| 329 | /* enable-load */ |
| 330 | rc = of_property_read_u32(supply_node, |
| 331 | "qcom,supply-enable-load", &tmp); |
| 332 | if (rc) { |
| 333 | pr_err("%s: error reading enable load. rc=%d\n", |
| 334 | __func__, rc); |
| 335 | goto error; |
| 336 | } |
| 337 | mp->vreg_config[i].load[DSS_REG_MODE_ENABLE] = tmp; |
| 338 | |
| 339 | /* disable-load */ |
| 340 | rc = of_property_read_u32(supply_node, |
| 341 | "qcom,supply-disable-load", &tmp); |
| 342 | if (rc) { |
| 343 | pr_err("%s: error reading disable load. rc=%d\n", |
| 344 | __func__, rc); |
| 345 | goto error; |
| 346 | } |
| 347 | mp->vreg_config[i].load[DSS_REG_MODE_DISABLE] = tmp; |
| 348 | |
| 349 | /* ulp-load */ |
| 350 | rc = of_property_read_u32(supply_node, |
| 351 | "qcom,supply-ulp-load", &tmp); |
| 352 | if (rc) |
| 353 | pr_warn("%s: error reading ulp load. rc=%d\n", |
| 354 | __func__, rc); |
| 355 | |
| 356 | mp->vreg_config[i].load[DSS_REG_MODE_ULP] = (!rc ? tmp : |
| 357 | mp->vreg_config[i].load[DSS_REG_MODE_ENABLE]); |
| 358 | |
| 359 | /* pre-sleep */ |
| 360 | rc = of_property_read_u32(supply_node, |
| 361 | "qcom,supply-pre-on-sleep", &tmp); |
| 362 | if (rc) { |
| 363 | pr_debug("%s: error reading supply pre sleep value. rc=%d\n", |
| 364 | __func__, rc); |
| 365 | rc = 0; |
| 366 | } else { |
| 367 | mp->vreg_config[i].pre_on_sleep = tmp; |
| 368 | } |
| 369 | |
| 370 | rc = of_property_read_u32(supply_node, |
| 371 | "qcom,supply-pre-off-sleep", &tmp); |
| 372 | if (rc) { |
| 373 | pr_debug("%s: error reading supply pre sleep value. rc=%d\n", |
| 374 | __func__, rc); |
| 375 | rc = 0; |
| 376 | } else { |
| 377 | mp->vreg_config[i].pre_off_sleep = tmp; |
| 378 | } |
| 379 | |
| 380 | /* post-sleep */ |
| 381 | rc = of_property_read_u32(supply_node, |
| 382 | "qcom,supply-post-on-sleep", &tmp); |
| 383 | if (rc) { |
| 384 | pr_debug("%s: error reading supply post sleep value. rc=%d\n", |
| 385 | __func__, rc); |
| 386 | rc = 0; |
| 387 | } else { |
| 388 | mp->vreg_config[i].post_on_sleep = tmp; |
| 389 | } |
| 390 | |
| 391 | rc = of_property_read_u32(supply_node, |
| 392 | "qcom,supply-post-off-sleep", &tmp); |
| 393 | if (rc) { |
| 394 | pr_debug("%s: error reading supply post sleep value. rc=%d\n", |
| 395 | __func__, rc); |
| 396 | rc = 0; |
| 397 | } else { |
| 398 | mp->vreg_config[i].post_off_sleep = tmp; |
| 399 | } |
| 400 | |
| 401 | pr_debug("%s: %s min=%d, max=%d, enable=%d, disable=%d, ulp=%d, preonsleep=%d, postonsleep=%d, preoffsleep=%d, postoffsleep=%d\n", |
| 402 | __func__, |
| 403 | mp->vreg_config[i].vreg_name, |
| 404 | mp->vreg_config[i].min_voltage, |
| 405 | mp->vreg_config[i].max_voltage, |
| 406 | mp->vreg_config[i].load[DSS_REG_MODE_ENABLE] |
| 407 | mp->vreg_config[i].load[DSS_REG_MODE_DISABLE] |
| 408 | mp->vreg_config[i].load[DSS_REG_MODE_ULP] |
| 409 | mp->vreg_config[i].pre_on_sleep, |
| 410 | mp->vreg_config[i].post_on_sleep, |
| 411 | mp->vreg_config[i].pre_off_sleep, |
| 412 | mp->vreg_config[i].post_off_sleep |
| 413 | ); |
| 414 | ++i; |
| 415 | } |
| 416 | |
| 417 | return rc; |
| 418 | |
| 419 | error: |
| 420 | if (mp->vreg_config) { |
| 421 | devm_kfree(dev, mp->vreg_config); |
| 422 | mp->vreg_config = NULL; |
| 423 | } |
| 424 | novreg: |
| 425 | mp->num_vreg = 0; |
| 426 | |
| 427 | return rc; |
| 428 | } |
| 429 | |
| 430 | static int dsi_parse_phy(struct platform_device *pdev, |
| 431 | struct mdss_dsi_ctrl_pdata *ctrl_pdata) |
| 432 | { |
| 433 | struct device_node *np = pdev->dev.of_node; |
| 434 | int i, len; |
| 435 | const char *data; |
| 436 | struct mdss_dsi_phy_ctrl *phy_db |
| 437 | = &(ctrl_pdata->panel_data.panel_info.mipi.dsi_phy_db); |
| 438 | |
| 439 | data = of_get_property(np, "qcom,platform-regulator-settings", &len); |
| 440 | if ((!data) || (len != 6)) { |
| 441 | pr_err("%s:%d, Unable to read Phy regulator settings", |
| 442 | __func__, __LINE__); |
| 443 | return -EINVAL; |
| 444 | } |
| 445 | for (i = 0; i < len; i++) |
| 446 | phy_db->regulator[i] = data[i]; |
| 447 | |
| 448 | data = of_get_property(np, "qcom,platform-strength-ctrl", &len); |
| 449 | if ((!data) || (len != 2)) { |
| 450 | pr_err("%s:%d, Unable to read Phy Strength ctrl settings", |
| 451 | __func__, __LINE__); |
| 452 | return -EINVAL; |
| 453 | } |
| 454 | phy_db->strength[0] = data[0]; |
| 455 | phy_db->strength[1] = data[1]; |
| 456 | |
| 457 | data = of_get_property(np, "qcom,platform-bist-ctrl", &len); |
| 458 | if ((!data) || (len != 6)) { |
| 459 | pr_err("%s:%d, Unable to read Phy Bist Ctrl settings", |
| 460 | __func__, __LINE__); |
| 461 | return -EINVAL; |
| 462 | } |
| 463 | for (i = 0; i < len; i++) |
| 464 | phy_db->bistctrl[i] = data[i]; |
| 465 | |
| 466 | data = of_get_property(np, "qcom,platform-lane-config", &len); |
| 467 | if ((!data) || (len != 30)) { |
| 468 | pr_err("%s:%d, Unable to read Phy lane configure settings", |
| 469 | __func__, __LINE__); |
| 470 | return -EINVAL; |
| 471 | } |
| 472 | for (i = 0; i < len; i++) |
| 473 | phy_db->lanecfg[i] = data[i]; |
| 474 | |
| 475 | return 0; |
| 476 | } |
| 477 | |
| 478 | void dsi_ctrl_config_deinit(struct platform_device *pdev, |
| 479 | struct mdss_dsi_ctrl_pdata *ctrl_pdata) |
| 480 | { |
| 481 | int i; |
| 482 | |
| 483 | for (i = DSI_MAX_PM - 1; i >= 0; i--) { |
| 484 | mdss_dsi_put_dt_vreg_data(&pdev->dev, |
| 485 | &ctrl_pdata->power_data[i]); |
| 486 | } |
| 487 | } |
| 488 | |
| 489 | int dsi_ctrl_config_init(struct platform_device *pdev, |
| 490 | struct mdss_dsi_ctrl_pdata *ctrl_pdata) |
| 491 | { |
| 492 | int rc = 0, i; |
| 493 | |
| 494 | for (i = 0; i < DSI_MAX_PM; i++) { |
| 495 | rc = mdss_dsi_get_dt_vreg_data(&pdev->dev, |
| 496 | &ctrl_pdata->power_data[i], i); |
| 497 | if (rc) { |
| 498 | DEV_ERR("%s: '%s' get_dt_vreg_data failed.rc=%d\n", |
| 499 | __func__, __mdss_dsi_pm_name(i), rc); |
| 500 | return rc; |
| 501 | } |
| 502 | } |
| 503 | |
| 504 | rc = dsi_parse_gpio(pdev, ctrl_pdata); |
| 505 | if (rc) { |
| 506 | pr_err("fail to parse panel GPIOs\n"); |
| 507 | return rc; |
| 508 | } |
| 509 | |
| 510 | rc = dsi_parse_phy(pdev, ctrl_pdata); |
| 511 | if (rc) { |
| 512 | pr_err("fail to parse DSI PHY settings\n"); |
| 513 | return rc; |
| 514 | } |
| 515 | |
| 516 | return 0; |
| 517 | } |
| 518 | int dsi_panel_device_register_v2(struct platform_device *dev, |
| 519 | struct mdss_dsi_ctrl_pdata *ctrl_pdata) |
| 520 | { |
| 521 | struct mipi_panel_info *mipi; |
| 522 | int rc; |
| 523 | u8 lanes = 0, bpp; |
| 524 | u32 h_period, v_period; |
| 525 | struct mdss_panel_info *pinfo = &(ctrl_pdata->panel_data.panel_info); |
| 526 | |
| 527 | h_period = ((pinfo->lcdc.h_pulse_width) |
| 528 | + (pinfo->lcdc.h_back_porch) |
| 529 | + (pinfo->xres) |
| 530 | + (pinfo->lcdc.h_front_porch)); |
| 531 | |
| 532 | v_period = ((pinfo->lcdc.v_pulse_width) |
| 533 | + (pinfo->lcdc.v_back_porch) |
| 534 | + (pinfo->yres) |
| 535 | + (pinfo->lcdc.v_front_porch)); |
| 536 | |
| 537 | mipi = &pinfo->mipi; |
| 538 | |
| 539 | pinfo->type = |
| 540 | ((mipi->mode == DSI_VIDEO_MODE) |
| 541 | ? MIPI_VIDEO_PANEL : MIPI_CMD_PANEL); |
| 542 | |
| 543 | if (mipi->data_lane3) |
| 544 | lanes += 1; |
| 545 | if (mipi->data_lane2) |
| 546 | lanes += 1; |
| 547 | if (mipi->data_lane1) |
| 548 | lanes += 1; |
| 549 | if (mipi->data_lane0) |
| 550 | lanes += 1; |
| 551 | |
| 552 | if ((mipi->dst_format == DSI_CMD_DST_FORMAT_RGB888) |
| 553 | || (mipi->dst_format == DSI_VIDEO_DST_FORMAT_RGB888) |
| 554 | || (mipi->dst_format == DSI_VIDEO_DST_FORMAT_RGB666_LOOSE)) |
| 555 | bpp = 3; |
| 556 | else if ((mipi->dst_format == DSI_CMD_DST_FORMAT_RGB565) |
| 557 | || (mipi->dst_format == DSI_VIDEO_DST_FORMAT_RGB565)) |
| 558 | bpp = 2; |
| 559 | else |
| 560 | bpp = 3; /* Default format set to RGB888 */ |
| 561 | |
| 562 | if (pinfo->type == MIPI_VIDEO_PANEL && |
| 563 | !pinfo->clk_rate) { |
| 564 | h_period += pinfo->lcdc.xres_pad; |
| 565 | v_period += pinfo->lcdc.yres_pad; |
| 566 | |
| 567 | if (lanes > 0) { |
| 568 | pinfo->clk_rate = |
| 569 | ((h_period * v_period * (mipi->frame_rate) * bpp * 8) |
| 570 | / lanes); |
| 571 | } else { |
| 572 | pr_err("%s: forcing mdss_dsi lanes to 1\n", __func__); |
| 573 | pinfo->clk_rate = |
| 574 | (h_period * v_period |
| 575 | * (mipi->frame_rate) * bpp * 8); |
| 576 | } |
| 577 | } |
| 578 | |
| 579 | ctrl_pdata->panel_data.event_handler = dsi_event_handler; |
| 580 | |
| 581 | /* |
| 582 | * register in mdp driver |
| 583 | */ |
| 584 | rc = mdss_register_panel(dev, &(ctrl_pdata->panel_data)); |
| 585 | if (rc) { |
| 586 | dev_err(&dev->dev, "unable to register MIPI DSI panel\n"); |
| 587 | return rc; |
| 588 | } |
| 589 | |
| 590 | pr_debug("%s: Panal data initialized\n", __func__); |
| 591 | return 0; |
| 592 | } |
| 593 | |
| 594 | void dsi_register_interface(struct dsi_interface *intf) |
| 595 | { |
| 596 | dsi_intf = *intf; |
| 597 | } |
| 598 | |
| 599 | int dsi_buf_alloc(struct dsi_buf *dp, int size) |
| 600 | { |
| 601 | dp->start = kzalloc(size, GFP_KERNEL); |
| 602 | if (dp->start == NULL) { |
| 603 | pr_err("%s:%u\n", __func__, __LINE__); |
| 604 | return -ENOMEM; |
| 605 | } |
| 606 | |
| 607 | dp->end = dp->start + size; |
| 608 | dp->size = size; |
| 609 | |
| 610 | if ((int)dp->start & 0x07) { |
| 611 | pr_err("%s: buf NOT 8 bytes aligned\n", __func__); |
| 612 | return -EINVAL; |
| 613 | } |
| 614 | |
| 615 | dp->data = dp->start; |
| 616 | dp->len = 0; |
| 617 | return 0; |
| 618 | } |
| 619 | |