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Hirokazu Takata23680862005-06-21 17:16:10 -07001/*
Hirokazu Takata3264f972007-08-01 21:09:31 +09002 * linux/arch/m32r/platforms/mappi3/setup.c
Hirokazu Takata23680862005-06-21 17:16:10 -07003 *
4 * Setup routines for Renesas MAPPI-III(M3A-2170) Board
5 *
Hirokazu Takata316240f2005-07-07 17:59:32 -07006 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
Hirokazu Takata23680862005-06-21 17:16:10 -07008 */
9
Hirokazu Takata23680862005-06-21 17:16:10 -070010#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010013#include <linux/platform_device.h>
Hirokazu Takata23680862005-06-21 17:16:10 -070014
Hirokazu Takata23680862005-06-21 17:16:10 -070015#include <asm/m32r.h>
16#include <asm/io.h>
17
18#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
19
Hirokazu Takata23680862005-06-21 17:16:10 -070020icu_data_t icu_data[NR_IRQS];
21
22static void disable_mappi3_irq(unsigned int irq)
23{
24 unsigned long port, data;
25
26 if ((irq == 0) ||(irq >= NR_IRQS)) {
27 printk("bad irq 0x%08x\n", irq);
28 return;
29 }
30 port = irq2port(irq);
31 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
32 outl(data, port);
33}
34
35static void enable_mappi3_irq(unsigned int irq)
36{
37 unsigned long port, data;
38
39 if ((irq == 0) ||(irq >= NR_IRQS)) {
40 printk("bad irq 0x%08x\n", irq);
41 return;
42 }
43 port = irq2port(irq);
44 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
45 outl(data, port);
46}
47
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010048static void mask_mappi3(struct irq_data *data)
Hirokazu Takata23680862005-06-21 17:16:10 -070049{
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010050 disable_mappi3_irq(data->irq);
Hirokazu Takata23680862005-06-21 17:16:10 -070051}
52
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010053static void unmask_mappi3(struct irq_data *data)
Hirokazu Takata23680862005-06-21 17:16:10 -070054{
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010055 enable_mappi3_irq(data->irq);
Hirokazu Takata23680862005-06-21 17:16:10 -070056}
57
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010058static void shutdown_mappi3(struct irq_data *data)
Hirokazu Takata23680862005-06-21 17:16:10 -070059{
60 unsigned long port;
61
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010062 port = irq2port(data->irq);
Hirokazu Takata23680862005-06-21 17:16:10 -070063 outl(M32R_ICUCR_ILEVEL7, port);
64}
65
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010066static struct irq_chip mappi3_irq_type = {
67 .name = "MAPPI3-IRQ",
68 .irq_shutdown = shutdown_mappi3,
69 .irq_mask = mask_mappi3,
70 .irq_unmask = unmask_mappi3,
Hirokazu Takata23680862005-06-21 17:16:10 -070071};
72
73void __init init_IRQ(void)
74{
75#if defined(CONFIG_SMC91X)
76 /* INT0 : LAN controller (SMC91111) */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010077 irq_set_chip_and_handler(M32R_IRQ_INT0, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010078 handle_level_irq);
Hirokazu Takata23680862005-06-21 17:16:10 -070079 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
80 disable_mappi3_irq(M32R_IRQ_INT0);
81#endif /* CONFIG_SMC91X */
82
83 /* MFT2 : system timer */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010084 irq_set_chip_and_handler(M32R_IRQ_MFT2, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010085 handle_level_irq);
Hirokazu Takata23680862005-06-21 17:16:10 -070086 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
87 disable_mappi3_irq(M32R_IRQ_MFT2);
88
89#ifdef CONFIG_SERIAL_M32R_SIO
90 /* SIO0_R : uart receive data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010091 irq_set_chip_and_handler(M32R_IRQ_SIO0_R, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010092 handle_level_irq);
Hirokazu Takata23680862005-06-21 17:16:10 -070093 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
94 disable_mappi3_irq(M32R_IRQ_SIO0_R);
95
96 /* SIO0_S : uart send data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +010097 irq_set_chip_and_handler(M32R_IRQ_SIO0_S, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +010098 handle_level_irq);
Hirokazu Takata23680862005-06-21 17:16:10 -070099 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
100 disable_mappi3_irq(M32R_IRQ_SIO0_S);
101 /* SIO1_R : uart receive data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100102 irq_set_chip_and_handler(M32R_IRQ_SIO1_R, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +0100103 handle_level_irq);
Hirokazu Takata23680862005-06-21 17:16:10 -0700104 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
105 disable_mappi3_irq(M32R_IRQ_SIO1_R);
106
107 /* SIO1_S : uart send data */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100108 irq_set_chip_and_handler(M32R_IRQ_SIO1_S, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +0100109 handle_level_irq);
Hirokazu Takata23680862005-06-21 17:16:10 -0700110 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
111 disable_mappi3_irq(M32R_IRQ_SIO1_S);
112#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
113
114#if defined(CONFIG_USB)
115 /* INT1 : USB Host controller interrupt */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100116 irq_set_chip_and_handler(M32R_IRQ_INT1, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +0100117 handle_level_irq);
Hirokazu Takata23680862005-06-21 17:16:10 -0700118 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
119 disable_mappi3_irq(M32R_IRQ_INT1);
120#endif /* CONFIG_USB */
121
Hirokazu Takataad09d582005-11-28 13:44:00 -0800122 /* CFC IREQ */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100123 irq_set_chip_and_handler(PLD_IRQ_CFIREQ, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +0100124 handle_level_irq);
Hirokazu Takata23680862005-06-21 17:16:10 -0700125 icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
126 disable_mappi3_irq(PLD_IRQ_CFIREQ);
127
128#if defined(CONFIG_M32R_CFC)
Hirokazu Takataad09d582005-11-28 13:44:00 -0800129 /* ICUCR41: CFC Insert & eject */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100130 irq_set_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +0100131 handle_level_irq);
Hirokazu Takata23680862005-06-21 17:16:10 -0700132 icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
133 disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
134
Hirokazu Takata23680862005-06-21 17:16:10 -0700135#endif /* CONFIG_M32R_CFC */
Hirokazu Takataad09d582005-11-28 13:44:00 -0800136
137 /* IDE IREQ */
Thomas Gleixner27e5c5a2011-03-24 17:32:45 +0100138 irq_set_chip_and_handler(PLD_IRQ_IDEIREQ, &mappi3_irq_type,
Thomas Gleixnerb82727e2011-01-19 18:39:27 +0100139 handle_level_irq);
Hirokazu Takataad09d582005-11-28 13:44:00 -0800140 icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
141 disable_mappi3_irq(PLD_IRQ_IDEIREQ);
142
Hirokazu Takata23680862005-06-21 17:16:10 -0700143}
144
Hirokazu Takata316240f2005-07-07 17:59:32 -0700145#if defined(CONFIG_SMC91X)
146
Hirokazu Takata23680862005-06-21 17:16:10 -0700147#define LAN_IOSTART 0x300
148#define LAN_IOEND 0x320
149static struct resource smc91x_resources[] = {
150 [0] = {
151 .start = (LAN_IOSTART),
152 .end = (LAN_IOEND),
153 .flags = IORESOURCE_MEM,
154 },
155 [1] = {
156 .start = M32R_IRQ_INT0,
157 .end = M32R_IRQ_INT0,
158 .flags = IORESOURCE_IRQ,
159 }
160};
161
162static struct platform_device smc91x_device = {
163 .name = "smc91x",
164 .id = 0,
165 .num_resources = ARRAY_SIZE(smc91x_resources),
166 .resource = smc91x_resources,
167};
168
Hirokazu Takata316240f2005-07-07 17:59:32 -0700169#endif
170
171#if defined(CONFIG_FB_S1D13XXX)
172
173#include <video/s1d13xxxfb.h>
174#include <asm/s1d13806.h>
175
176static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
177 .initregs = s1d13xxxfb_initregs,
178 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
179 .platform_init_video = NULL,
180#ifdef CONFIG_PM
181 .platform_suspend_video = NULL,
182 .platform_resume_video = NULL,
183#endif
184};
185
186static struct resource s1d13xxxfb_resources[] = {
187 [0] = {
188 .start = 0x1d600000UL,
189 .end = 0x1d73FFFFUL,
190 .flags = IORESOURCE_MEM,
191 },
192 [1] = {
193 .start = 0x1d400000UL,
194 .end = 0x1d4001FFUL,
195 .flags = IORESOURCE_MEM,
196 }
197};
198
199static struct platform_device s1d13xxxfb_device = {
200 .name = S1D_DEVICENAME,
201 .id = 0,
202 .dev = {
203 .platform_data = &s1d13xxxfb_data,
204 },
205 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
206 .resource = s1d13xxxfb_resources,
207};
208#endif
209
Hirokazu Takata23680862005-06-21 17:16:10 -0700210static int __init platform_init(void)
211{
Hirokazu Takata316240f2005-07-07 17:59:32 -0700212#if defined(CONFIG_SMC91X)
Hirokazu Takata23680862005-06-21 17:16:10 -0700213 platform_device_register(&smc91x_device);
Hirokazu Takata316240f2005-07-07 17:59:32 -0700214#endif
215#if defined(CONFIG_FB_S1D13XXX)
216 platform_device_register(&s1d13xxxfb_device);
217#endif
Hirokazu Takata23680862005-06-21 17:16:10 -0700218 return 0;
219}
220arch_initcall(platform_init);