Thor Thayer | 143f4a5 | 2015-06-04 09:28:46 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * |
| 3 | * Copyright (C) 2015 Altera Corporation |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms and conditions of the GNU General Public License, |
| 7 | * version 2, as published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef _ALTERA_EDAC_H |
| 19 | #define _ALTERA_EDAC_H |
| 20 | |
| 21 | #include <linux/edac.h> |
| 22 | #include <linux/types.h> |
| 23 | |
| 24 | /* SDRAM Controller CtrlCfg Register */ |
| 25 | #define CV_CTLCFG_OFST 0x00 |
| 26 | |
| 27 | /* SDRAM Controller CtrlCfg Register Bit Masks */ |
| 28 | #define CV_CTLCFG_ECC_EN 0x400 |
| 29 | #define CV_CTLCFG_ECC_CORR_EN 0x800 |
| 30 | #define CV_CTLCFG_GEN_SB_ERR 0x2000 |
| 31 | #define CV_CTLCFG_GEN_DB_ERR 0x4000 |
| 32 | |
| 33 | #define CV_CTLCFG_ECC_AUTO_EN (CV_CTLCFG_ECC_EN | \ |
| 34 | CV_CTLCFG_ECC_CORR_EN) |
| 35 | |
| 36 | /* SDRAM Controller Address Width Register */ |
| 37 | #define CV_DRAMADDRW_OFST 0x2C |
| 38 | |
| 39 | /* SDRAM Controller Address Widths Field Register */ |
| 40 | #define DRAMADDRW_COLBIT_MASK 0x001F |
| 41 | #define DRAMADDRW_COLBIT_SHIFT 0 |
| 42 | #define DRAMADDRW_ROWBIT_MASK 0x03E0 |
| 43 | #define DRAMADDRW_ROWBIT_SHIFT 5 |
| 44 | #define CV_DRAMADDRW_BANKBIT_MASK 0x1C00 |
| 45 | #define CV_DRAMADDRW_BANKBIT_SHIFT 10 |
| 46 | #define CV_DRAMADDRW_CSBIT_MASK 0xE000 |
| 47 | #define CV_DRAMADDRW_CSBIT_SHIFT 13 |
| 48 | |
| 49 | /* SDRAM Controller Interface Data Width Register */ |
| 50 | #define CV_DRAMIFWIDTH_OFST 0x30 |
| 51 | |
| 52 | /* SDRAM Controller Interface Data Width Defines */ |
| 53 | #define CV_DRAMIFWIDTH_16B_ECC 24 |
| 54 | #define CV_DRAMIFWIDTH_32B_ECC 40 |
| 55 | |
| 56 | /* SDRAM Controller DRAM Status Register */ |
| 57 | #define CV_DRAMSTS_OFST 0x38 |
| 58 | |
| 59 | /* SDRAM Controller DRAM Status Register Bit Masks */ |
| 60 | #define CV_DRAMSTS_SBEERR 0x04 |
| 61 | #define CV_DRAMSTS_DBEERR 0x08 |
| 62 | #define CV_DRAMSTS_CORR_DROP 0x10 |
| 63 | |
| 64 | /* SDRAM Controller DRAM IRQ Register */ |
| 65 | #define CV_DRAMINTR_OFST 0x3C |
| 66 | |
| 67 | /* SDRAM Controller DRAM IRQ Register Bit Masks */ |
| 68 | #define CV_DRAMINTR_INTREN 0x01 |
| 69 | #define CV_DRAMINTR_SBEMASK 0x02 |
| 70 | #define CV_DRAMINTR_DBEMASK 0x04 |
| 71 | #define CV_DRAMINTR_CORRDROPMASK 0x08 |
| 72 | #define CV_DRAMINTR_INTRCLR 0x10 |
| 73 | |
| 74 | /* SDRAM Controller Single Bit Error Count Register */ |
| 75 | #define CV_SBECOUNT_OFST 0x40 |
| 76 | |
| 77 | /* SDRAM Controller Double Bit Error Count Register */ |
| 78 | #define CV_DBECOUNT_OFST 0x44 |
| 79 | |
| 80 | /* SDRAM Controller ECC Error Address Register */ |
| 81 | #define CV_ERRADDR_OFST 0x48 |
| 82 | |
| 83 | struct altr_sdram_prv_data { |
| 84 | int ecc_ctrl_offset; |
| 85 | int ecc_ctl_en_mask; |
| 86 | int ecc_cecnt_offset; |
| 87 | int ecc_uecnt_offset; |
| 88 | int ecc_stat_offset; |
| 89 | int ecc_stat_ce_mask; |
| 90 | int ecc_stat_ue_mask; |
| 91 | int ecc_saddr_offset; |
| 92 | int ecc_daddr_offset; |
| 93 | int ecc_irq_en_offset; |
| 94 | int ecc_irq_en_mask; |
| 95 | int ecc_irq_clr_offset; |
| 96 | int ecc_irq_clr_mask; |
| 97 | int ecc_cnt_rst_offset; |
| 98 | int ecc_cnt_rst_mask; |
| 99 | #ifdef CONFIG_EDAC_DEBUG |
| 100 | struct edac_dev_sysfs_attribute *eccmgr_sysfs_attr; |
| 101 | int ecc_enable_mask; |
| 102 | int ce_set_mask; |
| 103 | int ue_set_mask; |
| 104 | int ce_ue_trgr_offset; |
| 105 | #endif |
| 106 | }; |
| 107 | |
| 108 | /* Altera SDRAM Memory Controller data */ |
| 109 | struct altr_sdram_mc_data { |
| 110 | struct regmap *mc_vbase; |
| 111 | int sb_irq; |
| 112 | int db_irq; |
| 113 | const struct altr_sdram_prv_data *data; |
| 114 | }; |
| 115 | |
| 116 | #endif /* #ifndef _ALTERA_EDAC_H */ |