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Dennis Dalessandrob4e64392016-01-06 10:04:31 -08001#ifndef DEF_RDMAVT_INCQP_H
2#define DEF_RDMAVT_INCQP_H
3
4/*
Dennis Dalessandrofe314192016-01-22 13:04:58 -08005 * Copyright(c) 2016 Intel Corporation.
Dennis Dalessandrob4e64392016-01-06 10:04:31 -08006 *
7 * This file is provided under a dual BSD/GPLv2 license. When using or
8 * redistributing this file, you may do so under either license.
9 *
10 * GPL LICENSE SUMMARY
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * BSD LICENSE
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50
Dennis Dalessandro5a9cf6f2016-01-22 12:50:24 -080051#include <rdma/rdma_vt.h>
Dennis Dalessandro050eb7f2016-01-22 12:50:11 -080052#include <rdma/ib_pack.h>
Dennis Dalessandro4e740802016-01-22 13:00:55 -080053#include <rdma/ib_verbs.h>
Dennis Dalessandro050eb7f2016-01-22 12:50:11 -080054/*
55 * Atomic bit definitions for r_aflags.
56 */
57#define RVT_R_WRID_VALID 0
58#define RVT_R_REWIND_SGE 1
59
60/*
61 * Bit definitions for r_flags.
62 */
63#define RVT_R_REUSE_SGE 0x01
64#define RVT_R_RDMAR_SEQ 0x02
65#define RVT_R_RSP_NAK 0x04
66#define RVT_R_RSP_SEND 0x08
67#define RVT_R_COMM_EST 0x10
68
69/*
70 * Bit definitions for s_flags.
71 *
72 * RVT_S_SIGNAL_REQ_WR - set if QP send WRs contain completion signaled
73 * RVT_S_BUSY - send tasklet is processing the QP
74 * RVT_S_TIMER - the RC retry timer is active
75 * RVT_S_ACK_PENDING - an ACK is waiting to be sent after RDMA read/atomics
76 * RVT_S_WAIT_FENCE - waiting for all prior RDMA read or atomic SWQEs
77 * before processing the next SWQE
78 * RVT_S_WAIT_RDMAR - waiting for a RDMA read or atomic SWQE to complete
79 * before processing the next SWQE
80 * RVT_S_WAIT_RNR - waiting for RNR timeout
81 * RVT_S_WAIT_SSN_CREDIT - waiting for RC credits to process next SWQE
82 * RVT_S_WAIT_DMA - waiting for send DMA queue to drain before generating
83 * next send completion entry not via send DMA
84 * RVT_S_WAIT_PIO - waiting for a send buffer to be available
Mike Marciniszyn14553ca2016-02-14 12:45:36 -080085 * RVT_S_WAIT_PIO_DRAIN - waiting for a qp to drain pio packets
Dennis Dalessandro050eb7f2016-01-22 12:50:11 -080086 * RVT_S_WAIT_TX - waiting for a struct verbs_txreq to be available
87 * RVT_S_WAIT_DMA_DESC - waiting for DMA descriptors to be available
88 * RVT_S_WAIT_KMEM - waiting for kernel memory to be available
89 * RVT_S_WAIT_PSN - waiting for a packet to exit the send DMA queue
90 * RVT_S_WAIT_ACK - waiting for an ACK packet before sending more requests
91 * RVT_S_SEND_ONE - send one packet, request ACK, then wait for ACK
92 * RVT_S_ECN - a BECN was queued to the send engine
93 */
94#define RVT_S_SIGNAL_REQ_WR 0x0001
95#define RVT_S_BUSY 0x0002
96#define RVT_S_TIMER 0x0004
97#define RVT_S_RESP_PENDING 0x0008
98#define RVT_S_ACK_PENDING 0x0010
99#define RVT_S_WAIT_FENCE 0x0020
100#define RVT_S_WAIT_RDMAR 0x0040
101#define RVT_S_WAIT_RNR 0x0080
102#define RVT_S_WAIT_SSN_CREDIT 0x0100
103#define RVT_S_WAIT_DMA 0x0200
104#define RVT_S_WAIT_PIO 0x0400
Mike Marciniszyn14553ca2016-02-14 12:45:36 -0800105#define RVT_S_WAIT_PIO_DRAIN 0x0800
106#define RVT_S_WAIT_TX 0x1000
107#define RVT_S_WAIT_DMA_DESC 0x2000
108#define RVT_S_WAIT_KMEM 0x4000
109#define RVT_S_WAIT_PSN 0x8000
110#define RVT_S_WAIT_ACK 0x10000
111#define RVT_S_SEND_ONE 0x20000
112#define RVT_S_UNLIMITED_CREDIT 0x40000
113#define RVT_S_AHG_VALID 0x80000
114#define RVT_S_AHG_CLEAR 0x100000
115#define RVT_S_ECN 0x200000
Dennis Dalessandro050eb7f2016-01-22 12:50:11 -0800116
117/*
118 * Wait flags that would prevent any packet type from being sent.
119 */
120#define RVT_S_ANY_WAIT_IO (RVT_S_WAIT_PIO | RVT_S_WAIT_TX | \
121 RVT_S_WAIT_DMA_DESC | RVT_S_WAIT_KMEM)
122
123/*
124 * Wait flags that would prevent send work requests from making progress.
125 */
126#define RVT_S_ANY_WAIT_SEND (RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR | \
127 RVT_S_WAIT_RNR | RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_DMA | \
128 RVT_S_WAIT_PSN | RVT_S_WAIT_ACK)
129
130#define RVT_S_ANY_WAIT (RVT_S_ANY_WAIT_IO | RVT_S_ANY_WAIT_SEND)
131
132/* Number of bits to pay attention to in the opcode for checking qp type */
133#define RVT_OPCODE_QP_MASK 0xE0
134
Dennis Dalessandrobfbac092016-01-22 13:00:22 -0800135/* Flags for checking QP state (see ib_rvt_state_ops[]) */
136#define RVT_POST_SEND_OK 0x01
137#define RVT_POST_RECV_OK 0x02
138#define RVT_PROCESS_RECV_OK 0x04
139#define RVT_PROCESS_SEND_OK 0x08
140#define RVT_PROCESS_NEXT_SEND_OK 0x10
141#define RVT_FLUSH_SEND 0x20
142#define RVT_FLUSH_RECV 0x40
143#define RVT_PROCESS_OR_FLUSH_SEND \
144 (RVT_PROCESS_SEND_OK | RVT_FLUSH_SEND)
145
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800146/*
147 * Send work request queue entry.
148 * The size of the sg_list is determined when the QP is created and stored
149 * in qp->s_max_sge.
150 */
151struct rvt_swqe {
152 union {
153 struct ib_send_wr wr; /* don't use wr.sg_list */
154 struct ib_ud_wr ud_wr;
155 struct ib_reg_wr reg_wr;
156 struct ib_rdma_wr rdma_wr;
157 struct ib_atomic_wr atomic_wr;
158 };
159 u32 psn; /* first packet sequence number */
160 u32 lpsn; /* last packet sequence number */
161 u32 ssn; /* send sequence number */
162 u32 length; /* total length of data in sg_list */
163 struct rvt_sge sg_list[0];
164};
165
166/*
167 * Receive work request queue entry.
168 * The size of the sg_list is determined when the QP (or SRQ) is created
169 * and stored in qp->r_rq.max_sge (or srq->rq.max_sge).
170 */
171struct rvt_rwqe {
172 u64 wr_id;
173 u8 num_sge;
174 struct ib_sge sg_list[0];
175};
176
177/*
178 * This structure is used to contain the head pointer, tail pointer,
179 * and receive work queue entries as a single memory allocation so
180 * it can be mmap'ed into user space.
181 * Note that the wq array elements are variable size so you can't
182 * just index into the array to get the N'th element;
183 * use get_rwqe_ptr() instead.
184 */
185struct rvt_rwq {
186 u32 head; /* new work requests posted to the head */
187 u32 tail; /* receives pull requests from here. */
188 struct rvt_rwqe wq[0];
189};
190
191struct rvt_rq {
192 struct rvt_rwq *wq;
193 u32 size; /* size of RWQE array */
194 u8 max_sge;
195 /* protect changes in this struct */
196 spinlock_t lock ____cacheline_aligned_in_smp;
197};
198
199/*
200 * This structure is used by rvt_mmap() to validate an offset
201 * when an mmap() request is made. The vm_area_struct then uses
202 * this as its vm_private_data.
203 */
204struct rvt_mmap_info {
205 struct list_head pending_mmaps;
206 struct ib_ucontext *context;
207 void *obj;
208 __u64 offset;
209 struct kref ref;
210 unsigned size;
211};
212
213#define RVT_MAX_RDMA_ATOMIC 16
214
215/*
216 * This structure holds the information that the send tasklet needs
217 * to send a RDMA read response or atomic operation.
218 */
219struct rvt_ack_entry {
220 u8 opcode;
221 u8 sent;
222 u32 psn;
223 u32 lpsn;
224 union {
225 struct rvt_sge rdma_sge;
226 u64 atomic_data;
227 };
228};
229
Vennila Megavannanbfee5e32016-02-09 14:29:49 -0800230#define RC_QP_SCALING_INTERVAL 5
231
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800232/*
233 * Variables prefixed with s_ are for the requester (sender).
234 * Variables prefixed with r_ are for the responder (receiver).
235 * Variables prefixed with ack_ are for responder replies.
236 *
237 * Common variables are protected by both r_rq.lock and s_lock in that order
238 * which only happens in modify_qp() or changing the QP 'state'.
239 */
240struct rvt_qp {
241 struct ib_qp ibqp;
242 void *priv; /* Driver private data */
243 /* read mostly fields above and below */
244 struct ib_ah_attr remote_ah_attr;
245 struct ib_ah_attr alt_ah_attr;
246 struct rvt_qp __rcu *next; /* link list for QPN hash table */
247 struct rvt_swqe *s_wq; /* send work queue */
248 struct rvt_mmap_info *ip;
249
250 unsigned long timeout_jiffies; /* computed from timeout */
251
252 enum ib_mtu path_mtu;
253 int srate_mbps; /* s_srate (below) converted to Mbit/s */
254 u32 remote_qpn;
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800255 u32 qkey; /* QKEY for this QP (for UD or RD) */
256 u32 s_size; /* send work queue size */
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800257 u32 s_ahgpsn; /* set to the psn in the copy of the header */
258
Mike Marciniszyn46a80d62016-02-14 12:10:04 -0800259 u16 pmtu; /* decoded from path_mtu */
260 u8 log_pmtu; /* shift for pmtu */
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800261 u8 state; /* QP state */
262 u8 allowed_ops; /* high order bits of allowed opcodes */
263 u8 qp_access_flags;
264 u8 alt_timeout; /* Alternate path timeout for this QP */
265 u8 timeout; /* Timeout for this QP */
266 u8 s_srate;
267 u8 s_mig_state;
268 u8 port_num;
269 u8 s_pkey_index; /* PKEY index to use */
270 u8 s_alt_pkey_index; /* Alternate path PKEY index to use */
271 u8 r_max_rd_atomic; /* max number of RDMA read/atomic to receive */
272 u8 s_max_rd_atomic; /* max number of RDMA read/atomic to send */
273 u8 s_retry_cnt; /* number of times to retry */
274 u8 s_rnr_retry_cnt;
275 u8 r_min_rnr_timer; /* retry timeout value for RNR NAKs */
276 u8 s_max_sge; /* size of s_wq->sg_list */
277 u8 s_draining;
278
279 /* start of read/write fields */
280 atomic_t refcount ____cacheline_aligned_in_smp;
281 wait_queue_head_t wait;
282
283 struct rvt_ack_entry s_ack_queue[RVT_MAX_RDMA_ATOMIC + 1]
284 ____cacheline_aligned_in_smp;
285 struct rvt_sge_state s_rdma_read_sge;
286
287 spinlock_t r_lock ____cacheline_aligned_in_smp; /* used for APM */
Mike Marciniszynd2421a82016-02-14 12:44:26 -0800288 u32 r_psn; /* expected rcv packet sequence number */
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800289 unsigned long r_aflags;
290 u64 r_wr_id; /* ID for current receive WQE */
291 u32 r_ack_psn; /* PSN for next ACK or atomic ACK */
292 u32 r_len; /* total length of r_sge */
293 u32 r_rcv_len; /* receive data len processed */
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800294 u32 r_msn; /* message sequence number */
295
296 u8 r_state; /* opcode of last packet received */
297 u8 r_flags;
298 u8 r_head_ack_queue; /* index into s_ack_queue[] */
299
300 struct list_head rspwait; /* link for waiting to respond */
301
302 struct rvt_sge_state r_sge; /* current receive data */
303 struct rvt_rq r_rq; /* receive work queue */
304
Mike Marciniszyn46a80d62016-02-14 12:10:04 -0800305 /* post send line */
306 spinlock_t s_hlock ____cacheline_aligned_in_smp;
307 u32 s_head; /* new entries added here */
308 u32 s_next_psn; /* PSN for next request */
309 u32 s_avail; /* number of entries avail */
310 u32 s_ssn; /* SSN of tail entry */
311
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800312 spinlock_t s_lock ____cacheline_aligned_in_smp;
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800313 u32 s_flags;
Mike Marciniszynd2421a82016-02-14 12:44:26 -0800314 struct rvt_sge_state *s_cur_sge;
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800315 struct rvt_swqe *s_wqe;
316 struct rvt_sge_state s_sge; /* current send request data */
317 struct rvt_mregion *s_rdma_mr;
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800318 u32 s_cur_size; /* size of send packet in bytes */
319 u32 s_len; /* total length of s_sge */
320 u32 s_rdma_read_len; /* total length of s_rdma_read_sge */
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800321 u32 s_last_psn; /* last response PSN processed */
322 u32 s_sending_psn; /* lowest PSN that is being sent */
323 u32 s_sending_hpsn; /* highest PSN that is being sent */
324 u32 s_psn; /* current packet sequence number */
325 u32 s_ack_rdma_psn; /* PSN for sending RDMA read responses */
326 u32 s_ack_psn; /* PSN for acking sends and RDMA writes */
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800327 u32 s_tail; /* next entry to process */
328 u32 s_cur; /* current work queue entry */
329 u32 s_acked; /* last un-ACK'ed entry */
330 u32 s_last; /* last completed entry */
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800331 u32 s_lsn; /* limit sequence number (credit) */
332 u16 s_hdrwords; /* size of s_hdr in 32 bit words */
333 u16 s_rdma_ack_cnt;
334 s8 s_ahgidx;
335 u8 s_state; /* opcode of last packet sent */
336 u8 s_ack_state; /* opcode of packet to ACK */
337 u8 s_nak_state; /* non-zero if NAK is pending */
338 u8 r_nak_state; /* non-zero if NAK is pending */
339 u8 s_retry; /* requester retry counter */
340 u8 s_rnr_retry; /* requester RNR retry counter */
341 u8 s_num_rd_atomic; /* number of RDMA read/atomic pending */
342 u8 s_tail_ack_queue; /* index into s_ack_queue[] */
343
344 struct rvt_sge_state s_ack_rdma_sge;
345 struct timer_list s_timer;
346
347 /*
348 * This sge list MUST be last. Do not add anything below here.
349 */
350 struct rvt_sge r_sg_list[0] /* verified SGEs */
351 ____cacheline_aligned_in_smp;
352};
353
354struct rvt_srq {
355 struct ib_srq ibsrq;
356 struct rvt_rq rq;
357 struct rvt_mmap_info *ip;
358 /* send signal when number of RWQEs < limit */
359 u32 limit;
360};
361
Dennis Dalessandro0acb0cc2016-01-06 10:04:46 -0800362#define RVT_QPN_MAX BIT(24)
363#define RVT_QPNMAP_ENTRIES (RVT_QPN_MAX / PAGE_SIZE / BITS_PER_BYTE)
364#define RVT_BITS_PER_PAGE (PAGE_SIZE * BITS_PER_BYTE)
365#define RVT_BITS_PER_PAGE_MASK (RVT_BITS_PER_PAGE - 1)
Dennis Dalessandro3b0b3fb2016-01-22 13:00:35 -0800366#define RVT_QPN_MASK 0xFFFFFF
Dennis Dalessandro0acb0cc2016-01-06 10:04:46 -0800367
368/*
369 * QPN-map pages start out as NULL, they get allocated upon
370 * first use and are never deallocated. This way,
371 * large bitmaps are not allocated unless large numbers of QPs are used.
372 */
373struct rvt_qpn_map {
374 void *page;
375};
376
377struct rvt_qpn_table {
378 spinlock_t lock; /* protect changes to the qp table */
379 unsigned flags; /* flags for QP0/1 allocated for each port */
380 u32 last; /* last QP number allocated */
381 u32 nmaps; /* size of the map table */
382 u16 limit;
383 u8 incr;
384 /* bit map of free QP numbers other than 0/1 */
385 struct rvt_qpn_map map[RVT_QPNMAP_ENTRIES];
386};
387
388struct rvt_qp_ibdev {
389 u32 qp_table_size;
390 u32 qp_table_bits;
391 struct rvt_qp __rcu **qp_table;
392 spinlock_t qpt_lock; /* qptable lock */
393 struct rvt_qpn_table qpn_table;
394};
395
Dennis Dalessandrobfbac092016-01-22 13:00:22 -0800396/*
Dennis Dalessandro4e740802016-01-22 13:00:55 -0800397 * There is one struct rvt_mcast for each multicast GID.
398 * All attached QPs are then stored as a list of
399 * struct rvt_mcast_qp.
400 */
401struct rvt_mcast_qp {
402 struct list_head list;
403 struct rvt_qp *qp;
404};
405
406struct rvt_mcast {
407 struct rb_node rb_node;
408 union ib_gid mgid;
409 struct list_head qp_list;
410 wait_queue_head_t wait;
411 atomic_t refcount;
412 int n_attached;
413};
414
415/*
Dennis Dalessandrobfbac092016-01-22 13:00:22 -0800416 * Since struct rvt_swqe is not a fixed size, we can't simply index into
Dennis Dalessandro4e740802016-01-22 13:00:55 -0800417 * struct rvt_qp.s_wq. This function does the array index computation.
Dennis Dalessandrobfbac092016-01-22 13:00:22 -0800418 */
419static inline struct rvt_swqe *rvt_get_swqe_ptr(struct rvt_qp *qp,
420 unsigned n)
421{
422 return (struct rvt_swqe *)((char *)qp->s_wq +
423 (sizeof(struct rvt_swqe) +
424 qp->s_max_sge *
425 sizeof(struct rvt_sge)) * n);
426}
427
Dennis Dalessandro3b0b3fb2016-01-22 13:00:35 -0800428/*
429 * Since struct rvt_rwqe is not a fixed size, we can't simply index into
430 * struct rvt_rwq.wq. This function does the array index computation.
431 */
432static inline struct rvt_rwqe *rvt_get_rwqe_ptr(struct rvt_rq *rq, unsigned n)
433{
434 return (struct rvt_rwqe *)
435 ((char *)rq->wq->wq +
436 (sizeof(struct rvt_rwqe) +
437 rq->max_sge * sizeof(struct ib_sge)) * n);
438}
439
Dennis Dalessandrobfbac092016-01-22 13:00:22 -0800440extern const int ib_rvt_state_ops[];
441
Dennis Dalessandro3b0b3fb2016-01-22 13:00:35 -0800442struct rvt_dev_info;
Dennis Dalessandro3b0b3fb2016-01-22 13:00:35 -0800443int rvt_error_qp(struct rvt_qp *qp, enum ib_wc_status err);
Dennis Dalessandro3b0b3fb2016-01-22 13:00:35 -0800444
Dennis Dalessandrob4e64392016-01-06 10:04:31 -0800445#endif /* DEF_RDMAVT_INCQP_H */