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Daniel Drake99ea2622010-09-30 21:55:48 +01001/*
2 * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
3 *
4 * Copyright (C) 2009 VIA Technologies, Inc.
5 * Copyright (C) 2010 One Laptop per Child
6 * Author: Harald Welte <HaraldWelte@viatech.com>
7 * All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 *
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/gpio.h>
Andrew Mortonc5e70432011-05-24 17:13:43 -070029#include <linux/slab.h>
Daniel Drake99ea2622010-09-30 21:55:48 +010030#include <linux/device.h>
31#include <linux/platform_device.h>
32#include <linux/pci.h>
33#include <linux/io.h>
34
35#define MODULE_NAME "vx855_gpio"
36
37/* The VX855 south bridge has the following GPIO pins:
38 * GPI 0...13 General Purpose Input
39 * GPO 0...12 General Purpose Output
40 * GPIO 0...14 General Purpose I/O (Open-Drain)
41 */
42
43#define NR_VX855_GPI 14
44#define NR_VX855_GPO 13
45#define NR_VX855_GPIO 15
46
47#define NR_VX855_GPInO (NR_VX855_GPI + NR_VX855_GPO)
48#define NR_VX855_GP (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
49
50struct vx855_gpio {
51 struct gpio_chip gpio;
52 spinlock_t lock;
53 u32 io_gpi;
54 u32 io_gpo;
Daniel Drake99ea2622010-09-30 21:55:48 +010055};
56
57/* resolve a GPIx into the corresponding bit position */
58static inline u_int32_t gpi_i_bit(int i)
59{
60 if (i < 10)
61 return 1 << i;
62 else
63 return 1 << (i + 14);
64}
65
66static inline u_int32_t gpo_o_bit(int i)
67{
68 if (i < 11)
69 return 1 << i;
70 else
71 return 1 << (i + 14);
72}
73
74static inline u_int32_t gpio_i_bit(int i)
75{
76 if (i < 14)
77 return 1 << (i + 10);
78 else
79 return 1 << (i + 14);
80}
81
82static inline u_int32_t gpio_o_bit(int i)
83{
84 if (i < 14)
85 return 1 << (i + 11);
86 else
87 return 1 << (i + 13);
88}
89
90/* Mapping betwee numeric GPIO ID and the actual GPIO hardware numbering:
91 * 0..13 GPI 0..13
92 * 14..26 GPO 0..12
93 * 27..41 GPIO 0..14
94 */
95
96static int vx855gpio_direction_input(struct gpio_chip *gpio,
97 unsigned int nr)
98{
99 struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
100 unsigned long flags;
101 u_int32_t reg_out;
102
103 /* Real GPI bits are always in input direction */
104 if (nr < NR_VX855_GPI)
105 return 0;
106
107 /* Real GPO bits cannot be put in output direction */
108 if (nr < NR_VX855_GPInO)
109 return -EINVAL;
110
111 /* Open Drain GPIO have to be set to one */
112 spin_lock_irqsave(&vg->lock, flags);
113 reg_out = inl(vg->io_gpo);
114 reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
115 outl(reg_out, vg->io_gpo);
116 spin_unlock_irqrestore(&vg->lock, flags);
117
118 return 0;
119}
120
121static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
122{
123 struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
124 u_int32_t reg_in;
125 int ret = 0;
126
127 if (nr < NR_VX855_GPI) {
128 reg_in = inl(vg->io_gpi);
129 if (reg_in & gpi_i_bit(nr))
130 ret = 1;
131 } else if (nr < NR_VX855_GPInO) {
132 /* GPO don't have an input bit, we need to read it
133 * back from the output register */
134 reg_in = inl(vg->io_gpo);
135 if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
136 ret = 1;
137 } else {
138 reg_in = inl(vg->io_gpi);
139 if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
140 ret = 1;
141 }
142
143 return ret;
144}
145
146static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
147 int val)
148{
149 struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
150 unsigned long flags;
151 u_int32_t reg_out;
152
153 /* True GPI cannot be switched to output mode */
154 if (nr < NR_VX855_GPI)
155 return;
156
157 spin_lock_irqsave(&vg->lock, flags);
158 reg_out = inl(vg->io_gpo);
159 if (nr < NR_VX855_GPInO) {
160 if (val)
161 reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
162 else
163 reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
164 } else {
165 if (val)
166 reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
167 else
168 reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
169 }
170 outl(reg_out, vg->io_gpo);
171 spin_unlock_irqrestore(&vg->lock, flags);
172}
173
174static int vx855gpio_direction_output(struct gpio_chip *gpio,
175 unsigned int nr, int val)
176{
177 /* True GPI cannot be switched to output mode */
178 if (nr < NR_VX855_GPI)
179 return -EINVAL;
180
181 /* True GPO don't need to be switched to output mode,
182 * and GPIO are open-drain, i.e. also need no switching,
183 * so all we do is set the level */
184 vx855gpio_set(gpio, nr, val);
185
186 return 0;
187}
188
189static const char *vx855gpio_names[NR_VX855_GP] = {
190 "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
191 "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
192 "VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
193 "VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
194 "VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
195 "VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
196 "VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
197 "VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
198 "VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
199 "VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
200};
201
202static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
203{
204 struct gpio_chip *c = &vg->gpio;
205
206 c->label = "VX855 South Bridge";
207 c->owner = THIS_MODULE;
208 c->direction_input = vx855gpio_direction_input;
209 c->direction_output = vx855gpio_direction_output;
210 c->get = vx855gpio_get;
211 c->set = vx855gpio_set;
212 c->dbg_show = NULL;
213 c->base = 0;
214 c->ngpio = NR_VX855_GP;
Linus Walleij9fb1f392013-12-04 14:42:46 +0100215 c->can_sleep = false;
Daniel Drake99ea2622010-09-30 21:55:48 +0100216 c->names = vx855gpio_names;
217}
218
219/* This platform device is ordinarily registered by the vx855 mfd driver */
Bill Pemberton38363092012-11-19 13:22:34 -0500220static int vx855gpio_probe(struct platform_device *pdev)
Daniel Drake99ea2622010-09-30 21:55:48 +0100221{
222 struct resource *res_gpi;
223 struct resource *res_gpo;
224 struct vx855_gpio *vg;
Daniel Drake99ea2622010-09-30 21:55:48 +0100225
226 res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
227 res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
228 if (!res_gpi || !res_gpo)
229 return -EBUSY;
230
Axel Lin5b6a3422014-12-12 12:17:41 +0800231 vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL);
Daniel Drake99ea2622010-09-30 21:55:48 +0100232 if (!vg)
233 return -ENOMEM;
234
235 platform_set_drvdata(pdev, vg);
236
237 dev_info(&pdev->dev, "found VX855 GPIO controller\n");
238 vg->io_gpi = res_gpi->start;
239 vg->io_gpo = res_gpo->start;
240 spin_lock_init(&vg->lock);
241
242 /*
243 * A single byte is used to control various GPIO ports on the VX855,
244 * and in the case of the OLPC XO-1.5, some of those ports are used
245 * for switches that are interpreted and exposed through ACPI. ACPI
246 * will have reserved the region, so our own reservation will not
247 * succeed. Ignore and continue.
248 */
249
Axel Lin5b6a3422014-12-12 12:17:41 +0800250 if (!devm_request_region(&pdev->dev, res_gpi->start,
251 resource_size(res_gpi), MODULE_NAME "_gpi"))
Daniel Drake99ea2622010-09-30 21:55:48 +0100252 dev_warn(&pdev->dev,
253 "GPI I/O resource busy, probably claimed by ACPI\n");
Daniel Drake99ea2622010-09-30 21:55:48 +0100254
Axel Lin5b6a3422014-12-12 12:17:41 +0800255 if (!devm_request_region(&pdev->dev, res_gpo->start,
256 resource_size(res_gpo), MODULE_NAME "_gpo"))
Daniel Drake99ea2622010-09-30 21:55:48 +0100257 dev_warn(&pdev->dev,
258 "GPO I/O resource busy, probably claimed by ACPI\n");
Daniel Drake99ea2622010-09-30 21:55:48 +0100259
260 vx855gpio_gpio_setup(vg);
261
Axel Lin5b6a3422014-12-12 12:17:41 +0800262 return gpiochip_add(&vg->gpio);
Daniel Drake99ea2622010-09-30 21:55:48 +0100263}
264
Bill Pemberton206210c2012-11-19 13:25:50 -0500265static int vx855gpio_remove(struct platform_device *pdev)
Daniel Drake99ea2622010-09-30 21:55:48 +0100266{
267 struct vx855_gpio *vg = platform_get_drvdata(pdev);
Daniel Drake99ea2622010-09-30 21:55:48 +0100268
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200269 gpiochip_remove(&vg->gpio);
Daniel Drake99ea2622010-09-30 21:55:48 +0100270
Daniel Drake99ea2622010-09-30 21:55:48 +0100271 return 0;
272}
273
274static struct platform_driver vx855gpio_driver = {
275 .driver = {
276 .name = MODULE_NAME,
Daniel Drake99ea2622010-09-30 21:55:48 +0100277 },
278 .probe = vx855gpio_probe,
Bill Pemberton8283c4f2012-11-19 13:20:08 -0500279 .remove = vx855gpio_remove,
Daniel Drake99ea2622010-09-30 21:55:48 +0100280};
281
Mark Brown6f614152011-12-08 00:24:00 +0800282module_platform_driver(vx855gpio_driver);
Daniel Drake99ea2622010-09-30 21:55:48 +0100283
284MODULE_LICENSE("GPL");
285MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
286MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
287MODULE_ALIAS("platform:vx855_gpio");