blob: f463bdc37f885c80d4614d6c9ab729c739e298d5 [file] [log] [blame]
Mike Turquette69fe8a82012-03-15 23:11:18 -07001 The Common Clk Framework
2 Mike Turquette <mturquette@ti.com>
3
4This document endeavours to explain the common clk framework details,
5and how to port a platform over to this framework. It is not yet a
6detailed explanation of the clock api in include/linux/clk.h, but
7perhaps someday it will include that information.
8
9 Part 1 - introduction and interface split
10
11The common clk framework is an interface to control the clock nodes
12available on various devices today. This may come in the form of clock
13gating, rate adjustment, muxing or other operations. This framework is
14enabled with the CONFIG_COMMON_CLK option.
15
16The interface itself is divided into two halves, each shielded from the
17details of its counterpart. First is the common definition of struct
18clk which unifies the framework-level accounting and infrastructure that
19has traditionally been duplicated across a variety of platforms. Second
20is a common implementation of the clk.h api, defined in
21drivers/clk/clk.c. Finally there is struct clk_ops, whose operations
22are invoked by the clk api implementation.
23
24The second half of the interface is comprised of the hardware-specific
25callbacks registered with struct clk_ops and the corresponding
26hardware-specific structures needed to model a particular clock. For
27the remainder of this document any reference to a callback in struct
28clk_ops, such as .enable or .set_rate, implies the hardware-specific
29implementation of that code. Likewise, references to struct clk_foo
30serve as a convenient shorthand for the implementation of the
31hardware-specific bits for the hypothetical "foo" hardware.
32
33Tying the two halves of this interface together is struct clk_hw, which
34is defined in struct clk_foo and pointed to within struct clk. This
Sachin Kamat13541952013-06-10 10:02:39 +053035allows for easy navigation between the two discrete halves of the common
Mike Turquette69fe8a82012-03-15 23:11:18 -070036clock interface.
37
38 Part 2 - common data structures and api
39
40Below is the common struct clk definition from
41include/linux/clk-private.h, modified for brevity:
42
43 struct clk {
44 const char *name;
45 const struct clk_ops *ops;
46 struct clk_hw *hw;
47 char **parent_names;
48 struct clk **parents;
49 struct clk *parent;
50 struct hlist_head children;
51 struct hlist_node child_node;
52 ...
53 };
54
55The members above make up the core of the clk tree topology. The clk
56api itself defines several driver-facing functions which operate on
57struct clk. That api is documented in include/linux/clk.h.
58
59Platforms and devices utilizing the common struct clk use the struct
60clk_ops pointer in struct clk to perform the hardware-specific parts of
61the operations defined in clk.h:
62
63 struct clk_ops {
64 int (*prepare)(struct clk_hw *hw);
65 void (*unprepare)(struct clk_hw *hw);
66 int (*enable)(struct clk_hw *hw);
67 void (*disable)(struct clk_hw *hw);
68 int (*is_enabled)(struct clk_hw *hw);
69 unsigned long (*recalc_rate)(struct clk_hw *hw,
70 unsigned long parent_rate);
Geert Uytterhoeven54e73012014-04-22 15:11:42 +020071 long (*round_rate)(struct clk_hw *hw,
72 unsigned long rate,
73 unsigned long *parent_rate);
James Hogan71472c02013-07-29 12:25:00 +010074 long (*determine_rate)(struct clk_hw *hw,
75 unsigned long rate,
Tomeu Vizoso1c8e6002015-01-23 12:03:31 +010076 unsigned long min_rate,
77 unsigned long max_rate,
James Hogan71472c02013-07-29 12:25:00 +010078 unsigned long *best_parent_rate,
Tomeu Vizoso646cafc2014-12-02 08:54:22 +010079 struct clk_hw **best_parent_clk);
Mike Turquette69fe8a82012-03-15 23:11:18 -070080 int (*set_parent)(struct clk_hw *hw, u8 index);
81 u8 (*get_parent)(struct clk_hw *hw);
Geert Uytterhoeven54e73012014-04-22 15:11:42 +020082 int (*set_rate)(struct clk_hw *hw,
83 unsigned long rate,
84 unsigned long parent_rate);
Stephen Boyd3fa22522014-01-15 10:47:22 -080085 int (*set_rate_and_parent)(struct clk_hw *hw,
86 unsigned long rate,
Geert Uytterhoeven54e73012014-04-22 15:11:42 +020087 unsigned long parent_rate,
88 u8 index);
Boris BREZILLON5279fc42013-12-21 10:34:47 +010089 unsigned long (*recalc_accuracy)(struct clk_hw *hw,
Geert Uytterhoeven54e73012014-04-22 15:11:42 +020090 unsigned long parent_accuracy);
Mike Turquette69fe8a82012-03-15 23:11:18 -070091 void (*init)(struct clk_hw *hw);
Geert Uytterhoeven54e73012014-04-22 15:11:42 +020092 int (*debug_init)(struct clk_hw *hw,
93 struct dentry *dentry);
Mike Turquette69fe8a82012-03-15 23:11:18 -070094 };
95
96 Part 3 - hardware clk implementations
97
98The strength of the common struct clk comes from its .ops and .hw pointers
99which abstract the details of struct clk from the hardware-specific bits, and
100vice versa. To illustrate consider the simple gateable clk implementation in
101drivers/clk/clk-gate.c:
102
103struct clk_gate {
104 struct clk_hw hw;
105 void __iomem *reg;
106 u8 bit_idx;
107 ...
108};
109
110struct clk_gate contains struct clk_hw hw as well as hardware-specific
111knowledge about which register and bit controls this clk's gating.
112Nothing about clock topology or accounting, such as enable_count or
113notifier_count, is needed here. That is all handled by the common
114framework code and struct clk.
115
116Let's walk through enabling this clk from driver code:
117
118 struct clk *clk;
119 clk = clk_get(NULL, "my_gateable_clk");
120
121 clk_prepare(clk);
122 clk_enable(clk);
123
124The call graph for clk_enable is very simple:
125
126clk_enable(clk);
127 clk->ops->enable(clk->hw);
128 [resolves to...]
129 clk_gate_enable(hw);
130 [resolves struct clk gate with to_clk_gate(hw)]
131 clk_gate_set_bit(gate);
132
133And the definition of clk_gate_set_bit:
134
135static void clk_gate_set_bit(struct clk_gate *gate)
136{
137 u32 reg;
138
139 reg = __raw_readl(gate->reg);
140 reg |= BIT(gate->bit_idx);
141 writel(reg, gate->reg);
142}
143
144Note that to_clk_gate is defined as:
145
146#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, clk)
147
148This pattern of abstraction is used for every clock hardware
149representation.
150
151 Part 4 - supporting your own clk hardware
152
153When implementing support for a new type of clock it only necessary to
154include the following header:
155
156#include <linux/clk-provider.h>
157
158include/linux/clk.h is included within that header and clk-private.h
159must never be included from the code which implements the operations for
160a clock. More on that below in Part 5.
161
162To construct a clk hardware structure for your platform you must define
163the following:
164
165struct clk_foo {
166 struct clk_hw hw;
167 ... hardware specific data goes here ...
168};
169
170To take advantage of your data you'll need to support valid operations
171for your clk:
172
173struct clk_ops clk_foo_ops {
174 .enable = &clk_foo_enable;
175 .disable = &clk_foo_disable;
176};
177
178Implement the above functions using container_of:
179
180#define to_clk_foo(_hw) container_of(_hw, struct clk_foo, hw)
181
182int clk_foo_enable(struct clk_hw *hw)
183{
184 struct clk_foo *foo;
185
186 foo = to_clk_foo(hw);
187
188 ... perform magic on foo ...
189
190 return 0;
191};
192
193Below is a matrix detailing which clk_ops are mandatory based upon the
Eduardo Valentina368a6a2013-02-28 09:59:07 -0400194hardware capabilities of that clock. A cell marked as "y" means
Mike Turquette69fe8a82012-03-15 23:11:18 -0700195mandatory, a cell marked as "n" implies that either including that
Eduardo Valentina368a6a2013-02-28 09:59:07 -0400196callback is invalid or otherwise unnecessary. Empty cells are either
Mike Turquette69fe8a82012-03-15 23:11:18 -0700197optional or must be evaluated on a case-by-case basis.
198
James Hogan71472c02013-07-29 12:25:00 +0100199 clock hardware characteristics
200 -----------------------------------------------------------
201 | gate | change rate | single parent | multiplexer | root |
202 |------|-------------|---------------|-------------|------|
203.prepare | | | | | |
204.unprepare | | | | | |
205 | | | | | |
206.enable | y | | | | |
207.disable | y | | | | |
208.is_enabled | y | | | | |
209 | | | | | |
210.recalc_rate | | y | | | |
211.round_rate | | y [1] | | | |
212.determine_rate | | y [1] | | | |
213.set_rate | | y | | | |
214 | | | | | |
215.set_parent | | | n | y | n |
216.get_parent | | | n | y | n |
217 | | | | | |
Boris BREZILLON5279fc42013-12-21 10:34:47 +0100218.recalc_accuracy| | | | | |
219 | | | | | |
James Hogan71472c02013-07-29 12:25:00 +0100220.init | | | | | |
221 -----------------------------------------------------------
222[1] either one of round_rate or determine_rate is required.
Mike Turquette69fe8a82012-03-15 23:11:18 -0700223
224Finally, register your clock at run-time with a hardware-specific
225registration function. This function simply populates struct clk_foo's
226data and then passes the common struct clk parameters to the framework
227with a call to:
228
229clk_register(...)
230
231See the basic clock types in drivers/clk/clk-*.c for examples.
232
Daniel Thompson42801ca2015-05-11 11:20:06 +0100233 Part 5 - Disabling clock gating of unused clocks
Olof Johansson1e435252013-04-27 14:10:18 -0700234
235Sometimes during development it can be useful to be able to bypass the
236default disabling of unused clocks. For example, if drivers aren't enabling
237clocks properly but rely on them being on from the bootloader, bypassing
238the disabling means that the driver will remain functional while the issues
239are sorted out.
240
241To bypass this disabling, include "clk_ignore_unused" in the bootargs to the
242kernel.
Laurent Pinchart843bad82014-02-28 13:40:56 +0100243
Daniel Thompson42801ca2015-05-11 11:20:06 +0100244 Part 6 - Locking
Laurent Pinchart843bad82014-02-28 13:40:56 +0100245
246The common clock framework uses two global locks, the prepare lock and the
247enable lock.
248
249The enable lock is a spinlock and is held across calls to the .enable,
250.disable and .is_enabled operations. Those operations are thus not allowed to
251sleep, and calls to the clk_enable(), clk_disable() and clk_is_enabled() API
252functions are allowed in atomic context.
253
254The prepare lock is a mutex and is held across calls to all other operations.
255All those operations are allowed to sleep, and calls to the corresponding API
256functions are not allowed in atomic context.
257
258This effectively divides operations in two groups from a locking perspective.
259
260Drivers don't need to manually protect resources shared between the operations
261of one group, regardless of whether those resources are shared by multiple
262clocks or not. However, access to resources that are shared between operations
263of the two groups needs to be protected by the drivers. An example of such a
264resource would be a register that controls both the clock rate and the clock
265enable/disable state.
266
267The clock framework is reentrant, in that a driver is allowed to call clock
268framework functions from within its implementation of clock operations. This
269can for instance cause a .set_rate operation of one clock being called from
270within the .set_rate operation of another clock. This case must be considered
271in the driver implementations, but the code flow is usually controlled by the
272driver in that case.
273
274Note that locking must also be considered when code outside of the common
275clock framework needs to access resources used by the clock operations. This
276is considered out of scope of this document.