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gerrit-public.fairphone.software / kernel / msm-4.9 / 14ab989245069907622ab9fd930275c086cee069 / . / drivers / net / cxgb3 / adapter.h
blob: 8902007e8941115aeb61642186dc897e2a2d44c7 [file] [log] [blame]
Divy Le Ray4d22de32007-01-18 22:04:14 -0500[diff] [blame]1/*
2 * This file is part of the Chelsio T3 Ethernet driver for Linux.
3 *
4 * Copyright (C) 2003-2006 Chelsio Communications. All rights reserved.
5 *
6 * This program is distributed in the hope that it will be useful, but WITHOUT
7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8 * FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this
9 * release for licensing terms and conditions.
10 */
11
12/* This file should not be included directly. Include common.h instead. */
13
14#ifndef __T3_ADAPTER_H__
15#define __T3_ADAPTER_H__
16
17#include <linux/pci.h>
18#include <linux/spinlock.h>
19#include <linux/interrupt.h>
20#include <linux/timer.h>
21#include <linux/cache.h>
22#include "t3cdev.h"
23#include <asm/semaphore.h>
24#include <asm/bitops.h>
25#include <asm/io.h>
26
27typedef irqreturn_t(*intr_handler_t) (int, void *);
28
29struct vlan_group;
30
31struct port_info {
32 struct vlan_group *vlan_grp;
33 const struct port_type_info *port_type;
34 u8 port_id;
35 u8 rx_csum_offload;
36 u8 nqsets;
37 u8 first_qset;
38 struct cphy phy;
39 struct cmac mac;
40 struct link_config link_config;
41 struct net_device_stats netstats;
42 int activity;
43};
44
45enum { /* adapter flags */
46 FULL_INIT_DONE = (1 << 0),
47 USING_MSI = (1 << 1),
48 USING_MSIX = (1 << 2),
Divy Le Ray14ab9892007-01-30 19:43:50 -0800[diff] [blame^]49 QUEUES_BOUND = (1 << 3),
Divy Le Ray4d22de32007-01-18 22:04:14 -0500[diff] [blame]50};
51
52struct rx_desc;
53struct rx_sw_desc;
54
55struct sge_fl { /* SGE per free-buffer list state */
56 unsigned int buf_size; /* size of each Rx buffer */
57 unsigned int credits; /* # of available Rx buffers */
58 unsigned int size; /* capacity of free list */
59 unsigned int cidx; /* consumer index */
60 unsigned int pidx; /* producer index */
61 unsigned int gen; /* free list generation */
62 struct rx_desc *desc; /* address of HW Rx descriptor ring */
63 struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */
64 dma_addr_t phys_addr; /* physical address of HW ring start */
65 unsigned int cntxt_id; /* SGE context id for the free list */
66 unsigned long empty; /* # of times queue ran out of buffers */
67};
68
69/*
70 * Bundle size for grouping offload RX packets for delivery to the stack.
71 * Don't make this too big as we do prefetch on each packet in a bundle.
72 */
73# define RX_BUNDLE_SIZE 8
74
75struct rsp_desc;
76
77struct sge_rspq { /* state for an SGE response queue */
78 unsigned int credits; /* # of pending response credits */
79 unsigned int size; /* capacity of response queue */
80 unsigned int cidx; /* consumer index */
81 unsigned int gen; /* current generation bit */
82 unsigned int polling; /* is the queue serviced through NAPI? */
83 unsigned int holdoff_tmr; /* interrupt holdoff timer in 100ns */
84 unsigned int next_holdoff; /* holdoff time for next interrupt */
85 struct rsp_desc *desc; /* address of HW response ring */
86 dma_addr_t phys_addr; /* physical address of the ring */
87 unsigned int cntxt_id; /* SGE context id for the response q */
88 spinlock_t lock; /* guards response processing */
89 struct sk_buff *rx_head; /* offload packet receive queue head */
90 struct sk_buff *rx_tail; /* offload packet receive queue tail */
91
92 unsigned long offload_pkts;
93 unsigned long offload_bundles;
94 unsigned long eth_pkts; /* # of ethernet packets */
95 unsigned long pure_rsps; /* # of pure (non-data) responses */
96 unsigned long imm_data; /* responses with immediate data */
97 unsigned long rx_drops; /* # of packets dropped due to no mem */
98 unsigned long async_notif; /* # of asynchronous notification events */
99 unsigned long empty; /* # of times queue ran out of credits */
100 unsigned long nomem; /* # of responses deferred due to no mem */
101 unsigned long unhandled_irqs; /* # of spurious intrs */
102};
103
104struct tx_desc;
105struct tx_sw_desc;
106
107struct sge_txq { /* state for an SGE Tx queue */
108 unsigned long flags; /* HW DMA fetch status */
109 unsigned int in_use; /* # of in-use Tx descriptors */
110 unsigned int size; /* # of descriptors */
111 unsigned int processed; /* total # of descs HW has processed */
112 unsigned int cleaned; /* total # of descs SW has reclaimed */
113 unsigned int stop_thres; /* SW TX queue suspend threshold */
114 unsigned int cidx; /* consumer index */
115 unsigned int pidx; /* producer index */
116 unsigned int gen; /* current value of generation bit */
117 unsigned int unacked; /* Tx descriptors used since last COMPL */
118 struct tx_desc *desc; /* address of HW Tx descriptor ring */
119 struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */
120 spinlock_t lock; /* guards enqueueing of new packets */
121 unsigned int token; /* WR token */
122 dma_addr_t phys_addr; /* physical address of the ring */
123 struct sk_buff_head sendq; /* List of backpressured offload packets */
124 struct tasklet_struct qresume_tsk; /* restarts the queue */
125 unsigned int cntxt_id; /* SGE context id for the Tx q */
126 unsigned long stops; /* # of times q has been stopped */
127 unsigned long restarts; /* # of queue restarts */
128};
129
130enum { /* per port SGE statistics */
131 SGE_PSTAT_TSO, /* # of TSO requests */
132 SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */
133 SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */
134 SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */
135 SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */
136
137 SGE_PSTAT_MAX /* must be last */
138};
139
140struct sge_qset { /* an SGE queue set */
141 struct sge_rspq rspq;
142 struct sge_fl fl[SGE_RXQ_PER_SET];
143 struct sge_txq txq[SGE_TXQ_PER_SET];
144 struct net_device *netdev; /* associated net device */
145 unsigned long txq_stopped; /* which Tx queues are stopped */
146 struct timer_list tx_reclaim_timer; /* reclaims TX buffers */
147 unsigned long port_stats[SGE_PSTAT_MAX];
148} ____cacheline_aligned;
149
150struct sge {
151 struct sge_qset qs[SGE_QSETS];
152 spinlock_t reg_lock; /* guards non-atomic SGE registers (eg context) */
153};
154
155struct adapter {
156 struct t3cdev tdev;
157 struct list_head adapter_list;
158 void __iomem *regs;
159 struct pci_dev *pdev;
160 unsigned long registered_device_map;
161 unsigned long open_device_map;
162 unsigned long flags;
163
164 const char *name;
165 int msg_enable;
166 unsigned int mmio_len;
167
168 struct adapter_params params;
169 unsigned int slow_intr_mask;
170 unsigned long irq_stats[IRQ_NUM_STATS];
171
172 struct {
173 unsigned short vec;
174 char desc[22];
175 } msix_info[SGE_QSETS + 1];
176
177 /* T3 modules */
178 struct sge sge;
179 struct mc7 pmrx;
180 struct mc7 pmtx;
181 struct mc7 cm;
182 struct mc5 mc5;
183
184 struct net_device *port[MAX_NPORTS];
185 unsigned int check_task_cnt;
186 struct delayed_work adap_check_task;
187 struct work_struct ext_intr_handler_task;
188
189 /*
190 * Dummy netdevices are needed when using multiple receive queues with
191 * NAPI as each netdevice can service only one queue.
192 */
193 struct net_device *dummy_netdev[SGE_QSETS - 1];
194
195 struct dentry *debugfs_root;
196
197 struct mutex mdio_lock;
198 spinlock_t stats_lock;
199 spinlock_t work_lock;
200};
201
202static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr)
203{
204 u32 val = readl(adapter->regs + reg_addr);
205
206 CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val);
207 return val;
208}
209
210static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
211{
212 CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val);
213 writel(val, adapter->regs + reg_addr);
214}
215
216static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
217{
218 return netdev_priv(adap->port[idx]);
219}
220
221/*
222 * We use the spare atalk_ptr to map a net device to its SGE queue set.
223 * This is a macro so it can be used as l-value.
224 */
225#define dev2qset(netdev) ((netdev)->atalk_ptr)
226
227#define OFFLOAD_DEVMAP_BIT 15
228
229#define tdev2adap(d) container_of(d, struct adapter, tdev)
230
231static inline int offload_running(struct adapter *adapter)
232{
233 return test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
234}
235
236int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb);
237
238void t3_os_ext_intr_handler(struct adapter *adapter);
239void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status,
240 int speed, int duplex, int fc);
241
242void t3_sge_start(struct adapter *adap);
243void t3_sge_stop(struct adapter *adap);
244void t3_free_sge_resources(struct adapter *adap);
245void t3_sge_err_intr_handler(struct adapter *adapter);
246intr_handler_t t3_intr_handler(struct adapter *adap, int polling);
247int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev);
Divy Le Ray14ab9892007-01-30 19:43:50 -0800[diff] [blame^]248int t3_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
Divy Le Ray4d22de32007-01-18 22:04:14 -0500[diff] [blame]249void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p);
250int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
251 int irq_vec_idx, const struct qset_params *p,
252 int ntxq, struct net_device *netdev);
253int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx,
254 unsigned char *data);
255irqreturn_t t3_sge_intr_msix(int irq, void *cookie);
256
257#endif /* __T3_ADAPTER_H__ */