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Ben Dooks992426b2010-02-20 23:01:33 +00001/* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h
Ben Dooks505788c2006-09-15 23:42:24 +01002 *
3 * Copyright (C) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
Ben Dooks992426b2010-02-20 23:01:33 +00006 * Samsung S3C24XX DMA support - per SoC functions
Ben Dooks505788c2006-09-15 23:42:24 +01007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
Ben Dooks97c1b142009-03-19 15:02:39 +000013#include <plat/dma-core.h>
14
Ben Dooks505788c2006-09-15 23:42:24 +010015extern struct sysdev_class dma_sysclass;
Ben Dooks97c1b142009-03-19 15:02:39 +000016extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS];
Ben Dooks505788c2006-09-15 23:42:24 +010017
18#define DMA_CH_VALID (1<<31)
Ben Dooks0c6022d2007-02-13 13:02:52 +010019#define DMA_CH_NEVER (1<<30)
Ben Dooks505788c2006-09-15 23:42:24 +010020
Ben Dooks505788c2006-09-15 23:42:24 +010021/* struct s3c24xx_dma_map
22 *
23 * this holds the mapping information for the channel selected
24 * to be connected to the specified device
25*/
26
27struct s3c24xx_dma_map {
28 const char *name;
Ben Dooks505788c2006-09-15 23:42:24 +010029
Ben Dooks97c1b142009-03-19 15:02:39 +000030 unsigned long channels[S3C_DMA_CHANNELS];
31 unsigned long channels_rx[S3C_DMA_CHANNELS];
Ben Dooks505788c2006-09-15 23:42:24 +010032};
33
34struct s3c24xx_dma_selection {
35 struct s3c24xx_dma_map *map;
36 unsigned long map_size;
37 unsigned long dcon_mask;
38
39 void (*select)(struct s3c2410_dma_chan *chan,
40 struct s3c24xx_dma_map *map);
Ben Dooksc6709e82008-01-28 13:01:20 +010041
42 void (*direction)(struct s3c2410_dma_chan *chan,
43 struct s3c24xx_dma_map *map,
Boojin Kim51ddf312011-09-02 09:44:44 +090044 enum dma_data_direction dir);
Ben Dooks505788c2006-09-15 23:42:24 +010045};
46
47extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel);
Ben Dooks0c6022d2007-02-13 13:02:52 +010048
49/* struct s3c24xx_dma_order_ch
50 *
51 * channel map for one of the `enum dma_ch` dma channels. the list
52 * entry contains a set of low-level channel numbers, orred with
53 * DMA_CH_VALID, which are checked in the order in the array.
54*/
55
56struct s3c24xx_dma_order_ch {
Ben Dooks97c1b142009-03-19 15:02:39 +000057 unsigned int list[S3C_DMA_CHANNELS]; /* list of channels */
Ben Dooks0c6022d2007-02-13 13:02:52 +010058 unsigned int flags; /* flags */
59};
60
61/* struct s3c24xx_dma_order
62 *
63 * information provided by either the core or the board to give the
64 * dma system a hint on how to allocate channels
65*/
66
67struct s3c24xx_dma_order {
68 struct s3c24xx_dma_order_ch channels[DMACH_MAX];
69};
70
71extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map);
Ben Dooks48adbcf2007-02-17 15:37:14 +010072
73/* DMA init code, called from the cpu support code */
74
75extern int s3c2410_dma_init(void);
76
77extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq,
78 unsigned int stride);