blob: 5ad65d51fb95a64e1fbc646bb416c06e30a77541 [file] [log] [blame]
Andi Kleen352f7ba2006-09-26 10:52:31 +02001Most of the text from Keith Owens, hacked by AK
2
3x86_64 page size (PAGE_SIZE) is 4K.
4
5Like all other architectures, x86_64 has a kernel stack for every
6active thread. These thread stacks are THREAD_SIZE (2*PAGE_SIZE) big.
7These stacks contain useful data as long as a thread is alive or a
8zombie. While the thread is in user space the kernel stack is empty
9except for the thread_info structure at the bottom.
10
11In addition to the per thread stacks, there are specialized stacks
Randy Dunlap57d30772007-02-13 13:26:23 +010012associated with each CPU. These stacks are only used while the kernel
13is in control on that CPU; when a CPU returns to user space the
14specialized stacks contain no useful data. The main CPU stacks are:
Andi Kleen352f7ba2006-09-26 10:52:31 +020015
16* Interrupt stack. IRQSTACKSIZE
17
18 Used for external hardware interrupts. If this is the first external
19 hardware interrupt (i.e. not a nested hardware interrupt) then the
20 kernel switches from the current task to the interrupt stack. Like
21 the split thread and interrupt stacks on i386 (with CONFIG_4KSTACKS),
22 this gives more room for kernel interrupt processing without having
23 to increase the size of every per thread stack.
24
25 The interrupt stack is also used when processing a softirq.
26
27Switching to the kernel interrupt stack is done by software based on a
28per CPU interrupt nest counter. This is needed because x86-64 "IST"
29hardware stacks cannot nest without races.
30
31x86_64 also has a feature which is not available on i386, the ability
32to automatically switch to a new stack for designated events such as
33double fault or NMI, which makes it easier to handle these unusual
34events on x86_64. This feature is called the Interrupt Stack Table
Randy Dunlap57d30772007-02-13 13:26:23 +010035(IST). There can be up to 7 IST entries per CPU. The IST code is an
36index into the Task State Segment (TSS). The IST entries in the TSS
37point to dedicated stacks; each stack can be a different size.
Andi Kleen352f7ba2006-09-26 10:52:31 +020038
Randy Dunlap57d30772007-02-13 13:26:23 +010039An IST is selected by a non-zero value in the IST field of an
Andi Kleen352f7ba2006-09-26 10:52:31 +020040interrupt-gate descriptor. When an interrupt occurs and the hardware
41loads such a descriptor, the hardware automatically sets the new stack
42pointer based on the IST value, then invokes the interrupt handler. If
43software wants to allow nested IST interrupts then the handler must
44adjust the IST values on entry to and exit from the interrupt handler.
Randy Dunlap57d30772007-02-13 13:26:23 +010045(This is occasionally done, e.g. for debug exceptions.)
Andi Kleen352f7ba2006-09-26 10:52:31 +020046
47Events with different IST codes (i.e. with different stacks) can be
48nested. For example, a debug interrupt can safely be interrupted by an
49NMI. arch/x86_64/kernel/entry.S::paranoidentry adjusts the stack
50pointers on entry to and exit from all IST events, in theory allowing
51IST events with the same code to be nested. However in most cases, the
52stack size allocated to an IST assumes no nesting for the same code.
53If that assumption is ever broken then the stacks will become corrupt.
54
55The currently assigned IST stacks are :-
56
57* STACKFAULT_STACK. EXCEPTION_STKSZ (PAGE_SIZE).
58
59 Used for interrupt 12 - Stack Fault Exception (#SS).
60
Randy Dunlap57d30772007-02-13 13:26:23 +010061 This allows the CPU to recover from invalid stack segments. Rarely
Andi Kleen352f7ba2006-09-26 10:52:31 +020062 happens.
63
64* DOUBLEFAULT_STACK. EXCEPTION_STKSZ (PAGE_SIZE).
65
66 Used for interrupt 8 - Double Fault Exception (#DF).
67
Randy Dunlap57d30772007-02-13 13:26:23 +010068 Invoked when handling one exception causes another exception. Happens
69 when the kernel is very confused (e.g. kernel stack pointer corrupt).
70 Using a separate stack allows the kernel to recover from it well enough
71 in many cases to still output an oops.
Andi Kleen352f7ba2006-09-26 10:52:31 +020072
73* NMI_STACK. EXCEPTION_STKSZ (PAGE_SIZE).
74
75 Used for non-maskable interrupts (NMI).
76
77 NMI can be delivered at any time, including when the kernel is in the
78 middle of switching stacks. Using IST for NMI events avoids making
79 assumptions about the previous state of the kernel stack.
80
81* DEBUG_STACK. DEBUG_STKSZ
82
83 Used for hardware debug interrupts (interrupt 1) and for software
84 debug interrupts (INT3).
85
86 When debugging a kernel, debug interrupts (both hardware and
87 software) can occur at any time. Using IST for these interrupts
88 avoids making assumptions about the previous state of the kernel
89 stack.
90
91* MCE_STACK. EXCEPTION_STKSZ (PAGE_SIZE).
92
93 Used for interrupt 18 - Machine Check Exception (#MC).
94
95 MCE can be delivered at any time, including when the kernel is in the
96 middle of switching stacks. Using IST for MCE events avoids making
97 assumptions about the previous state of the kernel stack.
98
99For more details see the Intel IA32 or AMD AMD64 architecture manuals.