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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Network device driver for the MACE ethernet controller on
3 * Apple Powermacs. Assumes it's under a DBDMA controller.
4 *
5 * Copyright (C) 1996 Paul Mackerras.
6 */
7
Linus Torvalds1da177e2005-04-16 15:20:36 -07008#include <linux/module.h>
9#include <linux/kernel.h>
10#include <linux/netdevice.h>
11#include <linux/etherdevice.h>
12#include <linux/delay.h>
13#include <linux/string.h>
14#include <linux/timer.h>
15#include <linux/init.h>
16#include <linux/crc32.h>
17#include <linux/spinlock.h>
Akinobu Mitabc63eb92006-12-19 13:09:08 -080018#include <linux/bitrev.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090019#include <linux/slab.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020#include <asm/prom.h>
21#include <asm/dbdma.h>
22#include <asm/io.h>
23#include <asm/pgtable.h>
24#include <asm/macio.h>
25
26#include "mace.h"
27
28static int port_aaui = -1;
29
30#define N_RX_RING 8
31#define N_TX_RING 6
32#define MAX_TX_ACTIVE 1
33#define NCMDS_TX 1 /* dma commands per element in tx ring */
34#define RX_BUFLEN (ETH_FRAME_LEN + 8)
35#define TX_TIMEOUT HZ /* 1 second */
36
37/* Chip rev needs workaround on HW & multicast addr change */
38#define BROKEN_ADDRCHG_REV 0x0941
39
40/* Bits in transmit DMA status */
41#define TX_DMA_ERR 0x80
42
43struct mace_data {
44 volatile struct mace __iomem *mace;
45 volatile struct dbdma_regs __iomem *tx_dma;
46 int tx_dma_intr;
47 volatile struct dbdma_regs __iomem *rx_dma;
48 int rx_dma_intr;
49 volatile struct dbdma_cmd *tx_cmds; /* xmit dma command list */
50 volatile struct dbdma_cmd *rx_cmds; /* recv dma command list */
51 struct sk_buff *rx_bufs[N_RX_RING];
52 int rx_fill;
53 int rx_empty;
54 struct sk_buff *tx_bufs[N_TX_RING];
55 int tx_fill;
56 int tx_empty;
57 unsigned char maccc;
58 unsigned char tx_fullup;
59 unsigned char tx_active;
60 unsigned char tx_bad_runt;
Linus Torvalds1da177e2005-04-16 15:20:36 -070061 struct timer_list tx_timeout;
62 int timeout_active;
63 int port_aaui;
64 int chipid;
65 struct macio_dev *mdev;
66 spinlock_t lock;
67};
68
69/*
70 * Number of bytes of private data per MACE: allow enough for
71 * the rx and tx dma commands plus a branch dma command each,
72 * and another 16 bytes to allow us to align the dma command
73 * buffers on a 16 byte boundary.
74 */
75#define PRIV_BYTES (sizeof(struct mace_data) \
76 + (N_RX_RING + NCMDS_TX * N_TX_RING + 3) * sizeof(struct dbdma_cmd))
77
Linus Torvalds1da177e2005-04-16 15:20:36 -070078static int mace_open(struct net_device *dev);
79static int mace_close(struct net_device *dev);
80static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070081static void mace_set_multicast(struct net_device *dev);
82static void mace_reset(struct net_device *dev);
83static int mace_set_address(struct net_device *dev, void *addr);
David Howells7d12e782006-10-05 14:55:46 +010084static irqreturn_t mace_interrupt(int irq, void *dev_id);
85static irqreturn_t mace_txdma_intr(int irq, void *dev_id);
86static irqreturn_t mace_rxdma_intr(int irq, void *dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -070087static void mace_set_timeout(struct net_device *dev);
88static void mace_tx_timeout(unsigned long data);
89static inline void dbdma_reset(volatile struct dbdma_regs __iomem *dma);
90static inline void mace_clean_rings(struct mace_data *mp);
91static void __mace_set_address(struct net_device *dev, void *addr);
92
93/*
94 * If we can't get a skbuff when we need it, we use this area for DMA.
95 */
96static unsigned char *dummy_buf;
97
Alexander Beregalov488b4ab2009-04-15 12:52:48 +000098static const struct net_device_ops mace_netdev_ops = {
99 .ndo_open = mace_open,
100 .ndo_stop = mace_close,
101 .ndo_start_xmit = mace_xmit_start,
102 .ndo_set_multicast_list = mace_set_multicast,
103 .ndo_set_mac_address = mace_set_address,
104 .ndo_change_mtu = eth_change_mtu,
105 .ndo_validate_addr = eth_validate_addr,
106};
107
Jeff Mahoney5e655772005-07-06 15:44:41 -0400108static int __devinit mace_probe(struct macio_dev *mdev, const struct of_device_id *match)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109{
110 struct device_node *mace = macio_get_of_node(mdev);
111 struct net_device *dev;
112 struct mace_data *mp;
Jeremy Kerr1a2509c2006-07-12 15:41:03 +1000113 const unsigned char *addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114 int j, rev, rc = -EBUSY;
115
116 if (macio_resource_count(mdev) != 3 || macio_irq_count(mdev) != 3) {
117 printk(KERN_ERR "can't use MACE %s: need 3 addrs and 3 irqs\n",
118 mace->full_name);
119 return -ENODEV;
120 }
121
Stephen Rothwell40cd3a42007-05-01 13:54:02 +1000122 addr = of_get_property(mace, "mac-address", NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700123 if (addr == NULL) {
Stephen Rothwell40cd3a42007-05-01 13:54:02 +1000124 addr = of_get_property(mace, "local-mac-address", NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125 if (addr == NULL) {
126 printk(KERN_ERR "Can't get mac-address for MACE %s\n",
127 mace->full_name);
128 return -ENODEV;
129 }
130 }
131
132 /*
133 * lazy allocate the driver-wide dummy buffer. (Note that we
134 * never have more than one MACE in the system anyway)
135 */
136 if (dummy_buf == NULL) {
137 dummy_buf = kmalloc(RX_BUFLEN+2, GFP_KERNEL);
138 if (dummy_buf == NULL) {
139 printk(KERN_ERR "MACE: couldn't allocate dummy buffer\n");
140 return -ENOMEM;
141 }
142 }
143
144 if (macio_request_resources(mdev, "mace")) {
145 printk(KERN_ERR "MACE: can't request IO resources !\n");
146 return -EBUSY;
147 }
148
149 dev = alloc_etherdev(PRIV_BYTES);
150 if (!dev) {
151 printk(KERN_ERR "MACE: can't allocate ethernet device !\n");
152 rc = -ENOMEM;
153 goto err_release;
154 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700155 SET_NETDEV_DEV(dev, &mdev->ofdev.dev);
156
Wang Chen454d7c92008-11-12 23:37:49 -0800157 mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 mp->mdev = mdev;
159 macio_set_drvdata(mdev, dev);
160
161 dev->base_addr = macio_resource_start(mdev, 0);
162 mp->mace = ioremap(dev->base_addr, 0x1000);
163 if (mp->mace == NULL) {
164 printk(KERN_ERR "MACE: can't map IO resources !\n");
165 rc = -ENOMEM;
166 goto err_free;
167 }
168 dev->irq = macio_irq(mdev, 0);
169
170 rev = addr[0] == 0 && addr[1] == 0xA0;
171 for (j = 0; j < 6; ++j) {
Akinobu Mitabc63eb92006-12-19 13:09:08 -0800172 dev->dev_addr[j] = rev ? bitrev8(addr[j]): addr[j];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173 }
174 mp->chipid = (in_8(&mp->mace->chipid_hi) << 8) |
175 in_8(&mp->mace->chipid_lo);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400176
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177
Wang Chen454d7c92008-11-12 23:37:49 -0800178 mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 mp->maccc = ENXMT | ENRCV;
180
181 mp->tx_dma = ioremap(macio_resource_start(mdev, 1), 0x1000);
182 if (mp->tx_dma == NULL) {
183 printk(KERN_ERR "MACE: can't map TX DMA resources !\n");
184 rc = -ENOMEM;
185 goto err_unmap_io;
186 }
187 mp->tx_dma_intr = macio_irq(mdev, 1);
188
189 mp->rx_dma = ioremap(macio_resource_start(mdev, 2), 0x1000);
190 if (mp->rx_dma == NULL) {
191 printk(KERN_ERR "MACE: can't map RX DMA resources !\n");
192 rc = -ENOMEM;
193 goto err_unmap_tx_dma;
194 }
195 mp->rx_dma_intr = macio_irq(mdev, 2);
196
197 mp->tx_cmds = (volatile struct dbdma_cmd *) DBDMA_ALIGN(mp + 1);
198 mp->rx_cmds = mp->tx_cmds + NCMDS_TX * N_TX_RING + 1;
199
Linus Torvalds1da177e2005-04-16 15:20:36 -0700200 memset((char *) mp->tx_cmds, 0,
201 (NCMDS_TX*N_TX_RING + N_RX_RING + 2) * sizeof(struct dbdma_cmd));
202 init_timer(&mp->tx_timeout);
203 spin_lock_init(&mp->lock);
204 mp->timeout_active = 0;
205
206 if (port_aaui >= 0)
207 mp->port_aaui = port_aaui;
208 else {
209 /* Apple Network Server uses the AAUI port */
Grant Likely71a157e2010-02-01 21:34:14 -0700210 if (of_machine_is_compatible("AAPL,ShinerESB"))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211 mp->port_aaui = 1;
212 else {
213#ifdef CONFIG_MACE_AAUI_PORT
214 mp->port_aaui = 1;
215#else
216 mp->port_aaui = 0;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400217#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 }
219 }
220
Alexander Beregalov488b4ab2009-04-15 12:52:48 +0000221 dev->netdev_ops = &mace_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700222
223 /*
224 * Most of what is below could be moved to mace_open()
225 */
226 mace_reset(dev);
227
228 rc = request_irq(dev->irq, mace_interrupt, 0, "MACE", dev);
229 if (rc) {
230 printk(KERN_ERR "MACE: can't get irq %d\n", dev->irq);
231 goto err_unmap_rx_dma;
232 }
233 rc = request_irq(mp->tx_dma_intr, mace_txdma_intr, 0, "MACE-txdma", dev);
234 if (rc) {
Benjamin Herrenschmidt0ebfff12006-07-03 21:36:01 +1000235 printk(KERN_ERR "MACE: can't get irq %d\n", mp->tx_dma_intr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 goto err_free_irq;
237 }
238 rc = request_irq(mp->rx_dma_intr, mace_rxdma_intr, 0, "MACE-rxdma", dev);
239 if (rc) {
Benjamin Herrenschmidt0ebfff12006-07-03 21:36:01 +1000240 printk(KERN_ERR "MACE: can't get irq %d\n", mp->rx_dma_intr);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700241 goto err_free_tx_irq;
242 }
243
244 rc = register_netdev(dev);
245 if (rc) {
246 printk(KERN_ERR "MACE: Cannot register net device, aborting.\n");
247 goto err_free_rx_irq;
248 }
249
Johannes Berge1749612008-10-27 15:59:26 -0700250 printk(KERN_INFO "%s: MACE at %pM, chip revision %d.%d\n",
251 dev->name, dev->dev_addr,
Joe Perches0795af52007-10-03 17:59:30 -0700252 mp->chipid >> 8, mp->chipid & 0xff);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700253
254 return 0;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400255
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256 err_free_rx_irq:
257 free_irq(macio_irq(mdev, 2), dev);
258 err_free_tx_irq:
259 free_irq(macio_irq(mdev, 1), dev);
260 err_free_irq:
261 free_irq(macio_irq(mdev, 0), dev);
262 err_unmap_rx_dma:
263 iounmap(mp->rx_dma);
264 err_unmap_tx_dma:
265 iounmap(mp->tx_dma);
266 err_unmap_io:
267 iounmap(mp->mace);
268 err_free:
269 free_netdev(dev);
270 err_release:
271 macio_release_resources(mdev);
272
273 return rc;
274}
275
276static int __devexit mace_remove(struct macio_dev *mdev)
277{
278 struct net_device *dev = macio_get_drvdata(mdev);
279 struct mace_data *mp;
280
281 BUG_ON(dev == NULL);
282
283 macio_set_drvdata(mdev, NULL);
284
Wang Chen454d7c92008-11-12 23:37:49 -0800285 mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286
287 unregister_netdev(dev);
288
289 free_irq(dev->irq, dev);
290 free_irq(mp->tx_dma_intr, dev);
291 free_irq(mp->rx_dma_intr, dev);
292
293 iounmap(mp->rx_dma);
294 iounmap(mp->tx_dma);
295 iounmap(mp->mace);
296
297 free_netdev(dev);
298
299 macio_release_resources(mdev);
300
301 return 0;
302}
303
304static void dbdma_reset(volatile struct dbdma_regs __iomem *dma)
305{
306 int i;
307
308 out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16);
309
310 /*
311 * Yes this looks peculiar, but apparently it needs to be this
312 * way on some machines.
313 */
314 for (i = 200; i > 0; --i)
315 if (ld_le32(&dma->control) & RUN)
316 udelay(1);
317}
318
319static void mace_reset(struct net_device *dev)
320{
Wang Chen454d7c92008-11-12 23:37:49 -0800321 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700322 volatile struct mace __iomem *mb = mp->mace;
323 int i;
324
325 /* soft-reset the chip */
326 i = 200;
327 while (--i) {
328 out_8(&mb->biucc, SWRST);
329 if (in_8(&mb->biucc) & SWRST) {
330 udelay(10);
331 continue;
332 }
333 break;
334 }
335 if (!i) {
336 printk(KERN_ERR "mace: cannot reset chip!\n");
337 return;
338 }
339
340 out_8(&mb->imr, 0xff); /* disable all intrs for now */
341 i = in_8(&mb->ir);
342 out_8(&mb->maccc, 0); /* turn off tx, rx */
343
344 out_8(&mb->biucc, XMTSP_64);
345 out_8(&mb->utr, RTRD);
346 out_8(&mb->fifocc, RCVFW_32 | XMTFW_16 | XMTFWU | RCVFWU | XMTBRST);
347 out_8(&mb->xmtfc, AUTO_PAD_XMIT); /* auto-pad short frames */
348 out_8(&mb->rcvfc, 0);
349
350 /* load up the hardware address */
351 __mace_set_address(dev, dev->dev_addr);
352
353 /* clear the multicast filter */
354 if (mp->chipid == BROKEN_ADDRCHG_REV)
355 out_8(&mb->iac, LOGADDR);
356 else {
357 out_8(&mb->iac, ADDRCHG | LOGADDR);
358 while ((in_8(&mb->iac) & ADDRCHG) != 0)
359 ;
360 }
361 for (i = 0; i < 8; ++i)
362 out_8(&mb->ladrf, 0);
363
364 /* done changing address */
365 if (mp->chipid != BROKEN_ADDRCHG_REV)
366 out_8(&mb->iac, 0);
367
368 if (mp->port_aaui)
369 out_8(&mb->plscc, PORTSEL_AUI + ENPLSIO);
370 else
371 out_8(&mb->plscc, PORTSEL_GPSI + ENPLSIO);
372}
373
374static void __mace_set_address(struct net_device *dev, void *addr)
375{
Wang Chen454d7c92008-11-12 23:37:49 -0800376 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700377 volatile struct mace __iomem *mb = mp->mace;
378 unsigned char *p = addr;
379 int i;
380
381 /* load up the hardware address */
382 if (mp->chipid == BROKEN_ADDRCHG_REV)
383 out_8(&mb->iac, PHYADDR);
384 else {
385 out_8(&mb->iac, ADDRCHG | PHYADDR);
386 while ((in_8(&mb->iac) & ADDRCHG) != 0)
387 ;
388 }
389 for (i = 0; i < 6; ++i)
390 out_8(&mb->padr, dev->dev_addr[i] = p[i]);
391 if (mp->chipid != BROKEN_ADDRCHG_REV)
392 out_8(&mb->iac, 0);
393}
394
395static int mace_set_address(struct net_device *dev, void *addr)
396{
Wang Chen454d7c92008-11-12 23:37:49 -0800397 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398 volatile struct mace __iomem *mb = mp->mace;
399 unsigned long flags;
400
401 spin_lock_irqsave(&mp->lock, flags);
402
403 __mace_set_address(dev, addr);
404
405 /* note: setting ADDRCHG clears ENRCV */
406 out_8(&mb->maccc, mp->maccc);
407
408 spin_unlock_irqrestore(&mp->lock, flags);
409 return 0;
410}
411
412static inline void mace_clean_rings(struct mace_data *mp)
413{
414 int i;
415
416 /* free some skb's */
417 for (i = 0; i < N_RX_RING; ++i) {
Al Viro79ea13c2008-01-24 02:06:46 -0800418 if (mp->rx_bufs[i] != NULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700419 dev_kfree_skb(mp->rx_bufs[i]);
420 mp->rx_bufs[i] = NULL;
421 }
422 }
423 for (i = mp->tx_empty; i != mp->tx_fill; ) {
424 dev_kfree_skb(mp->tx_bufs[i]);
425 if (++i >= N_TX_RING)
426 i = 0;
427 }
428}
429
430static int mace_open(struct net_device *dev)
431{
Wang Chen454d7c92008-11-12 23:37:49 -0800432 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433 volatile struct mace __iomem *mb = mp->mace;
434 volatile struct dbdma_regs __iomem *rd = mp->rx_dma;
435 volatile struct dbdma_regs __iomem *td = mp->tx_dma;
436 volatile struct dbdma_cmd *cp;
437 int i;
438 struct sk_buff *skb;
439 unsigned char *data;
440
441 /* reset the chip */
442 mace_reset(dev);
443
444 /* initialize list of sk_buffs for receiving and set up recv dma */
445 mace_clean_rings(mp);
446 memset((char *)mp->rx_cmds, 0, N_RX_RING * sizeof(struct dbdma_cmd));
447 cp = mp->rx_cmds;
448 for (i = 0; i < N_RX_RING - 1; ++i) {
449 skb = dev_alloc_skb(RX_BUFLEN + 2);
Al Viro79ea13c2008-01-24 02:06:46 -0800450 if (!skb) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700451 data = dummy_buf;
452 } else {
453 skb_reserve(skb, 2); /* so IP header lands on 4-byte bdry */
454 data = skb->data;
455 }
456 mp->rx_bufs[i] = skb;
457 st_le16(&cp->req_count, RX_BUFLEN);
458 st_le16(&cp->command, INPUT_LAST + INTR_ALWAYS);
459 st_le32(&cp->phy_addr, virt_to_bus(data));
460 cp->xfer_status = 0;
461 ++cp;
462 }
463 mp->rx_bufs[i] = NULL;
464 st_le16(&cp->command, DBDMA_STOP);
465 mp->rx_fill = i;
466 mp->rx_empty = 0;
467
468 /* Put a branch back to the beginning of the receive command list */
469 ++cp;
470 st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS);
471 st_le32(&cp->cmd_dep, virt_to_bus(mp->rx_cmds));
472
473 /* start rx dma */
474 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
475 out_le32(&rd->cmdptr, virt_to_bus(mp->rx_cmds));
476 out_le32(&rd->control, (RUN << 16) | RUN);
477
478 /* put a branch at the end of the tx command list */
479 cp = mp->tx_cmds + NCMDS_TX * N_TX_RING;
480 st_le16(&cp->command, DBDMA_NOP + BR_ALWAYS);
481 st_le32(&cp->cmd_dep, virt_to_bus(mp->tx_cmds));
482
483 /* reset tx dma */
484 out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16);
485 out_le32(&td->cmdptr, virt_to_bus(mp->tx_cmds));
486 mp->tx_fill = 0;
487 mp->tx_empty = 0;
488 mp->tx_fullup = 0;
489 mp->tx_active = 0;
490 mp->tx_bad_runt = 0;
491
492 /* turn it on! */
493 out_8(&mb->maccc, mp->maccc);
494 /* enable all interrupts except receive interrupts */
495 out_8(&mb->imr, RCVINT);
496
497 return 0;
498}
499
500static int mace_close(struct net_device *dev)
501{
Wang Chen454d7c92008-11-12 23:37:49 -0800502 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700503 volatile struct mace __iomem *mb = mp->mace;
504 volatile struct dbdma_regs __iomem *rd = mp->rx_dma;
505 volatile struct dbdma_regs __iomem *td = mp->tx_dma;
506
507 /* disable rx and tx */
508 out_8(&mb->maccc, 0);
509 out_8(&mb->imr, 0xff); /* disable all intrs */
510
511 /* disable rx and tx dma */
512 st_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
513 st_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */
514
515 mace_clean_rings(mp);
516
517 return 0;
518}
519
520static inline void mace_set_timeout(struct net_device *dev)
521{
Wang Chen454d7c92008-11-12 23:37:49 -0800522 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523
524 if (mp->timeout_active)
525 del_timer(&mp->tx_timeout);
526 mp->tx_timeout.expires = jiffies + TX_TIMEOUT;
527 mp->tx_timeout.function = mace_tx_timeout;
528 mp->tx_timeout.data = (unsigned long) dev;
529 add_timer(&mp->tx_timeout);
530 mp->timeout_active = 1;
531}
532
533static int mace_xmit_start(struct sk_buff *skb, struct net_device *dev)
534{
Wang Chen454d7c92008-11-12 23:37:49 -0800535 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536 volatile struct dbdma_regs __iomem *td = mp->tx_dma;
537 volatile struct dbdma_cmd *cp, *np;
538 unsigned long flags;
539 int fill, next, len;
540
541 /* see if there's a free slot in the tx ring */
542 spin_lock_irqsave(&mp->lock, flags);
543 fill = mp->tx_fill;
544 next = fill + 1;
545 if (next >= N_TX_RING)
546 next = 0;
547 if (next == mp->tx_empty) {
548 netif_stop_queue(dev);
549 mp->tx_fullup = 1;
550 spin_unlock_irqrestore(&mp->lock, flags);
Patrick McHardy5b548142009-06-12 06:22:29 +0000551 return NETDEV_TX_BUSY; /* can't take it at the moment */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700552 }
553 spin_unlock_irqrestore(&mp->lock, flags);
554
555 /* partially fill in the dma command block */
556 len = skb->len;
557 if (len > ETH_FRAME_LEN) {
558 printk(KERN_DEBUG "mace: xmit frame too long (%d)\n", len);
559 len = ETH_FRAME_LEN;
560 }
561 mp->tx_bufs[fill] = skb;
562 cp = mp->tx_cmds + NCMDS_TX * fill;
563 st_le16(&cp->req_count, len);
564 st_le32(&cp->phy_addr, virt_to_bus(skb->data));
565
566 np = mp->tx_cmds + NCMDS_TX * next;
567 out_le16(&np->command, DBDMA_STOP);
568
569 /* poke the tx dma channel */
570 spin_lock_irqsave(&mp->lock, flags);
571 mp->tx_fill = next;
572 if (!mp->tx_bad_runt && mp->tx_active < MAX_TX_ACTIVE) {
573 out_le16(&cp->xfer_status, 0);
574 out_le16(&cp->command, OUTPUT_LAST);
575 out_le32(&td->control, ((RUN|WAKE) << 16) + (RUN|WAKE));
576 ++mp->tx_active;
577 mace_set_timeout(dev);
578 }
579 if (++next >= N_TX_RING)
580 next = 0;
581 if (next == mp->tx_empty)
582 netif_stop_queue(dev);
583 spin_unlock_irqrestore(&mp->lock, flags);
584
Patrick McHardy6ed10652009-06-23 06:03:08 +0000585 return NETDEV_TX_OK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700586}
587
Linus Torvalds1da177e2005-04-16 15:20:36 -0700588static void mace_set_multicast(struct net_device *dev)
589{
Wang Chen454d7c92008-11-12 23:37:49 -0800590 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700591 volatile struct mace __iomem *mb = mp->mace;
Jiri Pirkof9dcbcc2010-02-23 09:19:49 +0000592 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700593 u32 crc;
594 unsigned long flags;
595
596 spin_lock_irqsave(&mp->lock, flags);
597 mp->maccc &= ~PROM;
598 if (dev->flags & IFF_PROMISC) {
599 mp->maccc |= PROM;
600 } else {
601 unsigned char multicast_filter[8];
Jiri Pirko22bedad32010-04-01 21:22:57 +0000602 struct netdev_hw_addr *ha;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603
604 if (dev->flags & IFF_ALLMULTI) {
605 for (i = 0; i < 8; i++)
606 multicast_filter[i] = 0xff;
607 } else {
608 for (i = 0; i < 8; i++)
609 multicast_filter[i] = 0;
Jiri Pirko22bedad32010-04-01 21:22:57 +0000610 netdev_for_each_mc_addr(ha, dev) {
611 crc = ether_crc_le(6, ha->addr);
Jiri Pirkof9dcbcc2010-02-23 09:19:49 +0000612 i = crc >> 26; /* bit number in multicast_filter */
613 multicast_filter[i >> 3] |= 1 << (i & 7);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614 }
615 }
616#if 0
617 printk("Multicast filter :");
618 for (i = 0; i < 8; i++)
619 printk("%02x ", multicast_filter[i]);
620 printk("\n");
621#endif
622
623 if (mp->chipid == BROKEN_ADDRCHG_REV)
624 out_8(&mb->iac, LOGADDR);
625 else {
626 out_8(&mb->iac, ADDRCHG | LOGADDR);
627 while ((in_8(&mb->iac) & ADDRCHG) != 0)
628 ;
629 }
630 for (i = 0; i < 8; ++i)
631 out_8(&mb->ladrf, multicast_filter[i]);
632 if (mp->chipid != BROKEN_ADDRCHG_REV)
633 out_8(&mb->iac, 0);
634 }
635 /* reset maccc */
636 out_8(&mb->maccc, mp->maccc);
637 spin_unlock_irqrestore(&mp->lock, flags);
638}
639
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700640static void mace_handle_misc_intrs(struct mace_data *mp, int intr, struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700641{
642 volatile struct mace __iomem *mb = mp->mace;
643 static int mace_babbles, mace_jabbers;
644
645 if (intr & MPCO)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700646 dev->stats.rx_missed_errors += 256;
647 dev->stats.rx_missed_errors += in_8(&mb->mpc); /* reading clears it */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700648 if (intr & RNTPCO)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700649 dev->stats.rx_length_errors += 256;
650 dev->stats.rx_length_errors += in_8(&mb->rntpc); /* reading clears it */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700651 if (intr & CERR)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700652 ++dev->stats.tx_heartbeat_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700653 if (intr & BABBLE)
654 if (mace_babbles++ < 4)
655 printk(KERN_DEBUG "mace: babbling transmitter\n");
656 if (intr & JABBER)
657 if (mace_jabbers++ < 4)
658 printk(KERN_DEBUG "mace: jabbering transceiver\n");
659}
660
David Howells7d12e782006-10-05 14:55:46 +0100661static irqreturn_t mace_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700662{
663 struct net_device *dev = (struct net_device *) dev_id;
Wang Chen454d7c92008-11-12 23:37:49 -0800664 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665 volatile struct mace __iomem *mb = mp->mace;
666 volatile struct dbdma_regs __iomem *td = mp->tx_dma;
667 volatile struct dbdma_cmd *cp;
668 int intr, fs, i, stat, x;
669 int xcount, dstat;
670 unsigned long flags;
671 /* static int mace_last_fs, mace_last_xcount; */
672
673 spin_lock_irqsave(&mp->lock, flags);
674 intr = in_8(&mb->ir); /* read interrupt register */
675 in_8(&mb->xmtrc); /* get retries */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700676 mace_handle_misc_intrs(mp, intr, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700677
678 i = mp->tx_empty;
679 while (in_8(&mb->pr) & XMTSV) {
680 del_timer(&mp->tx_timeout);
681 mp->timeout_active = 0;
682 /*
683 * Clear any interrupt indication associated with this status
684 * word. This appears to unlatch any error indication from
685 * the DMA controller.
686 */
687 intr = in_8(&mb->ir);
688 if (intr != 0)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700689 mace_handle_misc_intrs(mp, intr, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700690 if (mp->tx_bad_runt) {
691 fs = in_8(&mb->xmtfs);
692 mp->tx_bad_runt = 0;
693 out_8(&mb->xmtfc, AUTO_PAD_XMIT);
694 continue;
695 }
696 dstat = ld_le32(&td->status);
697 /* stop DMA controller */
698 out_le32(&td->control, RUN << 16);
699 /*
700 * xcount is the number of complete frames which have been
701 * written to the fifo but for which status has not been read.
702 */
703 xcount = (in_8(&mb->fifofc) >> XMTFC_SH) & XMTFC_MASK;
704 if (xcount == 0 || (dstat & DEAD)) {
705 /*
706 * If a packet was aborted before the DMA controller has
707 * finished transferring it, it seems that there are 2 bytes
708 * which are stuck in some buffer somewhere. These will get
709 * transmitted as soon as we read the frame status (which
710 * reenables the transmit data transfer request). Turning
711 * off the DMA controller and/or resetting the MACE doesn't
712 * help. So we disable auto-padding and FCS transmission
713 * so the two bytes will only be a runt packet which should
714 * be ignored by other stations.
715 */
716 out_8(&mb->xmtfc, DXMTFCS);
717 }
718 fs = in_8(&mb->xmtfs);
719 if ((fs & XMTSV) == 0) {
720 printk(KERN_ERR "mace: xmtfs not valid! (fs=%x xc=%d ds=%x)\n",
721 fs, xcount, dstat);
722 mace_reset(dev);
723 /*
724 * XXX mace likes to hang the machine after a xmtfs error.
725 * This is hard to reproduce, reseting *may* help
726 */
727 }
728 cp = mp->tx_cmds + NCMDS_TX * i;
729 stat = ld_le16(&cp->xfer_status);
730 if ((fs & (UFLO|LCOL|LCAR|RTRY)) || (dstat & DEAD) || xcount == 0) {
731 /*
732 * Check whether there were in fact 2 bytes written to
733 * the transmit FIFO.
734 */
735 udelay(1);
736 x = (in_8(&mb->fifofc) >> XMTFC_SH) & XMTFC_MASK;
737 if (x != 0) {
738 /* there were two bytes with an end-of-packet indication */
739 mp->tx_bad_runt = 1;
740 mace_set_timeout(dev);
741 } else {
742 /*
743 * Either there weren't the two bytes buffered up, or they
744 * didn't have an end-of-packet indication.
745 * We flush the transmit FIFO just in case (by setting the
746 * XMTFWU bit with the transmitter disabled).
747 */
748 out_8(&mb->maccc, in_8(&mb->maccc) & ~ENXMT);
749 out_8(&mb->fifocc, in_8(&mb->fifocc) | XMTFWU);
750 udelay(1);
751 out_8(&mb->maccc, in_8(&mb->maccc) | ENXMT);
752 out_8(&mb->xmtfc, AUTO_PAD_XMIT);
753 }
754 }
755 /* dma should have finished */
756 if (i == mp->tx_fill) {
757 printk(KERN_DEBUG "mace: tx ring ran out? (fs=%x xc=%d ds=%x)\n",
758 fs, xcount, dstat);
759 continue;
760 }
761 /* Update stats */
762 if (fs & (UFLO|LCOL|LCAR|RTRY)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700763 ++dev->stats.tx_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700764 if (fs & LCAR)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700765 ++dev->stats.tx_carrier_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700766 if (fs & (UFLO|LCOL|RTRY))
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700767 ++dev->stats.tx_aborted_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700768 } else {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700769 dev->stats.tx_bytes += mp->tx_bufs[i]->len;
770 ++dev->stats.tx_packets;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700771 }
772 dev_kfree_skb_irq(mp->tx_bufs[i]);
773 --mp->tx_active;
774 if (++i >= N_TX_RING)
775 i = 0;
776#if 0
777 mace_last_fs = fs;
778 mace_last_xcount = xcount;
779#endif
780 }
781
782 if (i != mp->tx_empty) {
783 mp->tx_fullup = 0;
784 netif_wake_queue(dev);
785 }
786 mp->tx_empty = i;
787 i += mp->tx_active;
788 if (i >= N_TX_RING)
789 i -= N_TX_RING;
790 if (!mp->tx_bad_runt && i != mp->tx_fill && mp->tx_active < MAX_TX_ACTIVE) {
791 do {
792 /* set up the next one */
793 cp = mp->tx_cmds + NCMDS_TX * i;
794 out_le16(&cp->xfer_status, 0);
795 out_le16(&cp->command, OUTPUT_LAST);
796 ++mp->tx_active;
797 if (++i >= N_TX_RING)
798 i = 0;
799 } while (i != mp->tx_fill && mp->tx_active < MAX_TX_ACTIVE);
800 out_le32(&td->control, ((RUN|WAKE) << 16) + (RUN|WAKE));
801 mace_set_timeout(dev);
802 }
803 spin_unlock_irqrestore(&mp->lock, flags);
804 return IRQ_HANDLED;
805}
806
807static void mace_tx_timeout(unsigned long data)
808{
809 struct net_device *dev = (struct net_device *) data;
Wang Chen454d7c92008-11-12 23:37:49 -0800810 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700811 volatile struct mace __iomem *mb = mp->mace;
812 volatile struct dbdma_regs __iomem *td = mp->tx_dma;
813 volatile struct dbdma_regs __iomem *rd = mp->rx_dma;
814 volatile struct dbdma_cmd *cp;
815 unsigned long flags;
816 int i;
817
818 spin_lock_irqsave(&mp->lock, flags);
819 mp->timeout_active = 0;
820 if (mp->tx_active == 0 && !mp->tx_bad_runt)
821 goto out;
822
823 /* update various counters */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700824 mace_handle_misc_intrs(mp, in_8(&mb->ir), dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700825
826 cp = mp->tx_cmds + NCMDS_TX * mp->tx_empty;
827
828 /* turn off both tx and rx and reset the chip */
829 out_8(&mb->maccc, 0);
830 printk(KERN_ERR "mace: transmit timeout - resetting\n");
831 dbdma_reset(td);
832 mace_reset(dev);
833
834 /* restart rx dma */
835 cp = bus_to_virt(ld_le32(&rd->cmdptr));
836 dbdma_reset(rd);
837 out_le16(&cp->xfer_status, 0);
838 out_le32(&rd->cmdptr, virt_to_bus(cp));
839 out_le32(&rd->control, (RUN << 16) | RUN);
840
841 /* fix up the transmit side */
842 i = mp->tx_empty;
843 mp->tx_active = 0;
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700844 ++dev->stats.tx_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700845 if (mp->tx_bad_runt) {
846 mp->tx_bad_runt = 0;
847 } else if (i != mp->tx_fill) {
848 dev_kfree_skb(mp->tx_bufs[i]);
849 if (++i >= N_TX_RING)
850 i = 0;
851 mp->tx_empty = i;
852 }
853 mp->tx_fullup = 0;
854 netif_wake_queue(dev);
855 if (i != mp->tx_fill) {
856 cp = mp->tx_cmds + NCMDS_TX * i;
857 out_le16(&cp->xfer_status, 0);
858 out_le16(&cp->command, OUTPUT_LAST);
859 out_le32(&td->cmdptr, virt_to_bus(cp));
860 out_le32(&td->control, (RUN << 16) | RUN);
861 ++mp->tx_active;
862 mace_set_timeout(dev);
863 }
864
865 /* turn it back on */
866 out_8(&mb->imr, RCVINT);
867 out_8(&mb->maccc, mp->maccc);
868
869out:
870 spin_unlock_irqrestore(&mp->lock, flags);
871}
872
David Howells7d12e782006-10-05 14:55:46 +0100873static irqreturn_t mace_txdma_intr(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700874{
875 return IRQ_HANDLED;
876}
877
David Howells7d12e782006-10-05 14:55:46 +0100878static irqreturn_t mace_rxdma_intr(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700879{
880 struct net_device *dev = (struct net_device *) dev_id;
Wang Chen454d7c92008-11-12 23:37:49 -0800881 struct mace_data *mp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700882 volatile struct dbdma_regs __iomem *rd = mp->rx_dma;
883 volatile struct dbdma_cmd *cp, *np;
884 int i, nb, stat, next;
885 struct sk_buff *skb;
886 unsigned frame_status;
887 static int mace_lost_status;
888 unsigned char *data;
889 unsigned long flags;
890
891 spin_lock_irqsave(&mp->lock, flags);
892 for (i = mp->rx_empty; i != mp->rx_fill; ) {
893 cp = mp->rx_cmds + i;
894 stat = ld_le16(&cp->xfer_status);
895 if ((stat & ACTIVE) == 0) {
896 next = i + 1;
897 if (next >= N_RX_RING)
898 next = 0;
899 np = mp->rx_cmds + next;
Joe Perches8e95a202009-12-03 07:58:21 +0000900 if (next != mp->rx_fill &&
901 (ld_le16(&np->xfer_status) & ACTIVE) != 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700902 printk(KERN_DEBUG "mace: lost a status word\n");
903 ++mace_lost_status;
904 } else
905 break;
906 }
907 nb = ld_le16(&cp->req_count) - ld_le16(&cp->res_count);
908 out_le16(&cp->command, DBDMA_STOP);
909 /* got a packet, have a look at it */
910 skb = mp->rx_bufs[i];
Al Viro79ea13c2008-01-24 02:06:46 -0800911 if (!skb) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700912 ++dev->stats.rx_dropped;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700913 } else if (nb > 8) {
914 data = skb->data;
915 frame_status = (data[nb-3] << 8) + data[nb-4];
916 if (frame_status & (RS_OFLO|RS_CLSN|RS_FRAMERR|RS_FCSERR)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700917 ++dev->stats.rx_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700918 if (frame_status & RS_OFLO)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700919 ++dev->stats.rx_over_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700920 if (frame_status & RS_FRAMERR)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700921 ++dev->stats.rx_frame_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700922 if (frame_status & RS_FCSERR)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700923 ++dev->stats.rx_crc_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700924 } else {
925 /* Mace feature AUTO_STRIP_RCV is on by default, dropping the
926 * FCS on frames with 802.3 headers. This means that Ethernet
927 * frames have 8 extra octets at the end, while 802.3 frames
928 * have only 4. We need to correctly account for this. */
929 if (*(unsigned short *)(data+12) < 1536) /* 802.3 header */
930 nb -= 4;
931 else /* Ethernet header; mace includes FCS */
932 nb -= 8;
933 skb_put(skb, nb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934 skb->protocol = eth_type_trans(skb, dev);
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700935 dev->stats.rx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700936 netif_rx(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700937 mp->rx_bufs[i] = NULL;
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700938 ++dev->stats.rx_packets;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700939 }
940 } else {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700941 ++dev->stats.rx_errors;
942 ++dev->stats.rx_length_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700943 }
944
945 /* advance to next */
946 if (++i >= N_RX_RING)
947 i = 0;
948 }
949 mp->rx_empty = i;
950
951 i = mp->rx_fill;
952 for (;;) {
953 next = i + 1;
954 if (next >= N_RX_RING)
955 next = 0;
956 if (next == mp->rx_empty)
957 break;
958 cp = mp->rx_cmds + i;
959 skb = mp->rx_bufs[i];
Al Viro79ea13c2008-01-24 02:06:46 -0800960 if (!skb) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700961 skb = dev_alloc_skb(RX_BUFLEN + 2);
Al Viro79ea13c2008-01-24 02:06:46 -0800962 if (skb) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700963 skb_reserve(skb, 2);
964 mp->rx_bufs[i] = skb;
965 }
966 }
967 st_le16(&cp->req_count, RX_BUFLEN);
968 data = skb? skb->data: dummy_buf;
969 st_le32(&cp->phy_addr, virt_to_bus(data));
970 out_le16(&cp->xfer_status, 0);
971 out_le16(&cp->command, INPUT_LAST + INTR_ALWAYS);
972#if 0
973 if ((ld_le32(&rd->status) & ACTIVE) != 0) {
974 out_le32(&rd->control, (PAUSE << 16) | PAUSE);
975 while ((in_le32(&rd->status) & ACTIVE) != 0)
976 ;
977 }
978#endif
979 i = next;
980 }
981 if (i != mp->rx_fill) {
982 out_le32(&rd->control, ((RUN|WAKE) << 16) | (RUN|WAKE));
983 mp->rx_fill = i;
984 }
985 spin_unlock_irqrestore(&mp->lock, flags);
986 return IRQ_HANDLED;
987}
988
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400989static struct of_device_id mace_match[] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700990{
991 {
992 .name = "mace",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700993 },
994 {},
995};
Olaf Hering8c9795b2005-10-28 17:46:21 -0700996MODULE_DEVICE_TABLE (of, mace_match);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700997
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400998static struct macio_driver mace_driver =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700999{
Benjamin Herrenschmidtc2cdf6a2010-06-02 17:09:18 +10001000 .driver = {
1001 .name = "mace",
1002 .owner = THIS_MODULE,
1003 .of_match_table = mace_match,
1004 },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001005 .probe = mace_probe,
1006 .remove = mace_remove,
1007};
1008
1009
1010static int __init mace_init(void)
1011{
1012 return macio_register_driver(&mace_driver);
1013}
1014
1015static void __exit mace_cleanup(void)
1016{
1017 macio_unregister_driver(&mace_driver);
1018
Jesper Juhlb4558ea2005-10-28 16:53:13 -04001019 kfree(dummy_buf);
1020 dummy_buf = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001021}
1022
1023MODULE_AUTHOR("Paul Mackerras");
1024MODULE_DESCRIPTION("PowerMac MACE driver.");
Rusty Russell8d3b33f2006-03-25 03:07:05 -08001025module_param(port_aaui, int, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001026MODULE_PARM_DESC(port_aaui, "MACE uses AAUI port (0-1)");
1027MODULE_LICENSE("GPL");
1028
1029module_init(mace_init);
1030module_exit(mace_cleanup);