Abhilash Kesavan | 6b6844d | 2011-10-04 20:30:22 +0900 | [diff] [blame] | 1 | /* linux/arch/arm/mach-s5p64x0/irq-pm.c |
| 2 | * |
| 3 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. |
| 4 | * http://www.samsung.com |
| 5 | * |
| 6 | * S5P64X0 - Interrupt handling Power Management |
| 7 | * |
| 8 | * Based on arch/arm/mach-s3c64xx/irq-pm.c by Ben Dooks |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/syscore_ops.h> |
| 16 | #include <linux/serial_core.h> |
| 17 | #include <linux/io.h> |
| 18 | |
| 19 | #include <plat/regs-serial.h> |
| 20 | #include <plat/pm.h> |
| 21 | |
| 22 | #include <mach/regs-gpio.h> |
| 23 | |
| 24 | static struct sleep_save irq_save[] = { |
| 25 | SAVE_ITEM(S5P64X0_EINT0CON0), |
| 26 | SAVE_ITEM(S5P64X0_EINT0FLTCON0), |
| 27 | SAVE_ITEM(S5P64X0_EINT0FLTCON1), |
| 28 | SAVE_ITEM(S5P64X0_EINT0MASK), |
| 29 | }; |
| 30 | |
| 31 | static struct irq_grp_save { |
| 32 | u32 con; |
| 33 | u32 fltcon; |
| 34 | u32 mask; |
| 35 | } eint_grp_save[4]; |
| 36 | |
| 37 | static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS]; |
| 38 | |
| 39 | static int s5p64x0_irq_pm_suspend(void) |
| 40 | { |
| 41 | struct irq_grp_save *grp = eint_grp_save; |
| 42 | int i; |
| 43 | |
| 44 | S3C_PMDBG("%s: suspending IRQs\n", __func__); |
| 45 | |
| 46 | s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save)); |
| 47 | |
| 48 | for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) |
| 49 | irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM); |
| 50 | |
| 51 | for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { |
| 52 | grp->con = __raw_readl(S5P64X0_EINT12CON + (i * 4)); |
| 53 | grp->mask = __raw_readl(S5P64X0_EINT12MASK + (i * 4)); |
| 54 | grp->fltcon = __raw_readl(S5P64X0_EINT12FLTCON + (i * 4)); |
| 55 | } |
| 56 | |
| 57 | return 0; |
| 58 | } |
| 59 | |
| 60 | static void s5p64x0_irq_pm_resume(void) |
| 61 | { |
| 62 | struct irq_grp_save *grp = eint_grp_save; |
| 63 | int i; |
| 64 | |
| 65 | S3C_PMDBG("%s: resuming IRQs\n", __func__); |
| 66 | |
| 67 | s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save)); |
| 68 | |
| 69 | for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++) |
| 70 | __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM); |
| 71 | |
| 72 | for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) { |
| 73 | __raw_writel(grp->con, S5P64X0_EINT12CON + (i * 4)); |
| 74 | __raw_writel(grp->mask, S5P64X0_EINT12MASK + (i * 4)); |
| 75 | __raw_writel(grp->fltcon, S5P64X0_EINT12FLTCON + (i * 4)); |
| 76 | } |
| 77 | |
| 78 | S3C_PMDBG("%s: IRQ configuration restored\n", __func__); |
| 79 | } |
| 80 | |
| 81 | static struct syscore_ops s5p64x0_irq_syscore_ops = { |
| 82 | .suspend = s5p64x0_irq_pm_suspend, |
| 83 | .resume = s5p64x0_irq_pm_resume, |
| 84 | }; |
| 85 | |
| 86 | static int __init s5p64x0_syscore_init(void) |
| 87 | { |
| 88 | register_syscore_ops(&s5p64x0_irq_syscore_ops); |
| 89 | |
| 90 | return 0; |
| 91 | } |
| 92 | core_initcall(s5p64x0_syscore_init); |