blob: 049555777f67da5549cca3d689977809bbef0153 [file] [log] [blame]
Russell Kingb652b432005-06-15 12:38:14 +01001/*
2 * i2c_adap_pxa.c
3 *
4 * I2C adapter for the PXA I2C bus access.
5 *
6 * Copyright (C) 2002 Intrinsyc Software Inc.
7 * Copyright (C) 2004-2005 Deep Blue Solutions Ltd.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * History:
14 * Apr 2002: Initial version [CS]
15 * Jun 2002: Properly seperated algo/adap [FB]
16 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
17 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
18 * Sep 2004: Major rework to ensure efficient bus handling [RMK]
19 * Dec 2004: Added support for PXA27x and slave device probing [Liam Girdwood]
20 * Feb 2005: Rework slave mode handling [RMK]
21 */
22#include <linux/kernel.h>
23#include <linux/module.h>
24#include <linux/i2c.h>
25#include <linux/i2c-id.h>
26#include <linux/init.h>
27#include <linux/time.h>
28#include <linux/sched.h>
29#include <linux/delay.h>
30#include <linux/errno.h>
31#include <linux/interrupt.h>
32#include <linux/i2c-pxa.h>
Russell Kingd052d1b2005-10-29 19:07:23 +010033#include <linux/platform_device.h>
Russell Kingc3cef3f2007-08-20 10:19:10 +010034#include <linux/err.h>
35#include <linux/clk.h>
Russell Kingb652b432005-06-15 12:38:14 +010036
Russell Kingb652b432005-06-15 12:38:14 +010037#include <asm/irq.h>
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +010038#include <asm/io.h>
Eric Miaof0a83702009-04-13 15:03:11 +080039#include <plat/i2c.h>
Eric Miao283afa02008-09-08 14:15:08 +080040
41/*
Eric Miaof23d4912009-04-13 14:43:25 +080042 * I2C register offsets will be shifted 0 or 1 bit left, depending on
43 * different SoCs
44 */
45#define REG_SHIFT_0 (0 << 0)
46#define REG_SHIFT_1 (1 << 0)
47#define REG_SHIFT(d) ((d) & 0x1)
48
49static const struct platform_device_id i2c_pxa_id_table[] = {
50 { "pxa2xx-i2c", REG_SHIFT_1 },
51 { "pxa3xx-pwri2c", REG_SHIFT_0 },
52 { },
53};
54MODULE_DEVICE_TABLE(platform, i2c_pxa_id_table);
55
56/*
Eric Miao283afa02008-09-08 14:15:08 +080057 * I2C registers and bit definitions
58 */
59#define IBMR (0x00)
60#define IDBR (0x08)
61#define ICR (0x10)
62#define ISR (0x18)
63#define ISAR (0x20)
64
65#define ICR_START (1 << 0) /* start bit */
66#define ICR_STOP (1 << 1) /* stop bit */
67#define ICR_ACKNAK (1 << 2) /* send ACK(0) or NAK(1) */
68#define ICR_TB (1 << 3) /* transfer byte bit */
69#define ICR_MA (1 << 4) /* master abort */
70#define ICR_SCLE (1 << 5) /* master clock enable */
71#define ICR_IUE (1 << 6) /* unit enable */
72#define ICR_GCD (1 << 7) /* general call disable */
73#define ICR_ITEIE (1 << 8) /* enable tx interrupts */
74#define ICR_IRFIE (1 << 9) /* enable rx interrupts */
75#define ICR_BEIE (1 << 10) /* enable bus error ints */
76#define ICR_SSDIE (1 << 11) /* slave STOP detected int enable */
77#define ICR_ALDIE (1 << 12) /* enable arbitration interrupt */
78#define ICR_SADIE (1 << 13) /* slave address detected int enable */
79#define ICR_UR (1 << 14) /* unit reset */
80#define ICR_FM (1 << 15) /* fast mode */
81
82#define ISR_RWM (1 << 0) /* read/write mode */
83#define ISR_ACKNAK (1 << 1) /* ack/nak status */
84#define ISR_UB (1 << 2) /* unit busy */
85#define ISR_IBB (1 << 3) /* bus busy */
86#define ISR_SSD (1 << 4) /* slave stop detected */
87#define ISR_ALD (1 << 5) /* arbitration loss detected */
88#define ISR_ITE (1 << 6) /* tx buffer empty */
89#define ISR_IRF (1 << 7) /* rx buffer full */
90#define ISR_GCAD (1 << 8) /* general call address detected */
91#define ISR_SAD (1 << 9) /* slave address detected */
92#define ISR_BED (1 << 10) /* bus error no ACK/NAK */
Russell Kingb652b432005-06-15 12:38:14 +010093
94struct pxa_i2c {
95 spinlock_t lock;
96 wait_queue_head_t wait;
97 struct i2c_msg *msg;
98 unsigned int msg_num;
99 unsigned int msg_idx;
100 unsigned int msg_ptr;
101 unsigned int slave_addr;
102
103 struct i2c_adapter adap;
Russell Kingc3cef3f2007-08-20 10:19:10 +0100104 struct clk *clk;
Russell Kingb652b432005-06-15 12:38:14 +0100105#ifdef CONFIG_I2C_PXA_SLAVE
106 struct i2c_slave_client *slave;
107#endif
108
109 unsigned int irqlogidx;
110 u32 isrlog[32];
111 u32 icrlog[32];
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100112
113 void __iomem *reg_base;
Mike Rapoport9ba63c42008-08-17 06:23:05 +0100114 unsigned int reg_shift;
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100115
116 unsigned long iobase;
117 unsigned long iosize;
118
119 int irq;
Jonathan Cameronc46c9482008-10-03 15:07:36 +0100120 unsigned int use_pio :1;
121 unsigned int fast_mode :1;
Russell Kingb652b432005-06-15 12:38:14 +0100122};
123
Mike Rapoport9ba63c42008-08-17 06:23:05 +0100124#define _IBMR(i2c) ((i2c)->reg_base + (0x0 << (i2c)->reg_shift))
125#define _IDBR(i2c) ((i2c)->reg_base + (0x4 << (i2c)->reg_shift))
126#define _ICR(i2c) ((i2c)->reg_base + (0x8 << (i2c)->reg_shift))
127#define _ISR(i2c) ((i2c)->reg_base + (0xc << (i2c)->reg_shift))
128#define _ISAR(i2c) ((i2c)->reg_base + (0x10 << (i2c)->reg_shift))
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100129
Russell Kingb652b432005-06-15 12:38:14 +0100130/*
131 * I2C Slave mode address
132 */
133#define I2C_PXA_SLAVE_ADDR 0x1
134
Russell Kingb652b432005-06-15 12:38:14 +0100135#ifdef DEBUG
136
137struct bits {
138 u32 mask;
139 const char *set;
140 const char *unset;
141};
Jiri Slabyed113992007-10-18 23:40:28 -0700142#define PXA_BIT(m, s, u) { .mask = m, .set = s, .unset = u }
Russell Kingb652b432005-06-15 12:38:14 +0100143
144static inline void
145decode_bits(const char *prefix, const struct bits *bits, int num, u32 val)
146{
147 printk("%s %08x: ", prefix, val);
148 while (num--) {
149 const char *str = val & bits->mask ? bits->set : bits->unset;
150 if (str)
151 printk("%s ", str);
152 bits++;
153 }
154}
155
156static const struct bits isr_bits[] = {
Jiri Slabyed113992007-10-18 23:40:28 -0700157 PXA_BIT(ISR_RWM, "RX", "TX"),
158 PXA_BIT(ISR_ACKNAK, "NAK", "ACK"),
159 PXA_BIT(ISR_UB, "Bsy", "Rdy"),
160 PXA_BIT(ISR_IBB, "BusBsy", "BusRdy"),
161 PXA_BIT(ISR_SSD, "SlaveStop", NULL),
162 PXA_BIT(ISR_ALD, "ALD", NULL),
163 PXA_BIT(ISR_ITE, "TxEmpty", NULL),
164 PXA_BIT(ISR_IRF, "RxFull", NULL),
165 PXA_BIT(ISR_GCAD, "GenCall", NULL),
166 PXA_BIT(ISR_SAD, "SlaveAddr", NULL),
167 PXA_BIT(ISR_BED, "BusErr", NULL),
Russell Kingb652b432005-06-15 12:38:14 +0100168};
169
170static void decode_ISR(unsigned int val)
171{
Russell King6fd60fa2005-09-08 21:04:58 +0100172 decode_bits(KERN_DEBUG "ISR", isr_bits, ARRAY_SIZE(isr_bits), val);
Russell Kingb652b432005-06-15 12:38:14 +0100173 printk("\n");
174}
175
176static const struct bits icr_bits[] = {
Jiri Slabyed113992007-10-18 23:40:28 -0700177 PXA_BIT(ICR_START, "START", NULL),
178 PXA_BIT(ICR_STOP, "STOP", NULL),
179 PXA_BIT(ICR_ACKNAK, "ACKNAK", NULL),
180 PXA_BIT(ICR_TB, "TB", NULL),
181 PXA_BIT(ICR_MA, "MA", NULL),
182 PXA_BIT(ICR_SCLE, "SCLE", "scle"),
183 PXA_BIT(ICR_IUE, "IUE", "iue"),
184 PXA_BIT(ICR_GCD, "GCD", NULL),
185 PXA_BIT(ICR_ITEIE, "ITEIE", NULL),
186 PXA_BIT(ICR_IRFIE, "IRFIE", NULL),
187 PXA_BIT(ICR_BEIE, "BEIE", NULL),
188 PXA_BIT(ICR_SSDIE, "SSDIE", NULL),
189 PXA_BIT(ICR_ALDIE, "ALDIE", NULL),
190 PXA_BIT(ICR_SADIE, "SADIE", NULL),
191 PXA_BIT(ICR_UR, "UR", "ur"),
Russell Kingb652b432005-06-15 12:38:14 +0100192};
193
Holger Schurigd6a7b5f2008-02-11 16:51:41 +0100194#ifdef CONFIG_I2C_PXA_SLAVE
Russell Kingb652b432005-06-15 12:38:14 +0100195static void decode_ICR(unsigned int val)
196{
Russell King6fd60fa2005-09-08 21:04:58 +0100197 decode_bits(KERN_DEBUG "ICR", icr_bits, ARRAY_SIZE(icr_bits), val);
Russell Kingb652b432005-06-15 12:38:14 +0100198 printk("\n");
199}
Holger Schurigd6a7b5f2008-02-11 16:51:41 +0100200#endif
Russell Kingb652b432005-06-15 12:38:14 +0100201
202static unsigned int i2c_debug = DEBUG;
203
204static void i2c_pxa_show_state(struct pxa_i2c *i2c, int lno, const char *fname)
205{
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100206 dev_dbg(&i2c->adap.dev, "state:%s:%d: ISR=%08x, ICR=%08x, IBMR=%02x\n", fname, lno,
207 readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
Russell Kingb652b432005-06-15 12:38:14 +0100208}
209
Harvey Harrison08882d22008-04-22 22:16:47 +0200210#define show_state(i2c) i2c_pxa_show_state(i2c, __LINE__, __func__)
Russell Kingb652b432005-06-15 12:38:14 +0100211#else
212#define i2c_debug 0
213
214#define show_state(i2c) do { } while (0)
215#define decode_ISR(val) do { } while (0)
216#define decode_ICR(val) do { } while (0)
217#endif
218
Russell King6fd60fa2005-09-08 21:04:58 +0100219#define eedbg(lvl, x...) do { if ((lvl) < 1) { printk(KERN_DEBUG "" x); } } while(0)
Russell Kingb652b432005-06-15 12:38:14 +0100220
221static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret);
Mike Rapoportb7a36702008-01-27 18:14:50 +0100222static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id);
Russell Kingb652b432005-06-15 12:38:14 +0100223
224static void i2c_pxa_scream_blue_murder(struct pxa_i2c *i2c, const char *why)
225{
226 unsigned int i;
Frank Seidel154d22b2009-03-28 21:34:42 +0100227 printk(KERN_ERR "i2c: error: %s\n", why);
228 printk(KERN_ERR "i2c: msg_num: %d msg_idx: %d msg_ptr: %d\n",
Russell Kingb652b432005-06-15 12:38:14 +0100229 i2c->msg_num, i2c->msg_idx, i2c->msg_ptr);
Frank Seidel154d22b2009-03-28 21:34:42 +0100230 printk(KERN_ERR "i2c: ICR: %08x ISR: %08x\n",
231 readl(_ICR(i2c)), readl(_ISR(i2c)));
232 printk(KERN_DEBUG "i2c: log: ");
Russell Kingb652b432005-06-15 12:38:14 +0100233 for (i = 0; i < i2c->irqlogidx; i++)
234 printk("[%08x:%08x] ", i2c->isrlog[i], i2c->icrlog[i]);
235 printk("\n");
236}
237
238static inline int i2c_pxa_is_slavemode(struct pxa_i2c *i2c)
239{
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100240 return !(readl(_ICR(i2c)) & ICR_SCLE);
Russell Kingb652b432005-06-15 12:38:14 +0100241}
242
243static void i2c_pxa_abort(struct pxa_i2c *i2c)
244{
Dmitry Baryshkov387fa6a2008-08-18 14:38:48 +0100245 int i = 250;
Russell Kingb652b432005-06-15 12:38:14 +0100246
247 if (i2c_pxa_is_slavemode(i2c)) {
Russell King6fd60fa2005-09-08 21:04:58 +0100248 dev_dbg(&i2c->adap.dev, "%s: called in slave mode\n", __func__);
Russell Kingb652b432005-06-15 12:38:14 +0100249 return;
250 }
251
Dmitry Baryshkov387fa6a2008-08-18 14:38:48 +0100252 while ((i > 0) && (readl(_IBMR(i2c)) & 0x1) == 0) {
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100253 unsigned long icr = readl(_ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100254
255 icr &= ~ICR_START;
256 icr |= ICR_ACKNAK | ICR_STOP | ICR_TB;
257
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100258 writel(icr, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100259
260 show_state(i2c);
261
Dmitry Baryshkov387fa6a2008-08-18 14:38:48 +0100262 mdelay(1);
263 i --;
Russell Kingb652b432005-06-15 12:38:14 +0100264 }
265
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100266 writel(readl(_ICR(i2c)) & ~(ICR_MA | ICR_START | ICR_STOP),
267 _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100268}
269
270static int i2c_pxa_wait_bus_not_busy(struct pxa_i2c *i2c)
271{
272 int timeout = DEF_TIMEOUT;
273
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100274 while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
275 if ((readl(_ISR(i2c)) & ISR_SAD) != 0)
Russell Kingb652b432005-06-15 12:38:14 +0100276 timeout += 4;
277
278 msleep(2);
279 show_state(i2c);
280 }
281
Roel Kluind10db3a2009-04-23 16:27:39 +0200282 if (timeout < 0)
Russell Kingb652b432005-06-15 12:38:14 +0100283 show_state(i2c);
284
Roel Kluind10db3a2009-04-23 16:27:39 +0200285 return timeout < 0 ? I2C_RETRY : 0;
Russell Kingb652b432005-06-15 12:38:14 +0100286}
287
288static int i2c_pxa_wait_master(struct pxa_i2c *i2c)
289{
290 unsigned long timeout = jiffies + HZ*4;
291
292 while (time_before(jiffies, timeout)) {
293 if (i2c_debug > 1)
Russell King6fd60fa2005-09-08 21:04:58 +0100294 dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100295 __func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
Russell Kingb652b432005-06-15 12:38:14 +0100296
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100297 if (readl(_ISR(i2c)) & ISR_SAD) {
Russell Kingb652b432005-06-15 12:38:14 +0100298 if (i2c_debug > 0)
Russell King6fd60fa2005-09-08 21:04:58 +0100299 dev_dbg(&i2c->adap.dev, "%s: Slave detected\n", __func__);
Russell Kingb652b432005-06-15 12:38:14 +0100300 goto out;
301 }
302
303 /* wait for unit and bus being not busy, and we also do a
304 * quick check of the i2c lines themselves to ensure they've
305 * gone high...
306 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100307 if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) == 0 && readl(_IBMR(i2c)) == 3) {
Russell Kingb652b432005-06-15 12:38:14 +0100308 if (i2c_debug > 0)
Russell King6fd60fa2005-09-08 21:04:58 +0100309 dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
Russell Kingb652b432005-06-15 12:38:14 +0100310 return 1;
311 }
312
313 msleep(1);
314 }
315
316 if (i2c_debug > 0)
Russell King6fd60fa2005-09-08 21:04:58 +0100317 dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
Russell Kingb652b432005-06-15 12:38:14 +0100318 out:
319 return 0;
320}
321
322static int i2c_pxa_set_master(struct pxa_i2c *i2c)
323{
324 if (i2c_debug)
Russell King6fd60fa2005-09-08 21:04:58 +0100325 dev_dbg(&i2c->adap.dev, "setting to bus master\n");
Russell Kingb652b432005-06-15 12:38:14 +0100326
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100327 if ((readl(_ISR(i2c)) & (ISR_UB | ISR_IBB)) != 0) {
Russell King6fd60fa2005-09-08 21:04:58 +0100328 dev_dbg(&i2c->adap.dev, "%s: unit is busy\n", __func__);
Russell Kingb652b432005-06-15 12:38:14 +0100329 if (!i2c_pxa_wait_master(i2c)) {
Russell King6fd60fa2005-09-08 21:04:58 +0100330 dev_dbg(&i2c->adap.dev, "%s: error: unit busy\n", __func__);
Russell Kingb652b432005-06-15 12:38:14 +0100331 return I2C_RETRY;
332 }
333 }
334
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100335 writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100336 return 0;
337}
338
339#ifdef CONFIG_I2C_PXA_SLAVE
340static int i2c_pxa_wait_slave(struct pxa_i2c *i2c)
341{
342 unsigned long timeout = jiffies + HZ*1;
343
344 /* wait for stop */
345
346 show_state(i2c);
347
348 while (time_before(jiffies, timeout)) {
349 if (i2c_debug > 1)
Russell King6fd60fa2005-09-08 21:04:58 +0100350 dev_dbg(&i2c->adap.dev, "%s: %ld: ISR=%08x, ICR=%08x, IBMR=%02x\n",
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100351 __func__, (long)jiffies, readl(_ISR(i2c)), readl(_ICR(i2c)), readl(_IBMR(i2c)));
Russell Kingb652b432005-06-15 12:38:14 +0100352
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100353 if ((readl(_ISR(i2c)) & (ISR_UB|ISR_IBB)) == 0 ||
354 (readl(_ISR(i2c)) & ISR_SAD) != 0 ||
355 (readl(_ICR(i2c)) & ICR_SCLE) == 0) {
Russell Kingb652b432005-06-15 12:38:14 +0100356 if (i2c_debug > 1)
Russell King6fd60fa2005-09-08 21:04:58 +0100357 dev_dbg(&i2c->adap.dev, "%s: done\n", __func__);
Russell Kingb652b432005-06-15 12:38:14 +0100358 return 1;
359 }
360
361 msleep(1);
362 }
363
364 if (i2c_debug > 0)
Russell King6fd60fa2005-09-08 21:04:58 +0100365 dev_dbg(&i2c->adap.dev, "%s: did not free\n", __func__);
Russell Kingb652b432005-06-15 12:38:14 +0100366 return 0;
367}
368
369/*
370 * clear the hold on the bus, and take of anything else
371 * that has been configured
372 */
373static void i2c_pxa_set_slave(struct pxa_i2c *i2c, int errcode)
374{
375 show_state(i2c);
376
377 if (errcode < 0) {
378 udelay(100); /* simple delay */
379 } else {
380 /* we need to wait for the stop condition to end */
381
382 /* if we where in stop, then clear... */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100383 if (readl(_ICR(i2c)) & ICR_STOP) {
Russell Kingb652b432005-06-15 12:38:14 +0100384 udelay(100);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100385 writel(readl(_ICR(i2c)) & ~ICR_STOP, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100386 }
387
388 if (!i2c_pxa_wait_slave(i2c)) {
Russell King6fd60fa2005-09-08 21:04:58 +0100389 dev_err(&i2c->adap.dev, "%s: wait timedout\n",
390 __func__);
Russell Kingb652b432005-06-15 12:38:14 +0100391 return;
392 }
393 }
394
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100395 writel(readl(_ICR(i2c)) & ~(ICR_STOP|ICR_ACKNAK|ICR_MA), _ICR(i2c));
396 writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100397
398 if (i2c_debug) {
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100399 dev_dbg(&i2c->adap.dev, "ICR now %08x, ISR %08x\n", readl(_ICR(i2c)), readl(_ISR(i2c)));
400 decode_ICR(readl(_ICR(i2c)));
Russell Kingb652b432005-06-15 12:38:14 +0100401 }
402}
403#else
404#define i2c_pxa_set_slave(i2c, err) do { } while (0)
405#endif
406
407static void i2c_pxa_reset(struct pxa_i2c *i2c)
408{
409 pr_debug("Resetting I2C Controller Unit\n");
410
411 /* abort any transfer currently under way */
412 i2c_pxa_abort(i2c);
413
414 /* reset according to 9.8 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100415 writel(ICR_UR, _ICR(i2c));
416 writel(I2C_ISR_INIT, _ISR(i2c));
417 writel(readl(_ICR(i2c)) & ~ICR_UR, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100418
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100419 writel(i2c->slave_addr, _ISAR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100420
421 /* set control register values */
Jonathan Cameronc46c9482008-10-03 15:07:36 +0100422 writel(I2C_ICR_INIT | (i2c->fast_mode ? ICR_FM : 0), _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100423
424#ifdef CONFIG_I2C_PXA_SLAVE
Russell King6fd60fa2005-09-08 21:04:58 +0100425 dev_info(&i2c->adap.dev, "Enabling slave mode\n");
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100426 writel(readl(_ICR(i2c)) | ICR_SADIE | ICR_ALDIE | ICR_SSDIE, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100427#endif
428
429 i2c_pxa_set_slave(i2c, 0);
430
431 /* enable unit */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100432 writel(readl(_ICR(i2c)) | ICR_IUE, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100433 udelay(100);
434}
435
436
437#ifdef CONFIG_I2C_PXA_SLAVE
438/*
Russell Kingb652b432005-06-15 12:38:14 +0100439 * PXA I2C Slave mode
440 */
441
442static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr)
443{
444 if (isr & ISR_BED) {
445 /* what should we do here? */
446 } else {
Russell King84b5abe2006-10-28 22:30:17 +0100447 int ret = 0;
448
449 if (i2c->slave != NULL)
450 ret = i2c->slave->read(i2c->slave->data);
Russell Kingb652b432005-06-15 12:38:14 +0100451
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100452 writel(ret, _IDBR(i2c));
453 writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c)); /* allow next byte */
Russell Kingb652b432005-06-15 12:38:14 +0100454 }
455}
456
457static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr)
458{
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100459 unsigned int byte = readl(_IDBR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100460
461 if (i2c->slave != NULL)
462 i2c->slave->write(i2c->slave->data, byte);
463
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100464 writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100465}
466
467static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
468{
469 int timeout;
470
471 if (i2c_debug > 0)
Russell King6fd60fa2005-09-08 21:04:58 +0100472 dev_dbg(&i2c->adap.dev, "SAD, mode is slave-%cx\n",
Russell Kingb652b432005-06-15 12:38:14 +0100473 (isr & ISR_RWM) ? 'r' : 't');
474
475 if (i2c->slave != NULL)
476 i2c->slave->event(i2c->slave->data,
477 (isr & ISR_RWM) ? I2C_SLAVE_EVENT_START_READ : I2C_SLAVE_EVENT_START_WRITE);
478
479 /*
480 * slave could interrupt in the middle of us generating a
481 * start condition... if this happens, we'd better back off
482 * and stop holding the poor thing up
483 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100484 writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
485 writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100486
487 timeout = 0x10000;
488
489 while (1) {
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100490 if ((readl(_IBMR(i2c)) & 2) == 2)
Russell Kingb652b432005-06-15 12:38:14 +0100491 break;
492
493 timeout--;
494
495 if (timeout <= 0) {
Russell King6fd60fa2005-09-08 21:04:58 +0100496 dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
Russell Kingb652b432005-06-15 12:38:14 +0100497 break;
498 }
499 }
500
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100501 writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100502}
503
504static void i2c_pxa_slave_stop(struct pxa_i2c *i2c)
505{
506 if (i2c_debug > 2)
Russell King6fd60fa2005-09-08 21:04:58 +0100507 dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop)\n");
Russell Kingb652b432005-06-15 12:38:14 +0100508
509 if (i2c->slave != NULL)
510 i2c->slave->event(i2c->slave->data, I2C_SLAVE_EVENT_STOP);
511
512 if (i2c_debug > 2)
Russell King6fd60fa2005-09-08 21:04:58 +0100513 dev_dbg(&i2c->adap.dev, "ISR: SSD (Slave Stop) acked\n");
Russell Kingb652b432005-06-15 12:38:14 +0100514
515 /*
516 * If we have a master-mode message waiting,
517 * kick it off now that the slave has completed.
518 */
519 if (i2c->msg)
520 i2c_pxa_master_complete(i2c, I2C_RETRY);
521}
522#else
523static void i2c_pxa_slave_txempty(struct pxa_i2c *i2c, u32 isr)
524{
525 if (isr & ISR_BED) {
526 /* what should we do here? */
527 } else {
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100528 writel(0, _IDBR(i2c));
529 writel(readl(_ICR(i2c)) | ICR_TB, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100530 }
531}
532
533static void i2c_pxa_slave_rxfull(struct pxa_i2c *i2c, u32 isr)
534{
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100535 writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100536}
537
538static void i2c_pxa_slave_start(struct pxa_i2c *i2c, u32 isr)
539{
540 int timeout;
541
542 /*
543 * slave could interrupt in the middle of us generating a
544 * start condition... if this happens, we'd better back off
545 * and stop holding the poor thing up
546 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100547 writel(readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP), _ICR(i2c));
548 writel(readl(_ICR(i2c)) | ICR_TB | ICR_ACKNAK, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100549
550 timeout = 0x10000;
551
552 while (1) {
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100553 if ((readl(_IBMR(i2c)) & 2) == 2)
Russell Kingb652b432005-06-15 12:38:14 +0100554 break;
555
556 timeout--;
557
558 if (timeout <= 0) {
Russell King6fd60fa2005-09-08 21:04:58 +0100559 dev_err(&i2c->adap.dev, "timeout waiting for SCL high\n");
Russell Kingb652b432005-06-15 12:38:14 +0100560 break;
561 }
562 }
563
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100564 writel(readl(_ICR(i2c)) & ~ICR_SCLE, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100565}
566
567static void i2c_pxa_slave_stop(struct pxa_i2c *i2c)
568{
569 if (i2c->msg)
570 i2c_pxa_master_complete(i2c, I2C_RETRY);
571}
572#endif
573
574/*
575 * PXA I2C Master mode
576 */
577
578static inline unsigned int i2c_pxa_addr_byte(struct i2c_msg *msg)
579{
580 unsigned int addr = (msg->addr & 0x7f) << 1;
581
582 if (msg->flags & I2C_M_RD)
583 addr |= 1;
584
585 return addr;
586}
587
588static inline void i2c_pxa_start_message(struct pxa_i2c *i2c)
589{
590 u32 icr;
591
592 /*
593 * Step 1: target slave address into IDBR
594 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100595 writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100596
597 /*
598 * Step 2: initiate the write.
599 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100600 icr = readl(_ICR(i2c)) & ~(ICR_STOP | ICR_ALDIE);
601 writel(icr | ICR_START | ICR_TB, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100602}
603
Jean Delvare7d054812007-05-01 23:26:33 +0200604static inline void i2c_pxa_stop_message(struct pxa_i2c *i2c)
605{
606 u32 icr;
607
608 /*
609 * Clear the STOP and ACK flags
610 */
611 icr = readl(_ICR(i2c));
612 icr &= ~(ICR_STOP | ICR_ACKNAK);
Russell King0cfe61e2007-05-10 03:15:32 -0700613 writel(icr, _ICR(i2c));
Jean Delvare7d054812007-05-01 23:26:33 +0200614}
615
Mike Rapoportb7a36702008-01-27 18:14:50 +0100616static int i2c_pxa_pio_set_master(struct pxa_i2c *i2c)
617{
618 /* make timeout the same as for interrupt based functions */
619 long timeout = 2 * DEF_TIMEOUT;
620
621 /*
622 * Wait for the bus to become free.
623 */
624 while (timeout-- && readl(_ISR(i2c)) & (ISR_IBB | ISR_UB)) {
625 udelay(1000);
626 show_state(i2c);
627 }
628
Roel Kluind10db3a2009-04-23 16:27:39 +0200629 if (timeout < 0) {
Mike Rapoportb7a36702008-01-27 18:14:50 +0100630 show_state(i2c);
631 dev_err(&i2c->adap.dev,
632 "i2c_pxa: timeout waiting for bus free\n");
633 return I2C_RETRY;
634 }
635
636 /*
637 * Set master mode.
638 */
639 writel(readl(_ICR(i2c)) | ICR_SCLE, _ICR(i2c));
640
641 return 0;
642}
643
644static int i2c_pxa_do_pio_xfer(struct pxa_i2c *i2c,
645 struct i2c_msg *msg, int num)
646{
647 unsigned long timeout = 500000; /* 5 seconds */
648 int ret = 0;
649
650 ret = i2c_pxa_pio_set_master(i2c);
651 if (ret)
652 goto out;
653
654 i2c->msg = msg;
655 i2c->msg_num = num;
656 i2c->msg_idx = 0;
657 i2c->msg_ptr = 0;
658 i2c->irqlogidx = 0;
659
660 i2c_pxa_start_message(i2c);
661
Roel Kluina746b572009-02-24 19:19:48 +0100662 while (i2c->msg_num > 0 && --timeout) {
Mike Rapoportb7a36702008-01-27 18:14:50 +0100663 i2c_pxa_handler(0, i2c);
664 udelay(10);
665 }
666
667 i2c_pxa_stop_message(i2c);
668
669 /*
670 * We place the return code in i2c->msg_idx.
671 */
672 ret = i2c->msg_idx;
673
674out:
675 if (timeout == 0)
676 i2c_pxa_scream_blue_murder(i2c, "timeout");
677
678 return ret;
679}
680
Russell Kingb652b432005-06-15 12:38:14 +0100681/*
Jean Delvare3fb9a652006-01-18 23:17:01 +0100682 * We are protected by the adapter bus mutex.
Russell Kingb652b432005-06-15 12:38:14 +0100683 */
684static int i2c_pxa_do_xfer(struct pxa_i2c *i2c, struct i2c_msg *msg, int num)
685{
686 long timeout;
687 int ret;
688
689 /*
690 * Wait for the bus to become free.
691 */
692 ret = i2c_pxa_wait_bus_not_busy(i2c);
693 if (ret) {
Russell King6fd60fa2005-09-08 21:04:58 +0100694 dev_err(&i2c->adap.dev, "i2c_pxa: timeout waiting for bus free\n");
Russell Kingb652b432005-06-15 12:38:14 +0100695 goto out;
696 }
697
698 /*
699 * Set master mode.
700 */
701 ret = i2c_pxa_set_master(i2c);
702 if (ret) {
Russell King6fd60fa2005-09-08 21:04:58 +0100703 dev_err(&i2c->adap.dev, "i2c_pxa_set_master: error %d\n", ret);
Russell Kingb652b432005-06-15 12:38:14 +0100704 goto out;
705 }
706
707 spin_lock_irq(&i2c->lock);
708
709 i2c->msg = msg;
710 i2c->msg_num = num;
711 i2c->msg_idx = 0;
712 i2c->msg_ptr = 0;
713 i2c->irqlogidx = 0;
714
715 i2c_pxa_start_message(i2c);
716
717 spin_unlock_irq(&i2c->lock);
718
719 /*
720 * The rest of the processing occurs in the interrupt handler.
721 */
722 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5);
Jean Delvare7d054812007-05-01 23:26:33 +0200723 i2c_pxa_stop_message(i2c);
Russell Kingb652b432005-06-15 12:38:14 +0100724
725 /*
726 * We place the return code in i2c->msg_idx.
727 */
728 ret = i2c->msg_idx;
729
730 if (timeout == 0)
731 i2c_pxa_scream_blue_murder(i2c, "timeout");
732
733 out:
734 return ret;
735}
736
Mike Rapoportb7a36702008-01-27 18:14:50 +0100737static int i2c_pxa_pio_xfer(struct i2c_adapter *adap,
738 struct i2c_msg msgs[], int num)
739{
740 struct pxa_i2c *i2c = adap->algo_data;
741 int ret, i;
742
743 /* If the I2C controller is disabled we need to reset it
744 (probably due to a suspend/resume destroying state). We do
745 this here as we can then avoid worrying about resuming the
746 controller before its users. */
747 if (!(readl(_ICR(i2c)) & ICR_IUE))
748 i2c_pxa_reset(i2c);
749
750 for (i = adap->retries; i >= 0; i--) {
751 ret = i2c_pxa_do_pio_xfer(i2c, msgs, num);
752 if (ret != I2C_RETRY)
753 goto out;
754
755 if (i2c_debug)
756 dev_dbg(&adap->dev, "Retrying transmission\n");
757 udelay(100);
758 }
759 i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
760 ret = -EREMOTEIO;
761 out:
762 i2c_pxa_set_slave(i2c, ret);
763 return ret;
764}
765
Russell Kingb652b432005-06-15 12:38:14 +0100766/*
767 * i2c_pxa_master_complete - complete the message and wake up.
768 */
769static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret)
770{
771 i2c->msg_ptr = 0;
772 i2c->msg = NULL;
773 i2c->msg_idx ++;
774 i2c->msg_num = 0;
775 if (ret)
776 i2c->msg_idx = ret;
Mike Rapoportb7a36702008-01-27 18:14:50 +0100777 if (!i2c->use_pio)
778 wake_up(&i2c->wait);
Russell Kingb652b432005-06-15 12:38:14 +0100779}
780
781static void i2c_pxa_irq_txempty(struct pxa_i2c *i2c, u32 isr)
782{
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100783 u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);
Russell Kingb652b432005-06-15 12:38:14 +0100784
785 again:
786 /*
787 * If ISR_ALD is set, we lost arbitration.
788 */
789 if (isr & ISR_ALD) {
790 /*
791 * Do we need to do anything here? The PXA docs
792 * are vague about what happens.
793 */
794 i2c_pxa_scream_blue_murder(i2c, "ALD set");
795
796 /*
797 * We ignore this error. We seem to see spurious ALDs
798 * for seemingly no reason. If we handle them as I think
799 * they should, we end up causing an I2C error, which
800 * is painful for some systems.
801 */
802 return; /* ignore */
803 }
804
805 if (isr & ISR_BED) {
806 int ret = BUS_ERROR;
807
808 /*
809 * I2C bus error - either the device NAK'd us, or
810 * something more serious happened. If we were NAK'd
811 * on the initial address phase, we can retry.
812 */
813 if (isr & ISR_ACKNAK) {
814 if (i2c->msg_ptr == 0 && i2c->msg_idx == 0)
815 ret = I2C_RETRY;
816 else
817 ret = XFER_NAKED;
818 }
819 i2c_pxa_master_complete(i2c, ret);
820 } else if (isr & ISR_RWM) {
821 /*
822 * Read mode. We have just sent the address byte, and
823 * now we must initiate the transfer.
824 */
825 if (i2c->msg_ptr == i2c->msg->len - 1 &&
826 i2c->msg_idx == i2c->msg_num - 1)
827 icr |= ICR_STOP | ICR_ACKNAK;
828
829 icr |= ICR_ALDIE | ICR_TB;
830 } else if (i2c->msg_ptr < i2c->msg->len) {
831 /*
832 * Write mode. Write the next data byte.
833 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100834 writel(i2c->msg->buf[i2c->msg_ptr++], _IDBR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100835
836 icr |= ICR_ALDIE | ICR_TB;
837
838 /*
839 * If this is the last byte of the last message, send
840 * a STOP.
841 */
842 if (i2c->msg_ptr == i2c->msg->len &&
843 i2c->msg_idx == i2c->msg_num - 1)
844 icr |= ICR_STOP;
845 } else if (i2c->msg_idx < i2c->msg_num - 1) {
846 /*
847 * Next segment of the message.
848 */
849 i2c->msg_ptr = 0;
850 i2c->msg_idx ++;
851 i2c->msg++;
852
853 /*
854 * If we aren't doing a repeated start and address,
855 * go back and try to send the next byte. Note that
856 * we do not support switching the R/W direction here.
857 */
858 if (i2c->msg->flags & I2C_M_NOSTART)
859 goto again;
860
861 /*
862 * Write the next address.
863 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100864 writel(i2c_pxa_addr_byte(i2c->msg), _IDBR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100865
866 /*
867 * And trigger a repeated start, and send the byte.
868 */
869 icr &= ~ICR_ALDIE;
870 icr |= ICR_START | ICR_TB;
871 } else {
872 if (i2c->msg->len == 0) {
873 /*
874 * Device probes have a message length of zero
875 * and need the bus to be reset before it can
876 * be used again.
877 */
878 i2c_pxa_reset(i2c);
879 }
880 i2c_pxa_master_complete(i2c, 0);
881 }
882
883 i2c->icrlog[i2c->irqlogidx-1] = icr;
884
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100885 writel(icr, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100886 show_state(i2c);
887}
888
889static void i2c_pxa_irq_rxfull(struct pxa_i2c *i2c, u32 isr)
890{
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100891 u32 icr = readl(_ICR(i2c)) & ~(ICR_START|ICR_STOP|ICR_ACKNAK|ICR_TB);
Russell Kingb652b432005-06-15 12:38:14 +0100892
893 /*
894 * Read the byte.
895 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100896 i2c->msg->buf[i2c->msg_ptr++] = readl(_IDBR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100897
898 if (i2c->msg_ptr < i2c->msg->len) {
899 /*
900 * If this is the last byte of the last
901 * message, send a STOP.
902 */
903 if (i2c->msg_ptr == i2c->msg->len - 1)
904 icr |= ICR_STOP | ICR_ACKNAK;
905
906 icr |= ICR_ALDIE | ICR_TB;
907 } else {
908 i2c_pxa_master_complete(i2c, 0);
909 }
910
911 i2c->icrlog[i2c->irqlogidx-1] = icr;
912
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100913 writel(icr, _ICR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100914}
915
David Howells7d12e782006-10-05 14:55:46 +0100916static irqreturn_t i2c_pxa_handler(int this_irq, void *dev_id)
Russell Kingb652b432005-06-15 12:38:14 +0100917{
918 struct pxa_i2c *i2c = dev_id;
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100919 u32 isr = readl(_ISR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100920
921 if (i2c_debug > 2 && 0) {
Russell King6fd60fa2005-09-08 21:04:58 +0100922 dev_dbg(&i2c->adap.dev, "%s: ISR=%08x, ICR=%08x, IBMR=%02x\n",
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100923 __func__, isr, readl(_ICR(i2c)), readl(_IBMR(i2c)));
Russell Kingb652b432005-06-15 12:38:14 +0100924 decode_ISR(isr);
925 }
926
Tobias Klauser7e3d7db2006-01-09 23:19:51 +0100927 if (i2c->irqlogidx < ARRAY_SIZE(i2c->isrlog))
Russell Kingb652b432005-06-15 12:38:14 +0100928 i2c->isrlog[i2c->irqlogidx++] = isr;
929
930 show_state(i2c);
931
932 /*
933 * Always clear all pending IRQs.
934 */
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100935 writel(isr & (ISR_SSD|ISR_ALD|ISR_ITE|ISR_IRF|ISR_SAD|ISR_BED), _ISR(i2c));
Russell Kingb652b432005-06-15 12:38:14 +0100936
937 if (isr & ISR_SAD)
938 i2c_pxa_slave_start(i2c, isr);
939 if (isr & ISR_SSD)
940 i2c_pxa_slave_stop(i2c);
941
942 if (i2c_pxa_is_slavemode(i2c)) {
943 if (isr & ISR_ITE)
944 i2c_pxa_slave_txempty(i2c, isr);
945 if (isr & ISR_IRF)
946 i2c_pxa_slave_rxfull(i2c, isr);
947 } else if (i2c->msg) {
948 if (isr & ISR_ITE)
949 i2c_pxa_irq_txempty(i2c, isr);
950 if (isr & ISR_IRF)
951 i2c_pxa_irq_rxfull(i2c, isr);
952 } else {
953 i2c_pxa_scream_blue_murder(i2c, "spurious irq");
954 }
955
956 return IRQ_HANDLED;
957}
958
959
960static int i2c_pxa_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
961{
962 struct pxa_i2c *i2c = adap->algo_data;
963 int ret, i;
964
965 for (i = adap->retries; i >= 0; i--) {
966 ret = i2c_pxa_do_xfer(i2c, msgs, num);
967 if (ret != I2C_RETRY)
968 goto out;
969
970 if (i2c_debug)
Russell King6fd60fa2005-09-08 21:04:58 +0100971 dev_dbg(&adap->dev, "Retrying transmission\n");
Russell Kingb652b432005-06-15 12:38:14 +0100972 udelay(100);
973 }
974 i2c_pxa_scream_blue_murder(i2c, "exhausted retries");
975 ret = -EREMOTEIO;
976 out:
977 i2c_pxa_set_slave(i2c, ret);
978 return ret;
979}
980
Russell Kingda16e322005-09-14 22:54:45 +0100981static u32 i2c_pxa_functionality(struct i2c_adapter *adap)
982{
983 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
984}
985
Jean Delvare8f9082c2006-09-03 22:39:46 +0200986static const struct i2c_algorithm i2c_pxa_algorithm = {
Russell Kingb652b432005-06-15 12:38:14 +0100987 .master_xfer = i2c_pxa_xfer,
Russell Kingda16e322005-09-14 22:54:45 +0100988 .functionality = i2c_pxa_functionality,
Russell Kingb652b432005-06-15 12:38:14 +0100989};
990
Mike Rapoportb7a36702008-01-27 18:14:50 +0100991static const struct i2c_algorithm i2c_pxa_pio_algorithm = {
992 .master_xfer = i2c_pxa_pio_xfer,
993 .functionality = i2c_pxa_functionality,
994};
995
Russell King3ae5eae2005-11-09 22:32:44 +0000996static int i2c_pxa_probe(struct platform_device *dev)
Russell Kingb652b432005-06-15 12:38:14 +0100997{
Enrico Scholz6776f3d2007-05-21 12:29:40 +0100998 struct pxa_i2c *i2c;
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +0100999 struct resource *res;
Russell King3ae5eae2005-11-09 22:32:44 +00001000 struct i2c_pxa_platform_data *plat = dev->dev.platform_data;
Eric Miaof23d4912009-04-13 14:43:25 +08001001 struct platform_device_id *id = platform_get_device_id(dev);
Russell Kingb652b432005-06-15 12:38:14 +01001002 int ret;
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001003 int irq;
Russell Kingb652b432005-06-15 12:38:14 +01001004
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001005 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1006 irq = platform_get_irq(dev, 0);
1007 if (res == NULL || irq < 0)
1008 return -ENODEV;
1009
Linus Walleijc6ffdde2009-06-14 00:20:36 +02001010 if (!request_mem_region(res->start, resource_size(res), res->name))
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001011 return -ENOMEM;
1012
Enrico Scholz6776f3d2007-05-21 12:29:40 +01001013 i2c = kzalloc(sizeof(struct pxa_i2c), GFP_KERNEL);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001014 if (!i2c) {
1015 ret = -ENOMEM;
1016 goto emalloc;
1017 }
1018
Enrico Scholz6776f3d2007-05-21 12:29:40 +01001019 i2c->adap.owner = THIS_MODULE;
Enrico Scholz6776f3d2007-05-21 12:29:40 +01001020 i2c->adap.retries = 5;
1021
1022 spin_lock_init(&i2c->lock);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001023 init_waitqueue_head(&i2c->wait);
Enrico Scholz6776f3d2007-05-21 12:29:40 +01001024
Wolfram Sanga92b36e2008-02-24 20:03:42 +01001025 /*
1026 * If "dev->id" is negative we consider it as zero.
1027 * The reason to do so is to avoid sysfs names that only make
1028 * sense when there are multiple adapters.
1029 */
1030 i2c->adap.nr = dev->id != -1 ? dev->id : 0;
1031 snprintf(i2c->adap.name, sizeof(i2c->adap.name), "pxa_i2c-i2c.%u",
1032 i2c->adap.nr);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001033
Russell Kinge0d8b132008-11-11 17:52:32 +00001034 i2c->clk = clk_get(&dev->dev, NULL);
Russell Kingc3cef3f2007-08-20 10:19:10 +01001035 if (IS_ERR(i2c->clk)) {
1036 ret = PTR_ERR(i2c->clk);
1037 goto eclk;
1038 }
1039
Linus Walleijc6ffdde2009-06-14 00:20:36 +02001040 i2c->reg_base = ioremap(res->start, resource_size(res));
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001041 if (!i2c->reg_base) {
1042 ret = -EIO;
1043 goto eremap;
1044 }
Eric Miaof23d4912009-04-13 14:43:25 +08001045 i2c->reg_shift = REG_SHIFT(id->driver_data);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001046
1047 i2c->iobase = res->start;
Linus Walleijc6ffdde2009-06-14 00:20:36 +02001048 i2c->iosize = resource_size(res);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001049
1050 i2c->irq = irq;
Russell Kingb652b432005-06-15 12:38:14 +01001051
1052 i2c->slave_addr = I2C_PXA_SLAVE_ADDR;
1053
1054#ifdef CONFIG_I2C_PXA_SLAVE
Russell Kingb652b432005-06-15 12:38:14 +01001055 if (plat) {
1056 i2c->slave_addr = plat->slave_addr;
Russell Kingbeea4942006-11-07 21:03:20 +00001057 i2c->slave = plat->slave;
Russell Kingb652b432005-06-15 12:38:14 +01001058 }
1059#endif
1060
Russell Kingc3cef3f2007-08-20 10:19:10 +01001061 clk_enable(i2c->clk);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001062
Mike Rapoportb7a36702008-01-27 18:14:50 +01001063 if (plat) {
1064 i2c->adap.class = plat->class;
1065 i2c->use_pio = plat->use_pio;
Jonathan Cameronc46c9482008-10-03 15:07:36 +01001066 i2c->fast_mode = plat->fast_mode;
Mike Rapoportb7a36702008-01-27 18:14:50 +01001067 }
1068
1069 if (i2c->use_pio) {
1070 i2c->adap.algo = &i2c_pxa_pio_algorithm;
1071 } else {
1072 i2c->adap.algo = &i2c_pxa_algorithm;
1073 ret = request_irq(irq, i2c_pxa_handler, IRQF_DISABLED,
1074 i2c->adap.name, i2c);
1075 if (ret)
1076 goto ereqirq;
1077 }
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001078
Russell Kingb652b432005-06-15 12:38:14 +01001079 i2c_pxa_reset(i2c);
1080
1081 i2c->adap.algo_data = i2c;
Russell King3ae5eae2005-11-09 22:32:44 +00001082 i2c->adap.dev.parent = &dev->dev;
Russell Kingb652b432005-06-15 12:38:14 +01001083
Rodolfo Giometti066af982007-07-12 14:12:30 +02001084 ret = i2c_add_numbered_adapter(&i2c->adap);
Russell Kingb652b432005-06-15 12:38:14 +01001085 if (ret < 0) {
1086 printk(KERN_INFO "I2C: Failed to add bus\n");
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001087 goto eadapt;
Russell Kingb652b432005-06-15 12:38:14 +01001088 }
1089
Russell King3ae5eae2005-11-09 22:32:44 +00001090 platform_set_drvdata(dev, i2c);
Russell Kingb652b432005-06-15 12:38:14 +01001091
1092#ifdef CONFIG_I2C_PXA_SLAVE
1093 printk(KERN_INFO "I2C: %s: PXA I2C adapter, slave address %d\n",
Jean Delvare22e965c2009-01-07 14:29:16 +01001094 dev_name(&i2c->adap.dev), i2c->slave_addr);
Russell Kingb652b432005-06-15 12:38:14 +01001095#else
1096 printk(KERN_INFO "I2C: %s: PXA I2C adapter\n",
Jean Delvare22e965c2009-01-07 14:29:16 +01001097 dev_name(&i2c->adap.dev));
Russell Kingb652b432005-06-15 12:38:14 +01001098#endif
1099 return 0;
1100
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001101eadapt:
Mike Rapoportb7a36702008-01-27 18:14:50 +01001102 if (!i2c->use_pio)
1103 free_irq(irq, i2c);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001104ereqirq:
Russell Kingc3cef3f2007-08-20 10:19:10 +01001105 clk_disable(i2c->clk);
Wolfram Sanga92b36e2008-02-24 20:03:42 +01001106 iounmap(i2c->reg_base);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001107eremap:
Russell Kingc3cef3f2007-08-20 10:19:10 +01001108 clk_put(i2c->clk);
1109eclk:
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001110 kfree(i2c);
1111emalloc:
Linus Walleijc6ffdde2009-06-14 00:20:36 +02001112 release_mem_region(res->start, resource_size(res));
Russell Kingb652b432005-06-15 12:38:14 +01001113 return ret;
1114}
1115
Wolfram Sanga92b36e2008-02-24 20:03:42 +01001116static int __exit i2c_pxa_remove(struct platform_device *dev)
Russell Kingb652b432005-06-15 12:38:14 +01001117{
Russell King3ae5eae2005-11-09 22:32:44 +00001118 struct pxa_i2c *i2c = platform_get_drvdata(dev);
Russell Kingb652b432005-06-15 12:38:14 +01001119
Russell King3ae5eae2005-11-09 22:32:44 +00001120 platform_set_drvdata(dev, NULL);
Russell Kingb652b432005-06-15 12:38:14 +01001121
1122 i2c_del_adapter(&i2c->adap);
Mike Rapoportb7a36702008-01-27 18:14:50 +01001123 if (!i2c->use_pio)
1124 free_irq(i2c->irq, i2c);
Russell Kingc3cef3f2007-08-20 10:19:10 +01001125
1126 clk_disable(i2c->clk);
1127 clk_put(i2c->clk);
Russell Kingc3cef3f2007-08-20 10:19:10 +01001128
Wolfram Sanga92b36e2008-02-24 20:03:42 +01001129 iounmap(i2c->reg_base);
Guennadi Liakhovetskia7b4e552007-02-08 09:43:26 +01001130 release_mem_region(i2c->iobase, i2c->iosize);
1131 kfree(i2c);
Russell Kingb652b432005-06-15 12:38:14 +01001132
1133 return 0;
1134}
1135
Russell Kinge7d48fa2008-08-26 10:40:50 +01001136#ifdef CONFIG_PM
Magnus Damm57f4d4f2009-07-08 13:22:39 +02001137static int i2c_pxa_suspend_noirq(struct device *dev)
Russell Kinge7d48fa2008-08-26 10:40:50 +01001138{
Magnus Damm57f4d4f2009-07-08 13:22:39 +02001139 struct platform_device *pdev = to_platform_device(dev);
1140 struct pxa_i2c *i2c = platform_get_drvdata(pdev);
1141
Russell Kinge7d48fa2008-08-26 10:40:50 +01001142 clk_disable(i2c->clk);
Magnus Damm57f4d4f2009-07-08 13:22:39 +02001143
Russell Kinge7d48fa2008-08-26 10:40:50 +01001144 return 0;
1145}
1146
Magnus Damm57f4d4f2009-07-08 13:22:39 +02001147static int i2c_pxa_resume_noirq(struct device *dev)
Russell Kinge7d48fa2008-08-26 10:40:50 +01001148{
Magnus Damm57f4d4f2009-07-08 13:22:39 +02001149 struct platform_device *pdev = to_platform_device(dev);
1150 struct pxa_i2c *i2c = platform_get_drvdata(pdev);
Russell Kinge7d48fa2008-08-26 10:40:50 +01001151
1152 clk_enable(i2c->clk);
1153 i2c_pxa_reset(i2c);
1154
1155 return 0;
1156}
Magnus Damm57f4d4f2009-07-08 13:22:39 +02001157
1158static struct dev_pm_ops i2c_pxa_dev_pm_ops = {
1159 .suspend_noirq = i2c_pxa_suspend_noirq,
1160 .resume_noirq = i2c_pxa_resume_noirq,
1161};
1162
1163#define I2C_PXA_DEV_PM_OPS (&i2c_pxa_dev_pm_ops)
Russell Kinge7d48fa2008-08-26 10:40:50 +01001164#else
Magnus Damm57f4d4f2009-07-08 13:22:39 +02001165#define I2C_PXA_DEV_PM_OPS NULL
Russell Kinge7d48fa2008-08-26 10:40:50 +01001166#endif
1167
Russell King3ae5eae2005-11-09 22:32:44 +00001168static struct platform_driver i2c_pxa_driver = {
Russell Kingb652b432005-06-15 12:38:14 +01001169 .probe = i2c_pxa_probe,
Wolfram Sanga92b36e2008-02-24 20:03:42 +01001170 .remove = __exit_p(i2c_pxa_remove),
Russell King3ae5eae2005-11-09 22:32:44 +00001171 .driver = {
1172 .name = "pxa2xx-i2c",
Wolfram Sanga92b36e2008-02-24 20:03:42 +01001173 .owner = THIS_MODULE,
Magnus Damm57f4d4f2009-07-08 13:22:39 +02001174 .pm = I2C_PXA_DEV_PM_OPS,
Russell King3ae5eae2005-11-09 22:32:44 +00001175 },
Eric Miaof23d4912009-04-13 14:43:25 +08001176 .id_table = i2c_pxa_id_table,
Russell Kingb652b432005-06-15 12:38:14 +01001177};
1178
1179static int __init i2c_adap_pxa_init(void)
1180{
Russell King3ae5eae2005-11-09 22:32:44 +00001181 return platform_driver_register(&i2c_pxa_driver);
Russell Kingb652b432005-06-15 12:38:14 +01001182}
1183
Wolfram Sanga92b36e2008-02-24 20:03:42 +01001184static void __exit i2c_adap_pxa_exit(void)
Russell Kingb652b432005-06-15 12:38:14 +01001185{
Holger Schurigd6a7b5f2008-02-11 16:51:41 +01001186 platform_driver_unregister(&i2c_pxa_driver);
Russell Kingb652b432005-06-15 12:38:14 +01001187}
1188
Richard Purdieece5f7b2006-01-12 16:30:23 +00001189MODULE_LICENSE("GPL");
Kay Sieversadd8eda2008-04-22 22:16:49 +02001190MODULE_ALIAS("platform:pxa2xx-i2c");
Richard Purdieece5f7b2006-01-12 16:30:23 +00001191
Uli Luckas47a9b132008-07-14 22:38:30 +02001192subsys_initcall(i2c_adap_pxa_init);
Russell Kingb652b432005-06-15 12:38:14 +01001193module_exit(i2c_adap_pxa_exit);