blob: e34bdf85920e585de533a4e0b09676d638cda846 [file] [log] [blame]
Andrew Victorc53c9cf2007-05-11 21:01:28 +01001/*
2 * include/asm-arm/arch-ks8695/entry-macro.S
3 *
4 * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
5 * Copyright (C) 2006 Simtec Electronics
6 *
7 * Low-level IRQ helper macros for KS8695
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12*/
13
14#include <asm/hardware.h>
15#include <asm/arch/regs-irq.h>
16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp
21 ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller
22 .endm
23
24 .macro arch_ret_to_user, tmp1, tmp2
25 .endm
26
27 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
28 ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register
29
30 teq \irqstat, #0
31 beq 1001f
32
33 mov \irqnr, #0
34
35 tst \irqstat, #0xff
36 moveq \irqstat, \irqstat, lsr #8
37 addeq \irqnr, \irqnr, #8
38 tsteq \irqstat, #0xff
39 moveq \irqstat, \irqstat, lsr #8
40 addeq \irqnr, \irqnr, #8
41 tsteq \irqstat, #0xff
42 moveq \irqstat, \irqstat, lsr #8
43 addeq \irqnr, \irqnr, #8
44 tst \irqstat, #0x0f
45 moveq \irqstat, \irqstat, lsr #4
46 addeq \irqnr, \irqnr, #4
47 tst \irqstat, #0x03
48 moveq \irqstat, \irqstat, lsr #2
49 addeq \irqnr, \irqnr, #2
50 tst \irqstat, #0x01
51 addeqs \irqnr, \irqnr, #1
521001:
53 .endm