Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Maxim8925 Interface |
| 3 | * |
| 4 | * Copyright (C) 2009 Marvell International Ltd. |
| 5 | * Haojian Zhuang <haojian.zhuang@marvell.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #ifndef __LINUX_MFD_MAX8925_H |
| 13 | #define __LINUX_MFD_MAX8925_H |
| 14 | |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 15 | #include <linux/mutex.h> |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 16 | #include <linux/interrupt.h> |
| 17 | |
Haojian Zhuang | 1ad9989 | 2010-01-08 12:43:29 -0500 | [diff] [blame] | 18 | /* Unified sub device IDs for MAX8925 */ |
| 19 | enum { |
| 20 | MAX8925_ID_SD1, |
| 21 | MAX8925_ID_SD2, |
| 22 | MAX8925_ID_SD3, |
| 23 | MAX8925_ID_LDO1, |
| 24 | MAX8925_ID_LDO2, |
| 25 | MAX8925_ID_LDO3, |
| 26 | MAX8925_ID_LDO4, |
| 27 | MAX8925_ID_LDO5, |
| 28 | MAX8925_ID_LDO6, |
| 29 | MAX8925_ID_LDO7, |
| 30 | MAX8925_ID_LDO8, |
| 31 | MAX8925_ID_LDO9, |
| 32 | MAX8925_ID_LDO10, |
| 33 | MAX8925_ID_LDO11, |
| 34 | MAX8925_ID_LDO12, |
| 35 | MAX8925_ID_LDO13, |
| 36 | MAX8925_ID_LDO14, |
| 37 | MAX8925_ID_LDO15, |
| 38 | MAX8925_ID_LDO16, |
| 39 | MAX8925_ID_LDO17, |
| 40 | MAX8925_ID_LDO18, |
| 41 | MAX8925_ID_LDO19, |
| 42 | MAX8925_ID_LDO20, |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 43 | MAX8925_ID_MAX, |
| 44 | }; |
| 45 | |
| 46 | enum { |
| 47 | /* |
| 48 | * Charging current threshold trigger going from fast charge |
| 49 | * to TOPOFF charge. From 5% to 20% of fasting charging current. |
| 50 | */ |
| 51 | MAX8925_TOPOFF_THR_5PER, |
| 52 | MAX8925_TOPOFF_THR_10PER, |
| 53 | MAX8925_TOPOFF_THR_15PER, |
| 54 | MAX8925_TOPOFF_THR_20PER, |
| 55 | }; |
| 56 | |
| 57 | enum { |
| 58 | /* Fast charging current */ |
| 59 | MAX8925_FCHG_85MA, |
| 60 | MAX8925_FCHG_300MA, |
| 61 | MAX8925_FCHG_460MA, |
| 62 | MAX8925_FCHG_600MA, |
| 63 | MAX8925_FCHG_700MA, |
| 64 | MAX8925_FCHG_800MA, |
| 65 | MAX8925_FCHG_900MA, |
| 66 | MAX8925_FCHG_1000MA, |
Haojian Zhuang | 1ad9989 | 2010-01-08 12:43:29 -0500 | [diff] [blame] | 67 | }; |
| 68 | |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 69 | /* Charger registers */ |
| 70 | #define MAX8925_CHG_IRQ1 (0x7e) |
| 71 | #define MAX8925_CHG_IRQ2 (0x7f) |
| 72 | #define MAX8925_CHG_IRQ1_MASK (0x80) |
| 73 | #define MAX8925_CHG_IRQ2_MASK (0x81) |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 74 | #define MAX8925_CHG_STATUS (0x82) |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 75 | |
| 76 | /* GPM registers */ |
| 77 | #define MAX8925_SYSENSEL (0x00) |
| 78 | #define MAX8925_ON_OFF_IRQ1 (0x01) |
| 79 | #define MAX8925_ON_OFF_IRQ1_MASK (0x02) |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 80 | #define MAX8925_ON_OFF_STATUS (0x03) |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 81 | #define MAX8925_ON_OFF_IRQ2 (0x0d) |
| 82 | #define MAX8925_ON_OFF_IRQ2_MASK (0x0e) |
| 83 | #define MAX8925_RESET_CNFG (0x0f) |
| 84 | |
| 85 | /* Touch registers */ |
| 86 | #define MAX8925_TSC_IRQ (0x00) |
| 87 | #define MAX8925_TSC_IRQ_MASK (0x01) |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 88 | #define MAX8925_TSC_CNFG1 (0x02) |
| 89 | #define MAX8925_ADC_SCHED (0x10) |
Haojian Zhuang | 1ad9989 | 2010-01-08 12:43:29 -0500 | [diff] [blame] | 90 | #define MAX8925_ADC_RES_END (0x6f) |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 91 | |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 92 | #define MAX8925_NREF_OK (1 << 4) |
| 93 | |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 94 | /* RTC registers */ |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 95 | #define MAX8925_ALARM0_CNTL (0x18) |
| 96 | #define MAX8925_ALARM1_CNTL (0x19) |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 97 | #define MAX8925_RTC_IRQ (0x1c) |
| 98 | #define MAX8925_RTC_IRQ_MASK (0x1d) |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 99 | #define MAX8925_MPL_CNTL (0x1e) |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 100 | |
Haojian Zhuang | 1ad9989 | 2010-01-08 12:43:29 -0500 | [diff] [blame] | 101 | /* WLED registers */ |
| 102 | #define MAX8925_WLED_MODE_CNTL (0x84) |
| 103 | #define MAX8925_WLED_CNTL (0x85) |
| 104 | |
| 105 | /* MAX8925 Registers */ |
| 106 | #define MAX8925_SDCTL1 (0x04) |
| 107 | #define MAX8925_SDCTL2 (0x07) |
| 108 | #define MAX8925_SDCTL3 (0x0A) |
| 109 | #define MAX8925_SDV1 (0x06) |
| 110 | #define MAX8925_SDV2 (0x09) |
| 111 | #define MAX8925_SDV3 (0x0C) |
| 112 | #define MAX8925_LDOCTL1 (0x18) |
| 113 | #define MAX8925_LDOCTL2 (0x1C) |
| 114 | #define MAX8925_LDOCTL3 (0x20) |
| 115 | #define MAX8925_LDOCTL4 (0x24) |
| 116 | #define MAX8925_LDOCTL5 (0x28) |
| 117 | #define MAX8925_LDOCTL6 (0x2C) |
| 118 | #define MAX8925_LDOCTL7 (0x30) |
| 119 | #define MAX8925_LDOCTL8 (0x34) |
| 120 | #define MAX8925_LDOCTL9 (0x38) |
| 121 | #define MAX8925_LDOCTL10 (0x3C) |
| 122 | #define MAX8925_LDOCTL11 (0x40) |
| 123 | #define MAX8925_LDOCTL12 (0x44) |
| 124 | #define MAX8925_LDOCTL13 (0x48) |
| 125 | #define MAX8925_LDOCTL14 (0x4C) |
| 126 | #define MAX8925_LDOCTL15 (0x50) |
| 127 | #define MAX8925_LDOCTL16 (0x10) |
| 128 | #define MAX8925_LDOCTL17 (0x14) |
| 129 | #define MAX8925_LDOCTL18 (0x72) |
| 130 | #define MAX8925_LDOCTL19 (0x5C) |
| 131 | #define MAX8925_LDOCTL20 (0x9C) |
| 132 | #define MAX8925_LDOVOUT1 (0x1A) |
| 133 | #define MAX8925_LDOVOUT2 (0x1E) |
| 134 | #define MAX8925_LDOVOUT3 (0x22) |
| 135 | #define MAX8925_LDOVOUT4 (0x26) |
| 136 | #define MAX8925_LDOVOUT5 (0x2A) |
| 137 | #define MAX8925_LDOVOUT6 (0x2E) |
| 138 | #define MAX8925_LDOVOUT7 (0x32) |
| 139 | #define MAX8925_LDOVOUT8 (0x36) |
| 140 | #define MAX8925_LDOVOUT9 (0x3A) |
| 141 | #define MAX8925_LDOVOUT10 (0x3E) |
| 142 | #define MAX8925_LDOVOUT11 (0x42) |
| 143 | #define MAX8925_LDOVOUT12 (0x46) |
| 144 | #define MAX8925_LDOVOUT13 (0x4A) |
| 145 | #define MAX8925_LDOVOUT14 (0x4E) |
| 146 | #define MAX8925_LDOVOUT15 (0x52) |
| 147 | #define MAX8925_LDOVOUT16 (0x12) |
| 148 | #define MAX8925_LDOVOUT17 (0x16) |
| 149 | #define MAX8925_LDOVOUT18 (0x74) |
| 150 | #define MAX8925_LDOVOUT19 (0x5E) |
| 151 | #define MAX8925_LDOVOUT20 (0x9E) |
| 152 | |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 153 | /* bit definitions */ |
| 154 | #define CHG_IRQ1_MASK (0x07) |
| 155 | #define CHG_IRQ2_MASK (0xff) |
| 156 | #define ON_OFF_IRQ1_MASK (0xff) |
| 157 | #define ON_OFF_IRQ2_MASK (0x03) |
| 158 | #define TSC_IRQ_MASK (0x03) |
| 159 | #define RTC_IRQ_MASK (0x0c) |
| 160 | |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 161 | #define MAX8925_NAME_SIZE (32) |
| 162 | |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 163 | /* IRQ definitions */ |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 164 | enum { |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 165 | MAX8925_IRQ_VCHG_DC_OVP, |
| 166 | MAX8925_IRQ_VCHG_DC_F, |
| 167 | MAX8925_IRQ_VCHG_DC_R, |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 168 | MAX8925_IRQ_VCHG_THM_OK_R, |
| 169 | MAX8925_IRQ_VCHG_THM_OK_F, |
| 170 | MAX8925_IRQ_VCHG_SYSLOW_F, |
| 171 | MAX8925_IRQ_VCHG_SYSLOW_R, |
| 172 | MAX8925_IRQ_VCHG_RST, |
| 173 | MAX8925_IRQ_VCHG_DONE, |
| 174 | MAX8925_IRQ_VCHG_TOPOFF, |
| 175 | MAX8925_IRQ_VCHG_TMR_FAULT, |
| 176 | MAX8925_IRQ_GPM_RSTIN, |
| 177 | MAX8925_IRQ_GPM_MPL, |
| 178 | MAX8925_IRQ_GPM_SW_3SEC, |
| 179 | MAX8925_IRQ_GPM_EXTON_F, |
| 180 | MAX8925_IRQ_GPM_EXTON_R, |
| 181 | MAX8925_IRQ_GPM_SW_1SEC, |
| 182 | MAX8925_IRQ_GPM_SW_F, |
| 183 | MAX8925_IRQ_GPM_SW_R, |
| 184 | MAX8925_IRQ_GPM_SYSCKEN_F, |
| 185 | MAX8925_IRQ_GPM_SYSCKEN_R, |
| 186 | MAX8925_IRQ_RTC_ALARM1, |
| 187 | MAX8925_IRQ_RTC_ALARM0, |
| 188 | MAX8925_IRQ_TSC_STICK, |
| 189 | MAX8925_IRQ_TSC_NSTICK, |
| 190 | MAX8925_NR_IRQS, |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 191 | }; |
| 192 | |
Qing Xu | 4e405ae | 2013-02-04 23:40:42 +0800 | [diff] [blame] | 193 | |
| 194 | |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 195 | struct max8925_chip { |
| 196 | struct device *dev; |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 197 | struct i2c_client *i2c; |
| 198 | struct i2c_client *adc; |
| 199 | struct i2c_client *rtc; |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 200 | struct mutex io_lock; |
| 201 | struct mutex irq_lock; |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 202 | |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 203 | int irq_base; |
| 204 | int core_irq; |
| 205 | int tsc_irq; |
Kevin Liu | ba74e80 | 2012-01-04 15:14:24 +0800 | [diff] [blame] | 206 | unsigned int wakeup_flag; |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 207 | }; |
| 208 | |
Haojian Zhuang | 1ad9989 | 2010-01-08 12:43:29 -0500 | [diff] [blame] | 209 | struct max8925_backlight_pdata { |
| 210 | int lxw_scl; /* 0/1 -- 0.8Ohm/0.4Ohm */ |
| 211 | int lxw_freq; /* 700KHz ~ 1400KHz */ |
| 212 | int dual_string; /* 0/1 -- single/dual string */ |
| 213 | }; |
| 214 | |
| 215 | struct max8925_touch_pdata { |
| 216 | unsigned int flags; |
| 217 | }; |
| 218 | |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 219 | struct max8925_power_pdata { |
| 220 | int (*set_charger)(int); |
| 221 | unsigned batt_detect:1; |
| 222 | unsigned topoff_threshold:2; |
| 223 | unsigned fast_charge:3; /* charge current */ |
Philip Rakity | 92de378 | 2011-11-25 23:19:37 +0400 | [diff] [blame] | 224 | unsigned no_temp_support:1; /* set if no temperature detect */ |
Philip Rakity | 5ba1fa0 | 2011-11-25 23:24:03 +0400 | [diff] [blame] | 225 | unsigned no_insert_detect:1; /* set if no ac insert detect */ |
Philip Rakity | e7a5f6d | 2011-08-29 09:32:04 -0700 | [diff] [blame] | 226 | char **supplied_to; |
| 227 | int num_supplicants; |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 228 | }; |
| 229 | |
| 230 | /* |
| 231 | * irq_base: stores IRQ base number of MAX8925 in platform |
| 232 | * tsc_irq: stores IRQ number of MAX8925 TSC |
| 233 | */ |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 234 | struct max8925_platform_data { |
Haojian Zhuang | 1ad9989 | 2010-01-08 12:43:29 -0500 | [diff] [blame] | 235 | struct max8925_backlight_pdata *backlight; |
| 236 | struct max8925_touch_pdata *touch; |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 237 | struct max8925_power_pdata *power; |
Haojian Zhuang | 51acdb6 | 2012-09-17 12:19:05 +0800 | [diff] [blame] | 238 | struct regulator_init_data *sd1; |
| 239 | struct regulator_init_data *sd2; |
| 240 | struct regulator_init_data *sd3; |
| 241 | struct regulator_init_data *ldo1; |
| 242 | struct regulator_init_data *ldo2; |
| 243 | struct regulator_init_data *ldo3; |
| 244 | struct regulator_init_data *ldo4; |
| 245 | struct regulator_init_data *ldo5; |
| 246 | struct regulator_init_data *ldo6; |
| 247 | struct regulator_init_data *ldo7; |
| 248 | struct regulator_init_data *ldo8; |
| 249 | struct regulator_init_data *ldo9; |
| 250 | struct regulator_init_data *ldo10; |
| 251 | struct regulator_init_data *ldo11; |
| 252 | struct regulator_init_data *ldo12; |
| 253 | struct regulator_init_data *ldo13; |
| 254 | struct regulator_init_data *ldo14; |
| 255 | struct regulator_init_data *ldo15; |
| 256 | struct regulator_init_data *ldo16; |
| 257 | struct regulator_init_data *ldo17; |
| 258 | struct regulator_init_data *ldo18; |
| 259 | struct regulator_init_data *ldo19; |
| 260 | struct regulator_init_data *ldo20; |
Haojian Zhuang | 1ad9989 | 2010-01-08 12:43:29 -0500 | [diff] [blame] | 261 | |
Haojian Zhuang | 1f1cf8f | 2010-02-05 16:07:54 +0100 | [diff] [blame] | 262 | int irq_base; |
| 263 | int tsc_irq; |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 264 | }; |
| 265 | |
| 266 | extern int max8925_reg_read(struct i2c_client *, int); |
| 267 | extern int max8925_reg_write(struct i2c_client *, int, unsigned char); |
| 268 | extern int max8925_bulk_read(struct i2c_client *, int, int, unsigned char *); |
| 269 | extern int max8925_bulk_write(struct i2c_client *, int, int, unsigned char *); |
| 270 | extern int max8925_set_bits(struct i2c_client *, int, unsigned char, |
| 271 | unsigned char); |
| 272 | |
Haojian Zhuang | d50f8f3 | 2010-01-08 12:29:23 +0100 | [diff] [blame] | 273 | extern int max8925_device_init(struct max8925_chip *, |
| 274 | struct max8925_platform_data *); |
| 275 | extern void max8925_device_exit(struct max8925_chip *); |
| 276 | #endif /* __LINUX_MFD_MAX8925_H */ |
| 277 | |