blob: f36d06bc2817c08c2509b962099cd625c8c76e55 [file] [log] [blame]
Mike Marciniszyn77241052015-07-30 15:17:43 -04001/*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50#include <linux/delay.h>
51#include "hfi.h"
52#include "common.h"
53#include "eprom.h"
54
55/*
Dean Luickcd371e02015-11-16 21:59:35 -050056 * The EPROM is logically divided into three partitions:
Mike Marciniszyn77241052015-07-30 15:17:43 -040057 * partition 0: the first 128K, visible from PCI ROM BAR
Dean Luickcd371e02015-11-16 21:59:35 -050058 * partition 1: 4K config file (sector size)
59 * partition 2: the rest
Mike Marciniszyn77241052015-07-30 15:17:43 -040060 */
61#define P0_SIZE (128 * 1024)
Dean Luickcd371e02015-11-16 21:59:35 -050062#define P1_SIZE (4 * 1024)
Mike Marciniszyn77241052015-07-30 15:17:43 -040063#define P1_START P0_SIZE
Dean Luickcd371e02015-11-16 21:59:35 -050064#define P2_START (P0_SIZE + P1_SIZE)
Mike Marciniszyn77241052015-07-30 15:17:43 -040065
Dean Luickcd371e02015-11-16 21:59:35 -050066/* erase sizes supported by the controller */
67#define SIZE_4KB (4 * 1024)
68#define MASK_4KB (SIZE_4KB - 1)
69
Mike Marciniszyn77241052015-07-30 15:17:43 -040070#define SIZE_32KB (32 * 1024)
71#define MASK_32KB (SIZE_32KB - 1)
72
Dean Luickcd371e02015-11-16 21:59:35 -050073#define SIZE_64KB (64 * 1024)
74#define MASK_64KB (SIZE_64KB - 1)
75
Mike Marciniszyn77241052015-07-30 15:17:43 -040076/* controller page size, in bytes */
77#define EP_PAGE_SIZE 256
78#define EEP_PAGE_MASK (EP_PAGE_SIZE - 1)
79
80/* controller commands */
81#define CMD_SHIFT 24
82#define CMD_NOP (0)
83#define CMD_PAGE_PROGRAM(addr) ((0x02 << CMD_SHIFT) | addr)
84#define CMD_READ_DATA(addr) ((0x03 << CMD_SHIFT) | addr)
85#define CMD_READ_SR1 ((0x05 << CMD_SHIFT))
86#define CMD_WRITE_ENABLE ((0x06 << CMD_SHIFT))
Dean Luickcd371e02015-11-16 21:59:35 -050087#define CMD_SECTOR_ERASE_4KB(addr) ((0x20 << CMD_SHIFT) | addr)
Mike Marciniszyn77241052015-07-30 15:17:43 -040088#define CMD_SECTOR_ERASE_32KB(addr) ((0x52 << CMD_SHIFT) | addr)
89#define CMD_CHIP_ERASE ((0x60 << CMD_SHIFT))
90#define CMD_READ_MANUF_DEV_ID ((0x90 << CMD_SHIFT))
91#define CMD_RELEASE_POWERDOWN_NOID ((0xab << CMD_SHIFT))
Dean Luickcd371e02015-11-16 21:59:35 -050092#define CMD_SECTOR_ERASE_64KB(addr) ((0xd8 << CMD_SHIFT) | addr)
Mike Marciniszyn77241052015-07-30 15:17:43 -040093
94/* controller interface speeds */
95#define EP_SPEED_FULL 0x2 /* full speed */
96
97/* controller status register 1 bits */
98#define SR1_BUSY 0x1ull /* the BUSY bit in SR1 */
99
100/* sleep length while waiting for controller */
101#define WAIT_SLEEP_US 100 /* must be larger than 5 (see usage) */
Jubin John8638b772016-02-14 20:19:24 -0800102#define COUNT_DELAY_SEC(n) ((n) * (1000000 / WAIT_SLEEP_US))
Mike Marciniszyn77241052015-07-30 15:17:43 -0400103
104/* GPIO pins */
Jubin John3f34d952016-02-14 20:20:42 -0800105#define EPROM_WP_N BIT_ULL(14) /* EPROM write line */
Mike Marciniszyn77241052015-07-30 15:17:43 -0400106
107/*
108 * Use the EP mutex to guard against other callers from within the driver.
Mike Marciniszyn77241052015-07-30 15:17:43 -0400109 */
110static DEFINE_MUTEX(eprom_mutex);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400111
112/*
113 * Turn on external enable line that allows writing on the flash.
114 */
115static void write_enable(struct hfi1_devdata *dd)
116{
117 /* raise signal */
Jubin John17fb4f22016-02-14 20:21:52 -0800118 write_csr(dd, ASIC_GPIO_OUT, read_csr(dd, ASIC_GPIO_OUT) | EPROM_WP_N);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400119 /* raise enable */
Jubin John17fb4f22016-02-14 20:21:52 -0800120 write_csr(dd, ASIC_GPIO_OE, read_csr(dd, ASIC_GPIO_OE) | EPROM_WP_N);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400121}
122
123/*
124 * Turn off external enable line that allows writing on the flash.
125 */
126static void write_disable(struct hfi1_devdata *dd)
127{
128 /* lower signal */
Jubin John17fb4f22016-02-14 20:21:52 -0800129 write_csr(dd, ASIC_GPIO_OUT, read_csr(dd, ASIC_GPIO_OUT) & ~EPROM_WP_N);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400130 /* lower enable */
Jubin John17fb4f22016-02-14 20:21:52 -0800131 write_csr(dd, ASIC_GPIO_OE, read_csr(dd, ASIC_GPIO_OE) & ~EPROM_WP_N);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400132}
133
134/*
135 * Wait for the device to become not busy. Must be called after all
136 * write or erase operations.
137 */
138static int wait_for_not_busy(struct hfi1_devdata *dd)
139{
140 unsigned long count = 0;
141 u64 reg;
142 int ret = 0;
143
144 /* starts page mode */
145 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_SR1);
146 while (1) {
147 udelay(WAIT_SLEEP_US);
148 usleep_range(WAIT_SLEEP_US - 5, WAIT_SLEEP_US + 5);
149 count++;
150 reg = read_csr(dd, ASIC_EEP_DATA);
151 if ((reg & SR1_BUSY) == 0)
152 break;
153 /* 200s is the largest time for a 128Mb device */
154 if (count > COUNT_DELAY_SEC(200)) {
155 dd_dev_err(dd, "waited too long for SPI FLASH busy to clear - failing\n");
156 ret = -ETIMEDOUT;
157 break; /* break, not goto - must stop page mode */
158 }
159 }
160
161 /* stop page mode with a NOP */
162 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_NOP);
163
164 return ret;
165}
166
167/*
168 * Read the device ID from the SPI controller.
169 */
170static u32 read_device_id(struct hfi1_devdata *dd)
171{
172 /* read the Manufacture Device ID */
173 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_MANUF_DEV_ID);
174 return (u32)read_csr(dd, ASIC_EEP_DATA);
175}
176
177/*
178 * Erase the whole flash.
179 */
180static int erase_chip(struct hfi1_devdata *dd)
181{
182 int ret;
183
184 write_enable(dd);
185
186 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
187 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_CHIP_ERASE);
188 ret = wait_for_not_busy(dd);
189
190 write_disable(dd);
191
192 return ret;
193}
194
195/*
Dean Luickcd371e02015-11-16 21:59:35 -0500196 * Erase a range.
Mike Marciniszyn77241052015-07-30 15:17:43 -0400197 */
Dean Luickcd371e02015-11-16 21:59:35 -0500198static int erase_range(struct hfi1_devdata *dd, u32 start, u32 len)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400199{
Dean Luickcd371e02015-11-16 21:59:35 -0500200 u32 end = start + len;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400201 int ret = 0;
202
203 if (end < start)
204 return -EINVAL;
205
Dean Luickcd371e02015-11-16 21:59:35 -0500206 /* check the end points for the minimum erase */
207 if ((start & MASK_4KB) || (end & MASK_4KB)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400208 dd_dev_err(dd,
Jubin John17fb4f22016-02-14 20:21:52 -0800209 "%s: non-aligned range (0x%x,0x%x) for a 4KB erase\n",
210 __func__, start, end);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400211 return -EINVAL;
212 }
213
214 write_enable(dd);
215
Dean Luickcd371e02015-11-16 21:59:35 -0500216 while (start < end) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400217 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
Dean Luickcd371e02015-11-16 21:59:35 -0500218 /* check in order of largest to smallest */
219 if (((start & MASK_64KB) == 0) && (start + SIZE_64KB <= end)) {
220 write_csr(dd, ASIC_EEP_ADDR_CMD,
221 CMD_SECTOR_ERASE_64KB(start));
222 start += SIZE_64KB;
223 } else if (((start & MASK_32KB) == 0) &&
224 (start + SIZE_32KB <= end)) {
225 write_csr(dd, ASIC_EEP_ADDR_CMD,
226 CMD_SECTOR_ERASE_32KB(start));
227 start += SIZE_32KB;
228 } else { /* 4KB will work */
229 write_csr(dd, ASIC_EEP_ADDR_CMD,
230 CMD_SECTOR_ERASE_4KB(start));
231 start += SIZE_4KB;
232 }
Mike Marciniszyn77241052015-07-30 15:17:43 -0400233 ret = wait_for_not_busy(dd);
234 if (ret)
235 goto done;
236 }
237
238done:
239 write_disable(dd);
240
241 return ret;
242}
243
244/*
245 * Read a 256 byte (64 dword) EPROM page.
246 * All callers have verified the offset is at a page boundary.
247 */
248static void read_page(struct hfi1_devdata *dd, u32 offset, u32 *result)
249{
250 int i;
251
252 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_READ_DATA(offset));
Jubin John8638b772016-02-14 20:19:24 -0800253 for (i = 0; i < EP_PAGE_SIZE / sizeof(u32); i++)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400254 result[i] = (u32)read_csr(dd, ASIC_EEP_DATA);
255 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_NOP); /* close open page */
256}
257
258/*
259 * Read length bytes starting at offset. Copy to user address addr.
260 */
261static int read_length(struct hfi1_devdata *dd, u32 start, u32 len, u64 addr)
262{
263 u32 offset;
Jubin John8638b772016-02-14 20:19:24 -0800264 u32 buffer[EP_PAGE_SIZE / sizeof(u32)];
Mike Marciniszyn77241052015-07-30 15:17:43 -0400265 int ret = 0;
266
267 /* reject anything not on an EPROM page boundary */
268 if ((start & EEP_PAGE_MASK) || (len & EEP_PAGE_MASK))
269 return -EINVAL;
270
271 for (offset = 0; offset < len; offset += EP_PAGE_SIZE) {
272 read_page(dd, start + offset, buffer);
273 if (copy_to_user((void __user *)(addr + offset),
Jubin John17fb4f22016-02-14 20:21:52 -0800274 buffer, EP_PAGE_SIZE)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400275 ret = -EFAULT;
276 goto done;
277 }
278 }
279
280done:
281 return ret;
282}
283
284/*
285 * Write a 256 byte (64 dword) EPROM page.
286 * All callers have verified the offset is at a page boundary.
287 */
288static int write_page(struct hfi1_devdata *dd, u32 offset, u32 *data)
289{
290 int i;
291
292 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_WRITE_ENABLE);
293 write_csr(dd, ASIC_EEP_DATA, data[0]);
294 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_PAGE_PROGRAM(offset));
Jubin John8638b772016-02-14 20:19:24 -0800295 for (i = 1; i < EP_PAGE_SIZE / sizeof(u32); i++)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400296 write_csr(dd, ASIC_EEP_DATA, data[i]);
297 /* will close the open page */
298 return wait_for_not_busy(dd);
299}
300
301/*
302 * Write length bytes starting at offset. Read from user address addr.
303 */
304static int write_length(struct hfi1_devdata *dd, u32 start, u32 len, u64 addr)
305{
306 u32 offset;
Jubin John8638b772016-02-14 20:19:24 -0800307 u32 buffer[EP_PAGE_SIZE / sizeof(u32)];
Mike Marciniszyn77241052015-07-30 15:17:43 -0400308 int ret = 0;
309
310 /* reject anything not on an EPROM page boundary */
311 if ((start & EEP_PAGE_MASK) || (len & EEP_PAGE_MASK))
312 return -EINVAL;
313
314 write_enable(dd);
315
316 for (offset = 0; offset < len; offset += EP_PAGE_SIZE) {
317 if (copy_from_user(buffer, (void __user *)(addr + offset),
Jubin John17fb4f22016-02-14 20:21:52 -0800318 EP_PAGE_SIZE)) {
Mike Marciniszyn77241052015-07-30 15:17:43 -0400319 ret = -EFAULT;
320 goto done;
321 }
322 ret = write_page(dd, start + offset, buffer);
323 if (ret)
324 goto done;
325 }
326
327done:
328 write_disable(dd);
329 return ret;
330}
331
Dean Luickcd371e02015-11-16 21:59:35 -0500332/* convert an range composite to a length, in bytes */
333static inline u32 extract_rlen(u32 composite)
334{
335 return (composite & 0xffff) * EP_PAGE_SIZE;
336}
337
338/* convert an range composite to a start, in bytes */
339static inline u32 extract_rstart(u32 composite)
340{
341 return (composite >> 16) * EP_PAGE_SIZE;
342}
343
Mike Marciniszyn77241052015-07-30 15:17:43 -0400344/*
345 * Perform the given operation on the EPROM. Called from user space. The
346 * user credentials have already been checked.
347 *
348 * Return 0 on success, -ERRNO on error
349 */
Dean Luickd24bc642016-02-03 14:34:58 -0800350int handle_eprom_command(struct file *fp, const struct hfi1_cmd *cmd)
Mike Marciniszyn77241052015-07-30 15:17:43 -0400351{
352 struct hfi1_devdata *dd;
353 u32 dev_id;
Dean Luickcd371e02015-11-16 21:59:35 -0500354 u32 rlen; /* range length */
355 u32 rstart; /* range start */
Dean Luickd24bc642016-02-03 14:34:58 -0800356 int i_minor;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400357 int ret = 0;
358
359 /*
Dean Luickd24bc642016-02-03 14:34:58 -0800360 * Map the device file to device data using the relative minor.
361 * The device file minor number is the unit number + 1. 0 is
362 * the generic device file - reject it.
Mike Marciniszyn77241052015-07-30 15:17:43 -0400363 */
Dean Luickd24bc642016-02-03 14:34:58 -0800364 i_minor = iminor(file_inode(fp)) - HFI1_USER_MINOR_BASE;
365 if (i_minor <= 0)
366 return -EINVAL;
367 dd = hfi1_lookup(i_minor - 1);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400368 if (!dd) {
Dean Luickd24bc642016-02-03 14:34:58 -0800369 pr_err("%s: cannot find unit %d!\n", __func__, i_minor);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400370 return -EINVAL;
371 }
372
Dean Luicke154f122016-02-03 14:37:24 -0800373 /* some devices do not have an EPROM */
374 if (!dd->eprom_available)
375 return -EOPNOTSUPP;
376
Mike Marciniszyn77241052015-07-30 15:17:43 -0400377 /* lock against other callers touching the ASIC block */
378 mutex_lock(&eprom_mutex);
379
Mike Marciniszyn77241052015-07-30 15:17:43 -0400380 /* lock against the other HFI on another OS */
381 ret = acquire_hw_mutex(dd);
382 if (ret) {
383 dd_dev_err(dd,
Jubin John17fb4f22016-02-14 20:21:52 -0800384 "%s: unable to acquire hw mutex, no EPROM support\n",
385 __func__);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400386 goto done_asic;
387 }
388
389 dd_dev_info(dd, "%s: cmd: type %d, len 0x%x, addr 0x%016llx\n",
Jubin John17fb4f22016-02-14 20:21:52 -0800390 __func__, cmd->type, cmd->len, cmd->addr);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400391
392 switch (cmd->type) {
393 case HFI1_CMD_EP_INFO:
394 if (cmd->len != sizeof(u32)) {
395 ret = -ERANGE;
396 break;
397 }
398 dev_id = read_device_id(dd);
399 /* addr points to a u32 user buffer */
400 if (copy_to_user((void __user *)cmd->addr, &dev_id,
Jubin John17fb4f22016-02-14 20:21:52 -0800401 sizeof(u32)))
Mike Marciniszyn77241052015-07-30 15:17:43 -0400402 ret = -EFAULT;
403 break;
Dean Luickcd371e02015-11-16 21:59:35 -0500404
Mike Marciniszyn77241052015-07-30 15:17:43 -0400405 case HFI1_CMD_EP_ERASE_CHIP:
406 ret = erase_chip(dd);
407 break;
Dean Luickcd371e02015-11-16 21:59:35 -0500408
409 case HFI1_CMD_EP_ERASE_RANGE:
410 rlen = extract_rlen(cmd->len);
411 rstart = extract_rstart(cmd->len);
412 ret = erase_range(dd, rstart, rlen);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400413 break;
Dean Luickcd371e02015-11-16 21:59:35 -0500414
415 case HFI1_CMD_EP_READ_RANGE:
416 rlen = extract_rlen(cmd->len);
417 rstart = extract_rstart(cmd->len);
418 ret = read_length(dd, rstart, rlen, cmd->addr);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400419 break;
Dean Luickcd371e02015-11-16 21:59:35 -0500420
421 case HFI1_CMD_EP_WRITE_RANGE:
422 rlen = extract_rlen(cmd->len);
423 rstart = extract_rstart(cmd->len);
424 ret = write_length(dd, rstart, rlen, cmd->addr);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400425 break;
Dean Luickcd371e02015-11-16 21:59:35 -0500426
Mike Marciniszyn77241052015-07-30 15:17:43 -0400427 default:
428 dd_dev_err(dd, "%s: unexpected command %d\n",
Jubin John17fb4f22016-02-14 20:21:52 -0800429 __func__, cmd->type);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400430 ret = -EINVAL;
431 break;
432 }
433
434 release_hw_mutex(dd);
435done_asic:
436 mutex_unlock(&eprom_mutex);
437 return ret;
438}
439
440/*
441 * Initialize the EPROM handler.
442 */
443int eprom_init(struct hfi1_devdata *dd)
444{
445 int ret = 0;
446
447 /* only the discrete chip has an EPROM, nothing to do */
448 if (dd->pcidev->device != PCI_DEVICE_ID_INTEL0)
449 return 0;
450
451 /* lock against other callers */
452 mutex_lock(&eprom_mutex);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400453
454 /*
455 * Lock against the other HFI on another OS - the mutex above
456 * would have caught anything in this driver. It is OK if
457 * both OSes reset the EPROM - as long as they don't do it at
458 * the same time.
459 */
460 ret = acquire_hw_mutex(dd);
461 if (ret) {
462 dd_dev_err(dd,
Jubin John17fb4f22016-02-14 20:21:52 -0800463 "%s: unable to acquire hw mutex, no EPROM support\n",
464 __func__);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400465 goto done_asic;
466 }
467
468 /* reset EPROM to be sure it is in a good state */
469
470 /* set reset */
Jubin John17fb4f22016-02-14 20:21:52 -0800471 write_csr(dd, ASIC_EEP_CTL_STAT, ASIC_EEP_CTL_STAT_EP_RESET_SMASK);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400472 /* clear reset, set speed */
473 write_csr(dd, ASIC_EEP_CTL_STAT,
Jubin John17fb4f22016-02-14 20:21:52 -0800474 EP_SPEED_FULL << ASIC_EEP_CTL_STAT_RATE_SPI_SHIFT);
Mike Marciniszyn77241052015-07-30 15:17:43 -0400475
476 /* wake the device with command "release powerdown NoID" */
477 write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_RELEASE_POWERDOWN_NOID);
478
Dean Luicke154f122016-02-03 14:37:24 -0800479 dd->eprom_available = true;
Mike Marciniszyn77241052015-07-30 15:17:43 -0400480 release_hw_mutex(dd);
481done_asic:
482 mutex_unlock(&eprom_mutex);
483 return ret;
484}