Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 1 | if ARCH_AT91 |
SAN People | 73a59c1 | 2006-01-09 17:05:41 +0000 | [diff] [blame] | 2 | |
Jean-Christophe PLAGNIOL-VILLARD | 13079a7 | 2011-11-02 01:43:31 +0800 | [diff] [blame] | 3 | config HAVE_AT91_DBGU0 |
| 4 | bool |
| 5 | |
| 6 | config HAVE_AT91_DBGU1 |
| 7 | bool |
| 8 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 9 | config AT91_PMC_UNIT |
| 10 | bool |
| 11 | default !ARCH_AT91X40 |
| 12 | |
Jean-Christophe PLAGNIOL-VILLARD | c017759 | 2011-11-29 22:01:08 +0800 | [diff] [blame] | 13 | config AT91_SAM9_ALT_RESET |
| 14 | bool |
Jean-Christophe PLAGNIOL-VILLARD | 21ea52a | 2012-03-03 03:14:16 +0800 | [diff] [blame] | 15 | default !ARCH_AT91X40 |
Jean-Christophe PLAGNIOL-VILLARD | c017759 | 2011-11-29 22:01:08 +0800 | [diff] [blame] | 16 | |
Jean-Christophe PLAGNIOL-VILLARD | 14f991a | 2011-11-18 01:41:28 +0800 | [diff] [blame] | 17 | config AT91_SAM9G45_RESET |
| 18 | bool |
Jean-Christophe PLAGNIOL-VILLARD | 21ea52a | 2012-03-03 03:14:16 +0800 | [diff] [blame] | 19 | default !ARCH_AT91X40 |
Jean-Christophe PLAGNIOL-VILLARD | 14f991a | 2011-11-18 01:41:28 +0800 | [diff] [blame] | 20 | |
Ludovic Desroches | fc05b65 | 2013-03-22 13:24:10 +0000 | [diff] [blame] | 21 | config AT91_SAM9_TIME |
| 22 | bool |
| 23 | |
Jean-Christophe PLAGNIOL-VILLARD | 1441bd3 | 2012-04-06 13:04:04 +0800 | [diff] [blame] | 24 | config SOC_AT91SAM9 |
| 25 | bool |
Ludovic Desroches | fc05b65 | 2013-03-22 13:24:10 +0000 | [diff] [blame] | 26 | select AT91_SAM9_TIME |
Jean-Christophe PLAGNIOL-VILLARD | 1441bd3 | 2012-04-06 13:04:04 +0800 | [diff] [blame] | 27 | select CPU_ARM926T |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 28 | select GENERIC_CLOCKEVENTS |
Jean-Christophe PLAGNIOL-VILLARD | 08d04a1 | 2012-10-17 15:41:31 +0200 | [diff] [blame] | 29 | select MULTI_IRQ_HANDLER |
| 30 | select SPARSE_IRQ |
Jean-Christophe PLAGNIOL-VILLARD | 1441bd3 | 2012-04-06 13:04:04 +0800 | [diff] [blame] | 31 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 32 | config SOC_SAMA5 |
| 33 | bool |
| 34 | select AT91_SAM9_TIME |
| 35 | select CPU_V7 |
| 36 | select GENERIC_CLOCKEVENTS |
| 37 | select MULTI_IRQ_HANDLER |
| 38 | select SPARSE_IRQ |
| 39 | |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 40 | menu "Atmel AT91 System-on-Chip" |
| 41 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 42 | choice |
| 43 | |
| 44 | prompt "Core type" |
| 45 | |
| 46 | config SOC_SAM_V4_V5 |
| 47 | bool "ARM7/ARM9" |
| 48 | help |
| 49 | Select this if you are using one of Atmel's AT91SAM9, AT91RM9200 |
| 50 | or AT91X40 SoC. |
| 51 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 52 | config SOC_SAM_V7 |
| 53 | bool "Cortex A5" |
| 54 | help |
| 55 | Select this if you are using one of Atmel's SAMA5D3 SoC. |
| 56 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 57 | endchoice |
| 58 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 59 | comment "Atmel AT91 Processor" |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 60 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 61 | if SOC_SAM_V7 |
| 62 | config SOC_SAMA5D3 |
| 63 | bool "SAMA5D3 family" |
| 64 | depends on SOC_SAM_V7 |
| 65 | select SOC_SAMA5 |
| 66 | select HAVE_FB_ATMEL |
| 67 | select HAVE_AT91_DBGU1 |
| 68 | help |
| 69 | Select this if you are using one of Atmel's SAMA5D3 family SoC. |
| 70 | This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35. |
| 71 | endif |
| 72 | |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 73 | if SOC_SAM_V4_V5 |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 74 | config SOC_AT91RM9200 |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 75 | bool "AT91RM9200" |
Russell King | c750815 | 2008-10-26 10:55:14 +0000 | [diff] [blame] | 76 | select CPU_ARM920T |
David Brownell | 5e802df | 2007-07-31 01:41:26 +0100 | [diff] [blame] | 77 | select GENERIC_CLOCKEVENTS |
Jean-Christophe PLAGNIOL-VILLARD | 13079a7 | 2011-11-02 01:43:31 +0800 | [diff] [blame] | 78 | select HAVE_AT91_DBGU0 |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 79 | select MULTI_IRQ_HANDLER |
| 80 | select SPARSE_IRQ |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 81 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 82 | config SOC_AT91SAM9260 |
| 83 | bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" |
Jean-Christophe PLAGNIOL-VILLARD | 13079a7 | 2011-11-02 01:43:31 +0800 | [diff] [blame] | 84 | select HAVE_AT91_DBGU0 |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 85 | select SOC_AT91SAM9 |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 86 | help |
| 87 | Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE |
| 88 | or AT91SAM9G20 SoC. |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 89 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 90 | config SOC_AT91SAM9261 |
| 91 | bool "AT91SAM9261 or AT91SAM9G10" |
Jean-Christophe PLAGNIOL-VILLARD | 13079a7 | 2011-11-02 01:43:31 +0800 | [diff] [blame] | 92 | select HAVE_AT91_DBGU0 |
Nicolas Ferre | 0912e53 | 2009-06-23 16:30:56 +0200 | [diff] [blame] | 93 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 94 | select SOC_AT91SAM9 |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 95 | help |
| 96 | Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. |
Nicolas Ferre | b319ff8 | 2009-06-26 15:37:01 +0100 | [diff] [blame] | 97 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 98 | config SOC_AT91SAM9263 |
Andrew Victor | b2c6561 | 2007-02-08 09:42:40 +0100 | [diff] [blame] | 99 | bool "AT91SAM9263" |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 100 | select HAVE_AT91_DBGU1 |
Nicolas Ferre | 0912e53 | 2009-06-23 16:30:56 +0200 | [diff] [blame] | 101 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 102 | select SOC_AT91SAM9 |
Andrew Victor | b2c6561 | 2007-02-08 09:42:40 +0100 | [diff] [blame] | 103 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 104 | config SOC_AT91SAM9RL |
Andrew Victor | 877d772 | 2007-05-11 20:49:56 +0100 | [diff] [blame] | 105 | bool "AT91SAM9RL" |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 106 | select HAVE_AT91_DBGU0 |
Nicolas Ferre | 0912e53 | 2009-06-23 16:30:56 +0200 | [diff] [blame] | 107 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 108 | select SOC_AT91SAM9 |
Andrew Victor | 877d772 | 2007-05-11 20:49:56 +0100 | [diff] [blame] | 109 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 110 | config SOC_AT91SAM9G45 |
Nicolas Ferre | ca1dcbf | 2012-03-15 12:26:43 +0100 | [diff] [blame] | 111 | bool "AT91SAM9G45 or AT91SAM9M10 families" |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 112 | select HAVE_AT91_DBGU1 |
Nicolas Ferre | 0912e53 | 2009-06-23 16:30:56 +0200 | [diff] [blame] | 113 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 114 | select SOC_AT91SAM9 |
Nicolas Ferre | ca1dcbf | 2012-03-15 12:26:43 +0100 | [diff] [blame] | 115 | help |
| 116 | Select this if you are using one of Atmel's AT91SAM9G45 family SoC. |
| 117 | This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. |
Nicolas Ferre | 789b23b | 2009-06-26 15:36:58 +0100 | [diff] [blame] | 118 | |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 119 | config SOC_AT91SAM9X5 |
Nicolas Ferre | 9a3ee40 | 2012-01-23 16:16:44 +0100 | [diff] [blame] | 120 | bool "AT91SAM9x5 family" |
Jean-Christophe PLAGNIOL-VILLARD | 1e3ce2b | 2012-04-06 11:51:50 +0800 | [diff] [blame] | 121 | select HAVE_AT91_DBGU0 |
Nicolas Ferre | 9a3ee40 | 2012-01-23 16:16:44 +0100 | [diff] [blame] | 122 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 123 | select SOC_AT91SAM9 |
Nicolas Ferre | a26e1af | 2012-03-15 12:48:41 +0100 | [diff] [blame] | 124 | help |
| 125 | Select this if you are using one of Atmel's AT91SAM9x5 family SoC. |
| 126 | This means that your SAM9 name finishes with a '5' (except if it is |
| 127 | AT91SAM9G45!). |
| 128 | This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35 |
| 129 | and AT91SAM9X35. |
Nicolas Ferre | 9a3ee40 | 2012-01-23 16:16:44 +0100 | [diff] [blame] | 130 | |
Hong Xu | 74db4fb | 2012-04-17 14:26:31 +0800 | [diff] [blame] | 131 | config SOC_AT91SAM9N12 |
| 132 | bool "AT91SAM9N12 family" |
Hong Xu | 74db4fb | 2012-04-17 14:26:31 +0800 | [diff] [blame] | 133 | select HAVE_AT91_DBGU0 |
| 134 | select HAVE_FB_ATMEL |
Russell King | b1b3f49 | 2012-10-06 17:12:25 +0100 | [diff] [blame] | 135 | select SOC_AT91SAM9 |
Hong Xu | 74db4fb | 2012-04-17 14:26:31 +0800 | [diff] [blame] | 136 | help |
| 137 | Select this if you are using Atmel's AT91SAM9N12 SoC. |
| 138 | |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 139 | # ---------------------------------------------------------- |
| 140 | |
Jean-Christophe PLAGNIOL-VILLARD | 3ae8dbd | 2013-02-19 18:27:44 +0800 | [diff] [blame] | 141 | source arch/arm/mach-at91/Kconfig.non_dt |
Ludovic Desroches | 8f0cdcc | 2013-03-22 13:24:11 +0000 | [diff] [blame] | 142 | endif # SOC_SAM_V4_V5 |
Greg Ungerer | 9f1ccef | 2007-07-30 02:39:21 +0100 | [diff] [blame] | 143 | |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 144 | comment "Generic Board Type" |
| 145 | |
Joachim Eastwood | 397f8c3 | 2012-10-28 18:31:09 +0000 | [diff] [blame] | 146 | config MACH_AT91RM9200_DT |
| 147 | bool "Atmel AT91RM9200 Evaluation Kits with device-tree support" |
| 148 | depends on SOC_AT91RM9200 |
| 149 | select USE_OF |
| 150 | help |
| 151 | Select this if you want to experiment device-tree with |
| 152 | an Atmel RM9200 Evaluation Kit. |
| 153 | |
Jean-Christophe PLAGNIOL-VILLARD | 4afcd1d | 2013-02-19 18:30:29 +0800 | [diff] [blame] | 154 | config MACH_AT91SAM9_DT |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 155 | bool "Atmel AT91SAM Evaluation Kits with device-tree support" |
Joachim Eastwood | 35ed3c7 | 2012-10-28 18:31:06 +0000 | [diff] [blame] | 156 | depends on SOC_AT91SAM9 |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 157 | select USE_OF |
| 158 | help |
| 159 | Select this if you want to experiment device-tree with |
| 160 | an Atmel Evaluation Kit. |
| 161 | |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 162 | config MACH_SAMA5_DT |
| 163 | bool "Atmel SAMA5 Evaluation Kits with device-tree support" |
| 164 | depends on SOC_SAMA5 |
| 165 | select USE_OF |
Alexandre Belloni | 0580ed3 | 2013-06-05 09:50:43 +0000 | [diff] [blame] | 166 | select PHYLIB if NETDEVICES |
Ludovic Desroches | 8f4b479 | 2013-03-22 13:24:12 +0000 | [diff] [blame] | 167 | help |
| 168 | Select this if you want to experiment device-tree with |
| 169 | an Atmel Evaluation Kit. |
| 170 | |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 171 | # ---------------------------------------------------------- |
| 172 | |
Andrew Victor | 8fc5ffa | 2006-06-29 16:06:33 +0100 | [diff] [blame] | 173 | comment "AT91 Feature Selections" |
SAN People | 73a59c1 | 2006-01-09 17:05:41 +0000 | [diff] [blame] | 174 | |
| 175 | config AT91_PROGRAMMABLE_CLOCKS |
| 176 | bool "Programmable Clocks" |
| 177 | help |
| 178 | Select this if you need to program one or more of the PCK0..PCK3 |
| 179 | programmable clock outputs. |
| 180 | |
Andrew Victor | eaad2db | 2008-09-21 21:35:18 +0100 | [diff] [blame] | 181 | config AT91_SLOW_CLOCK |
| 182 | bool "Suspend-to-RAM disables main oscillator" |
| 183 | depends on SUSPEND |
| 184 | help |
| 185 | Select this if you want Suspend-to-RAM to save the most power |
| 186 | possible (without powering off the CPU) by disabling the PLLs |
| 187 | and main oscillator so that only the 32 KiHz clock is available. |
| 188 | |
| 189 | When only that slow-clock is available, some peripherals lose |
| 190 | functionality. Many can't issue wakeup events unless faster |
| 191 | clocks are available. Some lose their operating state and |
| 192 | need to be completely re-initialized. |
| 193 | |
David Brownell | 5248c65 | 2007-11-12 17:59:10 +0100 | [diff] [blame] | 194 | config AT91_TIMER_HZ |
| 195 | int "Kernel HZ (jiffies per second)" |
| 196 | range 32 1024 |
| 197 | depends on ARCH_AT91 |
| 198 | default "128" if ARCH_AT91RM9200 |
| 199 | default "100" |
| 200 | help |
| 201 | On AT91rm9200 chips where you're using a system clock derived |
| 202 | from the 32768 Hz hardware clock, this tick rate should divide |
| 203 | it exactly: use a power-of-two value, such as 128 or 256, to |
| 204 | reduce timing errors caused by rounding. |
| 205 | |
| 206 | On AT91sam926x chips, or otherwise when using a higher precision |
| 207 | system clock (of at least several MHz), rounding is less of a |
| 208 | problem so it can be safer to use a decimal values like 100. |
| 209 | |
SAN People | 73a59c1 | 2006-01-09 17:05:41 +0000 | [diff] [blame] | 210 | endmenu |
| 211 | |
| 212 | endif |