Matthijs Kooijman | 5b9974b | 2013-04-22 14:00:19 -0700 | [diff] [blame] | 1 | Platform DesignWare HS OTG USB 2.0 controller |
| 2 | ----------------------------------------------------- |
| 3 | |
| 4 | Required properties: |
Stephen Warren | 831eae6 | 2013-11-26 18:58:01 -0700 | [diff] [blame] | 5 | - compatible : One of: |
| 6 | - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC. |
| 7 | - snps,dwc2: A generic DWC2 USB controller with default parameters. |
Matthijs Kooijman | 5b9974b | 2013-04-22 14:00:19 -0700 | [diff] [blame] | 8 | - reg : Should contain 1 register range (address and length) |
| 9 | - interrupts : Should contain 1 interrupt |
Matt Porter | 65b4eb9 | 2013-12-19 09:23:03 -0500 | [diff] [blame] | 10 | - clocks: clock provider specifier |
| 11 | - clock-names: shall be "otg" |
| 12 | Refer to clk/clock-bindings.txt for generic clock consumer properties |
| 13 | |
| 14 | Optional properties: |
| 15 | - phys: phy provider specifier |
| 16 | - phy-names: shall be "device" |
| 17 | Refer to phy/phy-bindings.txt for generic phy consumer properties |
Matthijs Kooijman | 5b9974b | 2013-04-22 14:00:19 -0700 | [diff] [blame] | 18 | |
| 19 | Example: |
| 20 | |
| 21 | usb@101c0000 { |
| 22 | compatible = "ralink,rt3050-usb, snps,dwc2"; |
| 23 | reg = <0x101c0000 40000>; |
| 24 | interrupts = <18>; |
Matt Porter | 65b4eb9 | 2013-12-19 09:23:03 -0500 | [diff] [blame] | 25 | clocks = <&usb_otg_ahb_clk>; |
| 26 | clock-names = "otg"; |
| 27 | phys = <&usbphy>; |
| 28 | phy-names = "usb2-phy"; |
Matthijs Kooijman | 5b9974b | 2013-04-22 14:00:19 -0700 | [diff] [blame] | 29 | }; |