Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2007-2008 Advanced Micro Devices, Inc. |
| 3 | * Author: Joerg Roedel <joerg.roedel@amd.com> |
| 4 | * Leo Duran <leo.duran@amd.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License version 2 as published |
| 8 | * by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #include <linux/pci.h> |
| 21 | #include <linux/gfp.h> |
| 22 | #include <linux/bitops.h> |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 23 | #include <linux/debugfs.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 24 | #include <linux/scatterlist.h> |
| 25 | #include <linux/iommu-helper.h> |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 26 | #ifdef CONFIG_IOMMU_API |
| 27 | #include <linux/iommu.h> |
| 28 | #endif |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 29 | #include <asm/proto.h> |
FUJITA Tomonori | 46a7fa2 | 2008-07-11 10:23:42 +0900 | [diff] [blame] | 30 | #include <asm/iommu.h> |
Joerg Roedel | 1d9b16d | 2008-11-27 18:39:15 +0100 | [diff] [blame] | 31 | #include <asm/gart.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 32 | #include <asm/amd_iommu_types.h> |
Joerg Roedel | c6da992 | 2008-06-26 21:28:06 +0200 | [diff] [blame] | 33 | #include <asm/amd_iommu.h> |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 34 | |
| 35 | #define CMD_SET_TYPE(cmd, t) ((cmd)->data[1] |= ((t) << 28)) |
| 36 | |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 37 | #define EXIT_LOOP_COUNT 10000000 |
| 38 | |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 39 | static DEFINE_RWLOCK(amd_iommu_devtable_lock); |
| 40 | |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 41 | /* A list of preallocated protection domains */ |
| 42 | static LIST_HEAD(iommu_pd_list); |
| 43 | static DEFINE_SPINLOCK(iommu_pd_list_lock); |
| 44 | |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 45 | #ifdef CONFIG_IOMMU_API |
| 46 | static struct iommu_ops amd_iommu_ops; |
| 47 | #endif |
| 48 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 49 | /* |
| 50 | * general struct to manage commands send to an IOMMU |
| 51 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 52 | struct iommu_cmd { |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 53 | u32 data[4]; |
| 54 | }; |
| 55 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 56 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
| 57 | struct unity_map_entry *e); |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 58 | static struct dma_ops_domain *find_protection_domain(u16 devid); |
| 59 | |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 60 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 61 | #ifdef CONFIG_AMD_IOMMU_STATS |
| 62 | |
| 63 | /* |
| 64 | * Initialization code for statistics collection |
| 65 | */ |
| 66 | |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 67 | DECLARE_STATS_COUNTER(compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 68 | DECLARE_STATS_COUNTER(cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 69 | DECLARE_STATS_COUNTER(cnt_unmap_single); |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 70 | DECLARE_STATS_COUNTER(cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 71 | DECLARE_STATS_COUNTER(cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 72 | DECLARE_STATS_COUNTER(cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 73 | DECLARE_STATS_COUNTER(cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 74 | DECLARE_STATS_COUNTER(cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 75 | DECLARE_STATS_COUNTER(domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame^] | 76 | DECLARE_STATS_COUNTER(domain_flush_all); |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 77 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 78 | static struct dentry *stats_dir; |
| 79 | static struct dentry *de_isolate; |
| 80 | static struct dentry *de_fflush; |
| 81 | |
| 82 | static void amd_iommu_stats_add(struct __iommu_counter *cnt) |
| 83 | { |
| 84 | if (stats_dir == NULL) |
| 85 | return; |
| 86 | |
| 87 | cnt->dent = debugfs_create_u64(cnt->name, 0444, stats_dir, |
| 88 | &cnt->value); |
| 89 | } |
| 90 | |
| 91 | static void amd_iommu_stats_init(void) |
| 92 | { |
| 93 | stats_dir = debugfs_create_dir("amd-iommu", NULL); |
| 94 | if (stats_dir == NULL) |
| 95 | return; |
| 96 | |
| 97 | de_isolate = debugfs_create_bool("isolation", 0444, stats_dir, |
| 98 | (u32 *)&amd_iommu_isolate); |
| 99 | |
| 100 | de_fflush = debugfs_create_bool("fullflush", 0444, stats_dir, |
| 101 | (u32 *)&amd_iommu_unmap_flush); |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 102 | |
| 103 | amd_iommu_stats_add(&compl_wait); |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 104 | amd_iommu_stats_add(&cnt_map_single); |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 105 | amd_iommu_stats_add(&cnt_unmap_single); |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 106 | amd_iommu_stats_add(&cnt_map_sg); |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 107 | amd_iommu_stats_add(&cnt_unmap_sg); |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 108 | amd_iommu_stats_add(&cnt_alloc_coherent); |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 109 | amd_iommu_stats_add(&cnt_free_coherent); |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 110 | amd_iommu_stats_add(&cross_page); |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 111 | amd_iommu_stats_add(&domain_flush_single); |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame^] | 112 | amd_iommu_stats_add(&domain_flush_all); |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 113 | } |
| 114 | |
| 115 | #endif |
| 116 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 117 | /* returns !0 if the IOMMU is caching non-present entries in its TLB */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 118 | static int iommu_has_npcache(struct amd_iommu *iommu) |
| 119 | { |
Joerg Roedel | ae9b940 | 2008-10-30 17:43:57 +0100 | [diff] [blame] | 120 | return iommu->cap & (1UL << IOMMU_CAP_NPCACHE); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 121 | } |
| 122 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 123 | /**************************************************************************** |
| 124 | * |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 125 | * Interrupt handling functions |
| 126 | * |
| 127 | ****************************************************************************/ |
| 128 | |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 129 | static void iommu_print_event(void *__evt) |
| 130 | { |
| 131 | u32 *event = __evt; |
| 132 | int type = (event[1] >> EVENT_TYPE_SHIFT) & EVENT_TYPE_MASK; |
| 133 | int devid = (event[0] >> EVENT_DEVID_SHIFT) & EVENT_DEVID_MASK; |
| 134 | int domid = (event[1] >> EVENT_DOMID_SHIFT) & EVENT_DOMID_MASK; |
| 135 | int flags = (event[1] >> EVENT_FLAGS_SHIFT) & EVENT_FLAGS_MASK; |
| 136 | u64 address = (u64)(((u64)event[3]) << 32) | event[2]; |
| 137 | |
| 138 | printk(KERN_ERR "AMD IOMMU: Event logged ["); |
| 139 | |
| 140 | switch (type) { |
| 141 | case EVENT_TYPE_ILL_DEV: |
| 142 | printk("ILLEGAL_DEV_TABLE_ENTRY device=%02x:%02x.%x " |
| 143 | "address=0x%016llx flags=0x%04x]\n", |
| 144 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 145 | address, flags); |
| 146 | break; |
| 147 | case EVENT_TYPE_IO_FAULT: |
| 148 | printk("IO_PAGE_FAULT device=%02x:%02x.%x " |
| 149 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 150 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 151 | domid, address, flags); |
| 152 | break; |
| 153 | case EVENT_TYPE_DEV_TAB_ERR: |
| 154 | printk("DEV_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 155 | "address=0x%016llx flags=0x%04x]\n", |
| 156 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 157 | address, flags); |
| 158 | break; |
| 159 | case EVENT_TYPE_PAGE_TAB_ERR: |
| 160 | printk("PAGE_TAB_HARDWARE_ERROR device=%02x:%02x.%x " |
| 161 | "domain=0x%04x address=0x%016llx flags=0x%04x]\n", |
| 162 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 163 | domid, address, flags); |
| 164 | break; |
| 165 | case EVENT_TYPE_ILL_CMD: |
| 166 | printk("ILLEGAL_COMMAND_ERROR address=0x%016llx]\n", address); |
| 167 | break; |
| 168 | case EVENT_TYPE_CMD_HARD_ERR: |
| 169 | printk("COMMAND_HARDWARE_ERROR address=0x%016llx " |
| 170 | "flags=0x%04x]\n", address, flags); |
| 171 | break; |
| 172 | case EVENT_TYPE_IOTLB_INV_TO: |
| 173 | printk("IOTLB_INV_TIMEOUT device=%02x:%02x.%x " |
| 174 | "address=0x%016llx]\n", |
| 175 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 176 | address); |
| 177 | break; |
| 178 | case EVENT_TYPE_INV_DEV_REQ: |
| 179 | printk("INVALID_DEVICE_REQUEST device=%02x:%02x.%x " |
| 180 | "address=0x%016llx flags=0x%04x]\n", |
| 181 | PCI_BUS(devid), PCI_SLOT(devid), PCI_FUNC(devid), |
| 182 | address, flags); |
| 183 | break; |
| 184 | default: |
| 185 | printk(KERN_ERR "UNKNOWN type=0x%02x]\n", type); |
| 186 | } |
| 187 | } |
| 188 | |
| 189 | static void iommu_poll_events(struct amd_iommu *iommu) |
| 190 | { |
| 191 | u32 head, tail; |
| 192 | unsigned long flags; |
| 193 | |
| 194 | spin_lock_irqsave(&iommu->lock, flags); |
| 195 | |
| 196 | head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 197 | tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); |
| 198 | |
| 199 | while (head != tail) { |
| 200 | iommu_print_event(iommu->evt_buf + head); |
| 201 | head = (head + EVENT_ENTRY_SIZE) % iommu->evt_buf_size; |
| 202 | } |
| 203 | |
| 204 | writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); |
| 205 | |
| 206 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 207 | } |
| 208 | |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 209 | irqreturn_t amd_iommu_int_handler(int irq, void *data) |
| 210 | { |
Joerg Roedel | 90008ee | 2008-09-09 16:41:05 +0200 | [diff] [blame] | 211 | struct amd_iommu *iommu; |
| 212 | |
| 213 | list_for_each_entry(iommu, &amd_iommu_list, list) |
| 214 | iommu_poll_events(iommu); |
| 215 | |
| 216 | return IRQ_HANDLED; |
Joerg Roedel | a80dc3e | 2008-09-11 16:51:41 +0200 | [diff] [blame] | 217 | } |
| 218 | |
| 219 | /**************************************************************************** |
| 220 | * |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 221 | * IOMMU command queuing functions |
| 222 | * |
| 223 | ****************************************************************************/ |
| 224 | |
| 225 | /* |
| 226 | * Writes the command to the IOMMUs command buffer and informs the |
| 227 | * hardware about the new command. Must be called with iommu->lock held. |
| 228 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 229 | static int __iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 230 | { |
| 231 | u32 tail, head; |
| 232 | u8 *target; |
| 233 | |
| 234 | tail = readl(iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
Jiri Kosina | 8a7c5ef | 2008-08-19 02:13:55 +0200 | [diff] [blame] | 235 | target = iommu->cmd_buf + tail; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 236 | memcpy_toio(target, cmd, sizeof(*cmd)); |
| 237 | tail = (tail + sizeof(*cmd)) % iommu->cmd_buf_size; |
| 238 | head = readl(iommu->mmio_base + MMIO_CMD_HEAD_OFFSET); |
| 239 | if (tail == head) |
| 240 | return -ENOMEM; |
| 241 | writel(tail, iommu->mmio_base + MMIO_CMD_TAIL_OFFSET); |
| 242 | |
| 243 | return 0; |
| 244 | } |
| 245 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 246 | /* |
| 247 | * General queuing function for commands. Takes iommu->lock and calls |
| 248 | * __iommu_queue_command(). |
| 249 | */ |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 250 | static int iommu_queue_command(struct amd_iommu *iommu, struct iommu_cmd *cmd) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 251 | { |
| 252 | unsigned long flags; |
| 253 | int ret; |
| 254 | |
| 255 | spin_lock_irqsave(&iommu->lock, flags); |
| 256 | ret = __iommu_queue_command(iommu, cmd); |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 257 | if (!ret) |
Joerg Roedel | 0cfd7aa | 2008-12-10 19:58:00 +0100 | [diff] [blame] | 258 | iommu->need_sync = true; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 259 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 260 | |
| 261 | return ret; |
| 262 | } |
| 263 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 264 | /* |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 265 | * This function waits until an IOMMU has completed a completion |
| 266 | * wait command |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 267 | */ |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 268 | static void __iommu_wait_for_completion(struct amd_iommu *iommu) |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 269 | { |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 270 | int ready = 0; |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 271 | unsigned status = 0; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 272 | unsigned long i = 0; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 273 | |
Joerg Roedel | da49f6d | 2008-12-12 14:59:58 +0100 | [diff] [blame] | 274 | INC_STATS_COUNTER(compl_wait); |
| 275 | |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 276 | while (!ready && (i < EXIT_LOOP_COUNT)) { |
| 277 | ++i; |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 278 | /* wait for the bit to become one */ |
| 279 | status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 280 | ready = status & MMIO_STATUS_COM_WAIT_INT_MASK; |
Joerg Roedel | 136f78a | 2008-07-11 17:14:27 +0200 | [diff] [blame] | 281 | } |
| 282 | |
Joerg Roedel | 519c31b | 2008-08-14 19:55:15 +0200 | [diff] [blame] | 283 | /* set bit back to zero */ |
| 284 | status &= ~MMIO_STATUS_COM_WAIT_INT_MASK; |
| 285 | writel(status, iommu->mmio_base + MMIO_STATUS_OFFSET); |
| 286 | |
Joerg Roedel | 84df817 | 2008-12-17 16:36:44 +0100 | [diff] [blame] | 287 | if (unlikely(i == EXIT_LOOP_COUNT)) |
| 288 | panic("AMD IOMMU: Completion wait loop failed\n"); |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 289 | } |
| 290 | |
| 291 | /* |
| 292 | * This function queues a completion wait command into the command |
| 293 | * buffer of an IOMMU |
| 294 | */ |
| 295 | static int __iommu_completion_wait(struct amd_iommu *iommu) |
| 296 | { |
| 297 | struct iommu_cmd cmd; |
| 298 | |
| 299 | memset(&cmd, 0, sizeof(cmd)); |
| 300 | cmd.data[0] = CMD_COMPL_WAIT_INT_MASK; |
| 301 | CMD_SET_TYPE(&cmd, CMD_COMPL_WAIT); |
| 302 | |
| 303 | return __iommu_queue_command(iommu, &cmd); |
| 304 | } |
| 305 | |
| 306 | /* |
| 307 | * This function is called whenever we need to ensure that the IOMMU has |
| 308 | * completed execution of all commands we sent. It sends a |
| 309 | * COMPLETION_WAIT command and waits for it to finish. The IOMMU informs |
| 310 | * us about that by writing a value to a physical address we pass with |
| 311 | * the command. |
| 312 | */ |
| 313 | static int iommu_completion_wait(struct amd_iommu *iommu) |
| 314 | { |
| 315 | int ret = 0; |
| 316 | unsigned long flags; |
| 317 | |
| 318 | spin_lock_irqsave(&iommu->lock, flags); |
| 319 | |
| 320 | if (!iommu->need_sync) |
| 321 | goto out; |
| 322 | |
| 323 | ret = __iommu_completion_wait(iommu); |
| 324 | |
Joerg Roedel | 0cfd7aa | 2008-12-10 19:58:00 +0100 | [diff] [blame] | 325 | iommu->need_sync = false; |
Joerg Roedel | 8d20196 | 2008-12-02 20:34:41 +0100 | [diff] [blame] | 326 | |
| 327 | if (ret) |
| 328 | goto out; |
| 329 | |
| 330 | __iommu_wait_for_completion(iommu); |
Joerg Roedel | 84df817 | 2008-12-17 16:36:44 +0100 | [diff] [blame] | 331 | |
Joerg Roedel | 7e4f88d | 2008-09-17 14:19:15 +0200 | [diff] [blame] | 332 | out: |
| 333 | spin_unlock_irqrestore(&iommu->lock, flags); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 334 | |
| 335 | return 0; |
| 336 | } |
| 337 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 338 | /* |
| 339 | * Command send function for invalidating a device table entry |
| 340 | */ |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 341 | static int iommu_queue_inv_dev_entry(struct amd_iommu *iommu, u16 devid) |
| 342 | { |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 343 | struct iommu_cmd cmd; |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 344 | int ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 345 | |
| 346 | BUG_ON(iommu == NULL); |
| 347 | |
| 348 | memset(&cmd, 0, sizeof(cmd)); |
| 349 | CMD_SET_TYPE(&cmd, CMD_INV_DEV_ENTRY); |
| 350 | cmd.data[0] = devid; |
| 351 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 352 | ret = iommu_queue_command(iommu, &cmd); |
| 353 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 354 | return ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 355 | } |
| 356 | |
Joerg Roedel | 237b6f3 | 2008-12-02 20:54:37 +0100 | [diff] [blame] | 357 | static void __iommu_build_inv_iommu_pages(struct iommu_cmd *cmd, u64 address, |
| 358 | u16 domid, int pde, int s) |
| 359 | { |
| 360 | memset(cmd, 0, sizeof(*cmd)); |
| 361 | address &= PAGE_MASK; |
| 362 | CMD_SET_TYPE(cmd, CMD_INV_IOMMU_PAGES); |
| 363 | cmd->data[1] |= domid; |
| 364 | cmd->data[2] = lower_32_bits(address); |
| 365 | cmd->data[3] = upper_32_bits(address); |
| 366 | if (s) /* size bit - we flush more than one 4kb page */ |
| 367 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_SIZE_MASK; |
| 368 | if (pde) /* PDE bit - we wan't flush everything not only the PTEs */ |
| 369 | cmd->data[2] |= CMD_INV_IOMMU_PAGES_PDE_MASK; |
| 370 | } |
| 371 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 372 | /* |
| 373 | * Generic command send function for invalidaing TLB entries |
| 374 | */ |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 375 | static int iommu_queue_inv_iommu_pages(struct amd_iommu *iommu, |
| 376 | u64 address, u16 domid, int pde, int s) |
| 377 | { |
Joerg Roedel | d644953 | 2008-07-11 17:14:28 +0200 | [diff] [blame] | 378 | struct iommu_cmd cmd; |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 379 | int ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 380 | |
Joerg Roedel | 237b6f3 | 2008-12-02 20:54:37 +0100 | [diff] [blame] | 381 | __iommu_build_inv_iommu_pages(&cmd, address, domid, pde, s); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 382 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 383 | ret = iommu_queue_command(iommu, &cmd); |
| 384 | |
Joerg Roedel | ee2fa74 | 2008-09-17 13:47:25 +0200 | [diff] [blame] | 385 | return ret; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 386 | } |
| 387 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 388 | /* |
| 389 | * TLB invalidation function which is called from the mapping functions. |
| 390 | * It invalidates a single PTE if the range to flush is within a single |
| 391 | * page. Otherwise it flushes the whole TLB of the IOMMU. |
| 392 | */ |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 393 | static int iommu_flush_pages(struct amd_iommu *iommu, u16 domid, |
| 394 | u64 address, size_t size) |
| 395 | { |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 396 | int s = 0; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 397 | unsigned pages = iommu_num_pages(address, size, PAGE_SIZE); |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 398 | |
| 399 | address &= PAGE_MASK; |
| 400 | |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 401 | if (pages > 1) { |
| 402 | /* |
| 403 | * If we have to flush more than one page, flush all |
| 404 | * TLB entries for this domain |
| 405 | */ |
| 406 | address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 407 | s = 1; |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 408 | } |
| 409 | |
Joerg Roedel | 999ba41 | 2008-07-03 19:35:08 +0200 | [diff] [blame] | 410 | iommu_queue_inv_iommu_pages(iommu, address, domid, 0, s); |
| 411 | |
Joerg Roedel | a19ae1e | 2008-06-26 21:27:55 +0200 | [diff] [blame] | 412 | return 0; |
| 413 | } |
Joerg Roedel | b6c0271 | 2008-06-26 21:27:53 +0200 | [diff] [blame] | 414 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 415 | /* Flush the whole IO/TLB for a given protection domain */ |
| 416 | static void iommu_flush_tlb(struct amd_iommu *iommu, u16 domid) |
| 417 | { |
| 418 | u64 address = CMD_INV_IOMMU_ALL_PAGES_ADDRESS; |
| 419 | |
Joerg Roedel | f57d98a | 2008-12-12 15:46:29 +0100 | [diff] [blame] | 420 | INC_STATS_COUNTER(domain_flush_single); |
| 421 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 422 | iommu_queue_inv_iommu_pages(iommu, address, domid, 0, 1); |
| 423 | } |
| 424 | |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 425 | #ifdef CONFIG_IOMMU_API |
| 426 | /* |
| 427 | * This function is used to flush the IO/TLB for a given protection domain |
| 428 | * on every IOMMU in the system |
| 429 | */ |
| 430 | static void iommu_flush_domain(u16 domid) |
| 431 | { |
| 432 | unsigned long flags; |
| 433 | struct amd_iommu *iommu; |
| 434 | struct iommu_cmd cmd; |
| 435 | |
Joerg Roedel | 18811f5 | 2008-12-12 15:48:28 +0100 | [diff] [blame^] | 436 | INC_STATS_COUNTER(domain_flush_all); |
| 437 | |
Joerg Roedel | 43f4960 | 2008-12-02 21:01:12 +0100 | [diff] [blame] | 438 | __iommu_build_inv_iommu_pages(&cmd, CMD_INV_IOMMU_ALL_PAGES_ADDRESS, |
| 439 | domid, 1, 1); |
| 440 | |
| 441 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
| 442 | spin_lock_irqsave(&iommu->lock, flags); |
| 443 | __iommu_queue_command(iommu, &cmd); |
| 444 | __iommu_completion_wait(iommu); |
| 445 | __iommu_wait_for_completion(iommu); |
| 446 | spin_unlock_irqrestore(&iommu->lock, flags); |
| 447 | } |
| 448 | } |
| 449 | #endif |
| 450 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 451 | /**************************************************************************** |
| 452 | * |
| 453 | * The functions below are used the create the page table mappings for |
| 454 | * unity mapped regions. |
| 455 | * |
| 456 | ****************************************************************************/ |
| 457 | |
| 458 | /* |
| 459 | * Generic mapping functions. It maps a physical address into a DMA |
| 460 | * address space. It allocates the page table pages if necessary. |
| 461 | * In the future it can be extended to a generic mapping function |
| 462 | * supporting all features of AMD IOMMU page tables like level skipping |
| 463 | * and full 64 bit address spaces. |
| 464 | */ |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 465 | static int iommu_map_page(struct protection_domain *dom, |
| 466 | unsigned long bus_addr, |
| 467 | unsigned long phys_addr, |
| 468 | int prot) |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 469 | { |
| 470 | u64 __pte, *pte, *page; |
| 471 | |
| 472 | bus_addr = PAGE_ALIGN(bus_addr); |
Joerg Roedel | bb9d4ff | 2008-12-04 15:59:48 +0100 | [diff] [blame] | 473 | phys_addr = PAGE_ALIGN(phys_addr); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 474 | |
| 475 | /* only support 512GB address spaces for now */ |
| 476 | if (bus_addr > IOMMU_MAP_SIZE_L3 || !(prot & IOMMU_PROT_MASK)) |
| 477 | return -EINVAL; |
| 478 | |
| 479 | pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)]; |
| 480 | |
| 481 | if (!IOMMU_PTE_PRESENT(*pte)) { |
| 482 | page = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 483 | if (!page) |
| 484 | return -ENOMEM; |
| 485 | *pte = IOMMU_L2_PDE(virt_to_phys(page)); |
| 486 | } |
| 487 | |
| 488 | pte = IOMMU_PTE_PAGE(*pte); |
| 489 | pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)]; |
| 490 | |
| 491 | if (!IOMMU_PTE_PRESENT(*pte)) { |
| 492 | page = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 493 | if (!page) |
| 494 | return -ENOMEM; |
| 495 | *pte = IOMMU_L1_PDE(virt_to_phys(page)); |
| 496 | } |
| 497 | |
| 498 | pte = IOMMU_PTE_PAGE(*pte); |
| 499 | pte = &pte[IOMMU_PTE_L0_INDEX(bus_addr)]; |
| 500 | |
| 501 | if (IOMMU_PTE_PRESENT(*pte)) |
| 502 | return -EBUSY; |
| 503 | |
| 504 | __pte = phys_addr | IOMMU_PTE_P; |
| 505 | if (prot & IOMMU_PROT_IR) |
| 506 | __pte |= IOMMU_PTE_IR; |
| 507 | if (prot & IOMMU_PROT_IW) |
| 508 | __pte |= IOMMU_PTE_IW; |
| 509 | |
| 510 | *pte = __pte; |
| 511 | |
| 512 | return 0; |
| 513 | } |
| 514 | |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 515 | #ifdef CONFIG_IOMMU_API |
| 516 | static void iommu_unmap_page(struct protection_domain *dom, |
| 517 | unsigned long bus_addr) |
| 518 | { |
| 519 | u64 *pte; |
| 520 | |
| 521 | pte = &dom->pt_root[IOMMU_PTE_L2_INDEX(bus_addr)]; |
| 522 | |
| 523 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 524 | return; |
| 525 | |
| 526 | pte = IOMMU_PTE_PAGE(*pte); |
| 527 | pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)]; |
| 528 | |
| 529 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 530 | return; |
| 531 | |
| 532 | pte = IOMMU_PTE_PAGE(*pte); |
| 533 | pte = &pte[IOMMU_PTE_L1_INDEX(bus_addr)]; |
| 534 | |
| 535 | *pte = 0; |
| 536 | } |
| 537 | #endif |
| 538 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 539 | /* |
| 540 | * This function checks if a specific unity mapping entry is needed for |
| 541 | * this specific IOMMU. |
| 542 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 543 | static int iommu_for_unity_map(struct amd_iommu *iommu, |
| 544 | struct unity_map_entry *entry) |
| 545 | { |
| 546 | u16 bdf, i; |
| 547 | |
| 548 | for (i = entry->devid_start; i <= entry->devid_end; ++i) { |
| 549 | bdf = amd_iommu_alias_table[i]; |
| 550 | if (amd_iommu_rlookup_table[bdf] == iommu) |
| 551 | return 1; |
| 552 | } |
| 553 | |
| 554 | return 0; |
| 555 | } |
| 556 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 557 | /* |
| 558 | * Init the unity mappings for a specific IOMMU in the system |
| 559 | * |
| 560 | * Basically iterates over all unity mapping entries and applies them to |
| 561 | * the default domain DMA of that IOMMU if necessary. |
| 562 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 563 | static int iommu_init_unity_mappings(struct amd_iommu *iommu) |
| 564 | { |
| 565 | struct unity_map_entry *entry; |
| 566 | int ret; |
| 567 | |
| 568 | list_for_each_entry(entry, &amd_iommu_unity_map, list) { |
| 569 | if (!iommu_for_unity_map(iommu, entry)) |
| 570 | continue; |
| 571 | ret = dma_ops_unity_map(iommu->default_dom, entry); |
| 572 | if (ret) |
| 573 | return ret; |
| 574 | } |
| 575 | |
| 576 | return 0; |
| 577 | } |
| 578 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 579 | /* |
| 580 | * This function actually applies the mapping to the page table of the |
| 581 | * dma_ops domain. |
| 582 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 583 | static int dma_ops_unity_map(struct dma_ops_domain *dma_dom, |
| 584 | struct unity_map_entry *e) |
| 585 | { |
| 586 | u64 addr; |
| 587 | int ret; |
| 588 | |
| 589 | for (addr = e->address_start; addr < e->address_end; |
| 590 | addr += PAGE_SIZE) { |
Joerg Roedel | 38e817f | 2008-12-02 17:27:52 +0100 | [diff] [blame] | 591 | ret = iommu_map_page(&dma_dom->domain, addr, addr, e->prot); |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 592 | if (ret) |
| 593 | return ret; |
| 594 | /* |
| 595 | * if unity mapping is in aperture range mark the page |
| 596 | * as allocated in the aperture |
| 597 | */ |
| 598 | if (addr < dma_dom->aperture_size) |
| 599 | __set_bit(addr >> PAGE_SHIFT, dma_dom->bitmap); |
| 600 | } |
| 601 | |
| 602 | return 0; |
| 603 | } |
| 604 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 605 | /* |
| 606 | * Inits the unity mappings required for a specific device |
| 607 | */ |
Joerg Roedel | bd0e521 | 2008-06-26 21:27:56 +0200 | [diff] [blame] | 608 | static int init_unity_mappings_for_device(struct dma_ops_domain *dma_dom, |
| 609 | u16 devid) |
| 610 | { |
| 611 | struct unity_map_entry *e; |
| 612 | int ret; |
| 613 | |
| 614 | list_for_each_entry(e, &amd_iommu_unity_map, list) { |
| 615 | if (!(devid >= e->devid_start && devid <= e->devid_end)) |
| 616 | continue; |
| 617 | ret = dma_ops_unity_map(dma_dom, e); |
| 618 | if (ret) |
| 619 | return ret; |
| 620 | } |
| 621 | |
| 622 | return 0; |
| 623 | } |
| 624 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 625 | /**************************************************************************** |
| 626 | * |
| 627 | * The next functions belong to the address allocator for the dma_ops |
| 628 | * interface functions. They work like the allocators in the other IOMMU |
| 629 | * drivers. Its basically a bitmap which marks the allocated pages in |
| 630 | * the aperture. Maybe it could be enhanced in the future to a more |
| 631 | * efficient allocator. |
| 632 | * |
| 633 | ****************************************************************************/ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 634 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 635 | /* |
| 636 | * The address allocator core function. |
| 637 | * |
| 638 | * called with domain->lock held |
| 639 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 640 | static unsigned long dma_ops_alloc_addresses(struct device *dev, |
| 641 | struct dma_ops_domain *dom, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 642 | unsigned int pages, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 643 | unsigned long align_mask, |
| 644 | u64 dma_mask) |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 645 | { |
FUJITA Tomonori | 40becd8 | 2008-09-29 00:06:36 +0900 | [diff] [blame] | 646 | unsigned long limit; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 647 | unsigned long address; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 648 | unsigned long boundary_size; |
| 649 | |
| 650 | boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, |
| 651 | PAGE_SIZE) >> PAGE_SHIFT; |
FUJITA Tomonori | 40becd8 | 2008-09-29 00:06:36 +0900 | [diff] [blame] | 652 | limit = iommu_device_max_index(dom->aperture_size >> PAGE_SHIFT, 0, |
| 653 | dma_mask >> PAGE_SHIFT); |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 654 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 655 | if (dom->next_bit >= limit) { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 656 | dom->next_bit = 0; |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 657 | dom->need_flush = true; |
| 658 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 659 | |
| 660 | address = iommu_area_alloc(dom->bitmap, limit, dom->next_bit, pages, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 661 | 0 , boundary_size, align_mask); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 662 | if (address == -1) { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 663 | address = iommu_area_alloc(dom->bitmap, limit, 0, pages, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 664 | 0, boundary_size, align_mask); |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 665 | dom->need_flush = true; |
| 666 | } |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 667 | |
| 668 | if (likely(address != -1)) { |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 669 | dom->next_bit = address + pages; |
| 670 | address <<= PAGE_SHIFT; |
| 671 | } else |
| 672 | address = bad_dma_address; |
| 673 | |
| 674 | WARN_ON((address + (PAGE_SIZE*pages)) > dom->aperture_size); |
| 675 | |
| 676 | return address; |
| 677 | } |
| 678 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 679 | /* |
| 680 | * The address free function. |
| 681 | * |
| 682 | * called with domain->lock held |
| 683 | */ |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 684 | static void dma_ops_free_addresses(struct dma_ops_domain *dom, |
| 685 | unsigned long address, |
| 686 | unsigned int pages) |
| 687 | { |
| 688 | address >>= PAGE_SHIFT; |
| 689 | iommu_area_free(dom->bitmap, address, pages); |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 690 | |
Joerg Roedel | 8501c45 | 2008-11-17 19:11:46 +0100 | [diff] [blame] | 691 | if (address >= dom->next_bit) |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 692 | dom->need_flush = true; |
Joerg Roedel | d308644 | 2008-06-26 21:27:57 +0200 | [diff] [blame] | 693 | } |
| 694 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 695 | /**************************************************************************** |
| 696 | * |
| 697 | * The next functions belong to the domain allocation. A domain is |
| 698 | * allocated for every IOMMU as the default domain. If device isolation |
| 699 | * is enabled, every device get its own domain. The most important thing |
| 700 | * about domains is the page table mapping the DMA address space they |
| 701 | * contain. |
| 702 | * |
| 703 | ****************************************************************************/ |
| 704 | |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 705 | static u16 domain_id_alloc(void) |
| 706 | { |
| 707 | unsigned long flags; |
| 708 | int id; |
| 709 | |
| 710 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 711 | id = find_first_zero_bit(amd_iommu_pd_alloc_bitmap, MAX_DOMAIN_ID); |
| 712 | BUG_ON(id == 0); |
| 713 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 714 | __set_bit(id, amd_iommu_pd_alloc_bitmap); |
| 715 | else |
| 716 | id = 0; |
| 717 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 718 | |
| 719 | return id; |
| 720 | } |
| 721 | |
Joerg Roedel | a2acfb7 | 2008-12-02 18:28:53 +0100 | [diff] [blame] | 722 | #ifdef CONFIG_IOMMU_API |
| 723 | static void domain_id_free(int id) |
| 724 | { |
| 725 | unsigned long flags; |
| 726 | |
| 727 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 728 | if (id > 0 && id < MAX_DOMAIN_ID) |
| 729 | __clear_bit(id, amd_iommu_pd_alloc_bitmap); |
| 730 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 731 | } |
| 732 | #endif |
| 733 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 734 | /* |
| 735 | * Used to reserve address ranges in the aperture (e.g. for exclusion |
| 736 | * ranges. |
| 737 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 738 | static void dma_ops_reserve_addresses(struct dma_ops_domain *dom, |
| 739 | unsigned long start_page, |
| 740 | unsigned int pages) |
| 741 | { |
| 742 | unsigned int last_page = dom->aperture_size >> PAGE_SHIFT; |
| 743 | |
| 744 | if (start_page + pages > last_page) |
| 745 | pages = last_page - start_page; |
| 746 | |
FUJITA Tomonori | d26dbc5 | 2008-09-22 22:35:07 +0900 | [diff] [blame] | 747 | iommu_area_reserve(dom->bitmap, start_page, pages); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 748 | } |
| 749 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 750 | static void free_pagetable(struct protection_domain *domain) |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 751 | { |
| 752 | int i, j; |
| 753 | u64 *p1, *p2, *p3; |
| 754 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 755 | p1 = domain->pt_root; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 756 | |
| 757 | if (!p1) |
| 758 | return; |
| 759 | |
| 760 | for (i = 0; i < 512; ++i) { |
| 761 | if (!IOMMU_PTE_PRESENT(p1[i])) |
| 762 | continue; |
| 763 | |
| 764 | p2 = IOMMU_PTE_PAGE(p1[i]); |
Joerg Roedel | 3cc3d84 | 2008-12-04 16:44:31 +0100 | [diff] [blame] | 765 | for (j = 0; j < 512; ++j) { |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 766 | if (!IOMMU_PTE_PRESENT(p2[j])) |
| 767 | continue; |
| 768 | p3 = IOMMU_PTE_PAGE(p2[j]); |
| 769 | free_page((unsigned long)p3); |
| 770 | } |
| 771 | |
| 772 | free_page((unsigned long)p2); |
| 773 | } |
| 774 | |
| 775 | free_page((unsigned long)p1); |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 776 | |
| 777 | domain->pt_root = NULL; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 778 | } |
| 779 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 780 | /* |
| 781 | * Free a domain, only used if something went wrong in the |
| 782 | * allocation path and we need to free an already allocated page table |
| 783 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 784 | static void dma_ops_domain_free(struct dma_ops_domain *dom) |
| 785 | { |
| 786 | if (!dom) |
| 787 | return; |
| 788 | |
Joerg Roedel | 86db2e5 | 2008-12-02 18:20:21 +0100 | [diff] [blame] | 789 | free_pagetable(&dom->domain); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 790 | |
| 791 | kfree(dom->pte_pages); |
| 792 | |
| 793 | kfree(dom->bitmap); |
| 794 | |
| 795 | kfree(dom); |
| 796 | } |
| 797 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 798 | /* |
| 799 | * Allocates a new protection domain usable for the dma_ops functions. |
| 800 | * It also intializes the page table and the address allocator data |
| 801 | * structures required for the dma_ops interface |
| 802 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 803 | static struct dma_ops_domain *dma_ops_domain_alloc(struct amd_iommu *iommu, |
| 804 | unsigned order) |
| 805 | { |
| 806 | struct dma_ops_domain *dma_dom; |
| 807 | unsigned i, num_pte_pages; |
| 808 | u64 *l2_pde; |
| 809 | u64 address; |
| 810 | |
| 811 | /* |
| 812 | * Currently the DMA aperture must be between 32 MB and 1GB in size |
| 813 | */ |
| 814 | if ((order < 25) || (order > 30)) |
| 815 | return NULL; |
| 816 | |
| 817 | dma_dom = kzalloc(sizeof(struct dma_ops_domain), GFP_KERNEL); |
| 818 | if (!dma_dom) |
| 819 | return NULL; |
| 820 | |
| 821 | spin_lock_init(&dma_dom->domain.lock); |
| 822 | |
| 823 | dma_dom->domain.id = domain_id_alloc(); |
| 824 | if (dma_dom->domain.id == 0) |
| 825 | goto free_dma_dom; |
| 826 | dma_dom->domain.mode = PAGE_MODE_3_LEVEL; |
| 827 | dma_dom->domain.pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
Joerg Roedel | 9fdb19d | 2008-12-02 17:46:25 +0100 | [diff] [blame] | 828 | dma_dom->domain.flags = PD_DMA_OPS_MASK; |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 829 | dma_dom->domain.priv = dma_dom; |
| 830 | if (!dma_dom->domain.pt_root) |
| 831 | goto free_dma_dom; |
| 832 | dma_dom->aperture_size = (1ULL << order); |
| 833 | dma_dom->bitmap = kzalloc(dma_dom->aperture_size / (PAGE_SIZE * 8), |
| 834 | GFP_KERNEL); |
| 835 | if (!dma_dom->bitmap) |
| 836 | goto free_dma_dom; |
| 837 | /* |
| 838 | * mark the first page as allocated so we never return 0 as |
| 839 | * a valid dma-address. So we can use 0 as error value |
| 840 | */ |
| 841 | dma_dom->bitmap[0] = 1; |
| 842 | dma_dom->next_bit = 0; |
| 843 | |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 844 | dma_dom->need_flush = false; |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 845 | dma_dom->target_dev = 0xffff; |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 846 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 847 | /* Intialize the exclusion range if necessary */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 848 | if (iommu->exclusion_start && |
| 849 | iommu->exclusion_start < dma_dom->aperture_size) { |
| 850 | unsigned long startpage = iommu->exclusion_start >> PAGE_SHIFT; |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 851 | int pages = iommu_num_pages(iommu->exclusion_start, |
| 852 | iommu->exclusion_length, |
| 853 | PAGE_SIZE); |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 854 | dma_ops_reserve_addresses(dma_dom, startpage, pages); |
| 855 | } |
| 856 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 857 | /* |
| 858 | * At the last step, build the page tables so we don't need to |
| 859 | * allocate page table pages in the dma_ops mapping/unmapping |
| 860 | * path. |
| 861 | */ |
Joerg Roedel | ec487d1 | 2008-06-26 21:27:58 +0200 | [diff] [blame] | 862 | num_pte_pages = dma_dom->aperture_size / (PAGE_SIZE * 512); |
| 863 | dma_dom->pte_pages = kzalloc(num_pte_pages * sizeof(void *), |
| 864 | GFP_KERNEL); |
| 865 | if (!dma_dom->pte_pages) |
| 866 | goto free_dma_dom; |
| 867 | |
| 868 | l2_pde = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 869 | if (l2_pde == NULL) |
| 870 | goto free_dma_dom; |
| 871 | |
| 872 | dma_dom->domain.pt_root[0] = IOMMU_L2_PDE(virt_to_phys(l2_pde)); |
| 873 | |
| 874 | for (i = 0; i < num_pte_pages; ++i) { |
| 875 | dma_dom->pte_pages[i] = (u64 *)get_zeroed_page(GFP_KERNEL); |
| 876 | if (!dma_dom->pte_pages[i]) |
| 877 | goto free_dma_dom; |
| 878 | address = virt_to_phys(dma_dom->pte_pages[i]); |
| 879 | l2_pde[i] = IOMMU_L1_PDE(address); |
| 880 | } |
| 881 | |
| 882 | return dma_dom; |
| 883 | |
| 884 | free_dma_dom: |
| 885 | dma_ops_domain_free(dma_dom); |
| 886 | |
| 887 | return NULL; |
| 888 | } |
| 889 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 890 | /* |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 891 | * little helper function to check whether a given protection domain is a |
| 892 | * dma_ops domain |
| 893 | */ |
| 894 | static bool dma_ops_domain(struct protection_domain *domain) |
| 895 | { |
| 896 | return domain->flags & PD_DMA_OPS_MASK; |
| 897 | } |
| 898 | |
| 899 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 900 | * Find out the protection domain structure for a given PCI device. This |
| 901 | * will give us the pointer to the page table root for example. |
| 902 | */ |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 903 | static struct protection_domain *domain_for_device(u16 devid) |
| 904 | { |
| 905 | struct protection_domain *dom; |
| 906 | unsigned long flags; |
| 907 | |
| 908 | read_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 909 | dom = amd_iommu_pd_table[devid]; |
| 910 | read_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 911 | |
| 912 | return dom; |
| 913 | } |
| 914 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 915 | /* |
| 916 | * If a device is not yet associated with a domain, this function does |
| 917 | * assigns it visible for the hardware |
| 918 | */ |
Joerg Roedel | f1179dc | 2008-12-10 14:39:51 +0100 | [diff] [blame] | 919 | static void attach_device(struct amd_iommu *iommu, |
| 920 | struct protection_domain *domain, |
| 921 | u16 devid) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 922 | { |
| 923 | unsigned long flags; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 924 | u64 pte_root = virt_to_phys(domain->pt_root); |
| 925 | |
Joerg Roedel | 863c74e | 2008-12-02 17:56:36 +0100 | [diff] [blame] | 926 | domain->dev_cnt += 1; |
| 927 | |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 928 | pte_root |= (domain->mode & DEV_ENTRY_MODE_MASK) |
| 929 | << DEV_ENTRY_MODE_SHIFT; |
| 930 | pte_root |= IOMMU_PTE_IR | IOMMU_PTE_IW | IOMMU_PTE_P | IOMMU_PTE_TV; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 931 | |
| 932 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
Joerg Roedel | 38ddf41 | 2008-09-11 10:38:32 +0200 | [diff] [blame] | 933 | amd_iommu_dev_table[devid].data[0] = lower_32_bits(pte_root); |
| 934 | amd_iommu_dev_table[devid].data[1] = upper_32_bits(pte_root); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 935 | amd_iommu_dev_table[devid].data[2] = domain->id; |
| 936 | |
| 937 | amd_iommu_pd_table[devid] = domain; |
| 938 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 939 | |
| 940 | iommu_queue_inv_dev_entry(iommu, devid); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 941 | } |
| 942 | |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 943 | /* |
| 944 | * Removes a device from a protection domain (unlocked) |
| 945 | */ |
| 946 | static void __detach_device(struct protection_domain *domain, u16 devid) |
| 947 | { |
| 948 | |
| 949 | /* lock domain */ |
| 950 | spin_lock(&domain->lock); |
| 951 | |
| 952 | /* remove domain from the lookup table */ |
| 953 | amd_iommu_pd_table[devid] = NULL; |
| 954 | |
| 955 | /* remove entry from the device table seen by the hardware */ |
| 956 | amd_iommu_dev_table[devid].data[0] = IOMMU_PTE_P | IOMMU_PTE_TV; |
| 957 | amd_iommu_dev_table[devid].data[1] = 0; |
| 958 | amd_iommu_dev_table[devid].data[2] = 0; |
| 959 | |
| 960 | /* decrease reference counter */ |
| 961 | domain->dev_cnt -= 1; |
| 962 | |
| 963 | /* ready */ |
| 964 | spin_unlock(&domain->lock); |
| 965 | } |
| 966 | |
| 967 | /* |
| 968 | * Removes a device from a protection domain (with devtable_lock held) |
| 969 | */ |
| 970 | static void detach_device(struct protection_domain *domain, u16 devid) |
| 971 | { |
| 972 | unsigned long flags; |
| 973 | |
| 974 | /* lock device table */ |
| 975 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 976 | __detach_device(domain, devid); |
| 977 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 978 | } |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 979 | |
| 980 | static int device_change_notifier(struct notifier_block *nb, |
| 981 | unsigned long action, void *data) |
| 982 | { |
| 983 | struct device *dev = data; |
| 984 | struct pci_dev *pdev = to_pci_dev(dev); |
| 985 | u16 devid = calc_devid(pdev->bus->number, pdev->devfn); |
| 986 | struct protection_domain *domain; |
| 987 | struct dma_ops_domain *dma_domain; |
| 988 | struct amd_iommu *iommu; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 989 | int order = amd_iommu_aperture_order; |
| 990 | unsigned long flags; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 991 | |
| 992 | if (devid > amd_iommu_last_bdf) |
| 993 | goto out; |
| 994 | |
| 995 | devid = amd_iommu_alias_table[devid]; |
| 996 | |
| 997 | iommu = amd_iommu_rlookup_table[devid]; |
| 998 | if (iommu == NULL) |
| 999 | goto out; |
| 1000 | |
| 1001 | domain = domain_for_device(devid); |
| 1002 | |
| 1003 | if (domain && !dma_ops_domain(domain)) |
| 1004 | WARN_ONCE(1, "AMD IOMMU WARNING: device %s already bound " |
| 1005 | "to a non-dma-ops domain\n", dev_name(dev)); |
| 1006 | |
| 1007 | switch (action) { |
| 1008 | case BUS_NOTIFY_BOUND_DRIVER: |
| 1009 | if (domain) |
| 1010 | goto out; |
| 1011 | dma_domain = find_protection_domain(devid); |
| 1012 | if (!dma_domain) |
| 1013 | dma_domain = iommu->default_dom; |
| 1014 | attach_device(iommu, &dma_domain->domain, devid); |
| 1015 | printk(KERN_INFO "AMD IOMMU: Using protection domain %d for " |
| 1016 | "device %s\n", dma_domain->domain.id, dev_name(dev)); |
| 1017 | break; |
| 1018 | case BUS_NOTIFY_UNBIND_DRIVER: |
| 1019 | if (!domain) |
| 1020 | goto out; |
| 1021 | detach_device(domain, devid); |
| 1022 | break; |
Joerg Roedel | 1ac4cbb | 2008-12-10 19:33:26 +0100 | [diff] [blame] | 1023 | case BUS_NOTIFY_ADD_DEVICE: |
| 1024 | /* allocate a protection domain if a device is added */ |
| 1025 | dma_domain = find_protection_domain(devid); |
| 1026 | if (dma_domain) |
| 1027 | goto out; |
| 1028 | dma_domain = dma_ops_domain_alloc(iommu, order); |
| 1029 | if (!dma_domain) |
| 1030 | goto out; |
| 1031 | dma_domain->target_dev = devid; |
| 1032 | |
| 1033 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 1034 | list_add_tail(&dma_domain->list, &iommu_pd_list); |
| 1035 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 1036 | |
| 1037 | break; |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 1038 | default: |
| 1039 | goto out; |
| 1040 | } |
| 1041 | |
| 1042 | iommu_queue_inv_dev_entry(iommu, devid); |
| 1043 | iommu_completion_wait(iommu); |
| 1044 | |
| 1045 | out: |
| 1046 | return 0; |
| 1047 | } |
| 1048 | |
| 1049 | struct notifier_block device_nb = { |
| 1050 | .notifier_call = device_change_notifier, |
| 1051 | }; |
Joerg Roedel | 355bf55 | 2008-12-08 12:02:41 +0100 | [diff] [blame] | 1052 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1053 | /***************************************************************************** |
| 1054 | * |
| 1055 | * The next functions belong to the dma_ops mapping/unmapping code. |
| 1056 | * |
| 1057 | *****************************************************************************/ |
| 1058 | |
| 1059 | /* |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1060 | * This function checks if the driver got a valid device from the caller to |
| 1061 | * avoid dereferencing invalid pointers. |
| 1062 | */ |
| 1063 | static bool check_device(struct device *dev) |
| 1064 | { |
| 1065 | if (!dev || !dev->dma_mask) |
| 1066 | return false; |
| 1067 | |
| 1068 | return true; |
| 1069 | } |
| 1070 | |
| 1071 | /* |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1072 | * In this function the list of preallocated protection domains is traversed to |
| 1073 | * find the domain for a specific device |
| 1074 | */ |
| 1075 | static struct dma_ops_domain *find_protection_domain(u16 devid) |
| 1076 | { |
| 1077 | struct dma_ops_domain *entry, *ret = NULL; |
| 1078 | unsigned long flags; |
| 1079 | |
| 1080 | if (list_empty(&iommu_pd_list)) |
| 1081 | return NULL; |
| 1082 | |
| 1083 | spin_lock_irqsave(&iommu_pd_list_lock, flags); |
| 1084 | |
| 1085 | list_for_each_entry(entry, &iommu_pd_list, list) { |
| 1086 | if (entry->target_dev == devid) { |
| 1087 | ret = entry; |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1088 | break; |
| 1089 | } |
| 1090 | } |
| 1091 | |
| 1092 | spin_unlock_irqrestore(&iommu_pd_list_lock, flags); |
| 1093 | |
| 1094 | return ret; |
| 1095 | } |
| 1096 | |
| 1097 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1098 | * In the dma_ops path we only have the struct device. This function |
| 1099 | * finds the corresponding IOMMU, the protection domain and the |
| 1100 | * requestor id for a given device. |
| 1101 | * If the device is not yet associated with a domain this is also done |
| 1102 | * in this function. |
| 1103 | */ |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1104 | static int get_device_resources(struct device *dev, |
| 1105 | struct amd_iommu **iommu, |
| 1106 | struct protection_domain **domain, |
| 1107 | u16 *bdf) |
| 1108 | { |
| 1109 | struct dma_ops_domain *dma_dom; |
| 1110 | struct pci_dev *pcidev; |
| 1111 | u16 _bdf; |
| 1112 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1113 | *iommu = NULL; |
| 1114 | *domain = NULL; |
| 1115 | *bdf = 0xffff; |
| 1116 | |
| 1117 | if (dev->bus != &pci_bus_type) |
| 1118 | return 0; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1119 | |
| 1120 | pcidev = to_pci_dev(dev); |
Joerg Roedel | d591b0a | 2008-07-11 17:14:35 +0200 | [diff] [blame] | 1121 | _bdf = calc_devid(pcidev->bus->number, pcidev->devfn); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1122 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1123 | /* device not translated by any IOMMU in the system? */ |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1124 | if (_bdf > amd_iommu_last_bdf) |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1125 | return 0; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1126 | |
| 1127 | *bdf = amd_iommu_alias_table[_bdf]; |
| 1128 | |
| 1129 | *iommu = amd_iommu_rlookup_table[*bdf]; |
| 1130 | if (*iommu == NULL) |
| 1131 | return 0; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1132 | *domain = domain_for_device(*bdf); |
| 1133 | if (*domain == NULL) { |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1134 | dma_dom = find_protection_domain(*bdf); |
| 1135 | if (!dma_dom) |
| 1136 | dma_dom = (*iommu)->default_dom; |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1137 | *domain = &dma_dom->domain; |
Joerg Roedel | f1179dc | 2008-12-10 14:39:51 +0100 | [diff] [blame] | 1138 | attach_device(*iommu, *domain, *bdf); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1139 | printk(KERN_INFO "AMD IOMMU: Using protection domain %d for " |
Joerg Roedel | ab89672 | 2008-12-10 19:43:07 +0100 | [diff] [blame] | 1140 | "device %s\n", (*domain)->id, dev_name(dev)); |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1141 | } |
| 1142 | |
Joerg Roedel | f91ba19 | 2008-11-25 12:56:12 +0100 | [diff] [blame] | 1143 | if (domain_for_device(_bdf) == NULL) |
Joerg Roedel | f1179dc | 2008-12-10 14:39:51 +0100 | [diff] [blame] | 1144 | attach_device(*iommu, *domain, _bdf); |
Joerg Roedel | f91ba19 | 2008-11-25 12:56:12 +0100 | [diff] [blame] | 1145 | |
Joerg Roedel | b20ac0d | 2008-06-26 21:27:59 +0200 | [diff] [blame] | 1146 | return 1; |
| 1147 | } |
| 1148 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1149 | /* |
| 1150 | * This is the generic map function. It maps one 4kb page at paddr to |
| 1151 | * the given address in the DMA address space for the domain. |
| 1152 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1153 | static dma_addr_t dma_ops_domain_map(struct amd_iommu *iommu, |
| 1154 | struct dma_ops_domain *dom, |
| 1155 | unsigned long address, |
| 1156 | phys_addr_t paddr, |
| 1157 | int direction) |
| 1158 | { |
| 1159 | u64 *pte, __pte; |
| 1160 | |
| 1161 | WARN_ON(address > dom->aperture_size); |
| 1162 | |
| 1163 | paddr &= PAGE_MASK; |
| 1164 | |
| 1165 | pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; |
| 1166 | pte += IOMMU_PTE_L0_INDEX(address); |
| 1167 | |
| 1168 | __pte = paddr | IOMMU_PTE_P | IOMMU_PTE_FC; |
| 1169 | |
| 1170 | if (direction == DMA_TO_DEVICE) |
| 1171 | __pte |= IOMMU_PTE_IR; |
| 1172 | else if (direction == DMA_FROM_DEVICE) |
| 1173 | __pte |= IOMMU_PTE_IW; |
| 1174 | else if (direction == DMA_BIDIRECTIONAL) |
| 1175 | __pte |= IOMMU_PTE_IR | IOMMU_PTE_IW; |
| 1176 | |
| 1177 | WARN_ON(*pte); |
| 1178 | |
| 1179 | *pte = __pte; |
| 1180 | |
| 1181 | return (dma_addr_t)address; |
| 1182 | } |
| 1183 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1184 | /* |
| 1185 | * The generic unmapping function for on page in the DMA address space. |
| 1186 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1187 | static void dma_ops_domain_unmap(struct amd_iommu *iommu, |
| 1188 | struct dma_ops_domain *dom, |
| 1189 | unsigned long address) |
| 1190 | { |
| 1191 | u64 *pte; |
| 1192 | |
| 1193 | if (address >= dom->aperture_size) |
| 1194 | return; |
| 1195 | |
Joerg Roedel | 8ad909c | 2008-12-08 14:37:20 +0100 | [diff] [blame] | 1196 | WARN_ON(address & ~PAGE_MASK || address >= dom->aperture_size); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1197 | |
| 1198 | pte = dom->pte_pages[IOMMU_PTE_L1_INDEX(address)]; |
| 1199 | pte += IOMMU_PTE_L0_INDEX(address); |
| 1200 | |
| 1201 | WARN_ON(!*pte); |
| 1202 | |
| 1203 | *pte = 0ULL; |
| 1204 | } |
| 1205 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1206 | /* |
| 1207 | * This function contains common code for mapping of a physically |
Joerg Roedel | 24f8116 | 2008-12-08 14:25:39 +0100 | [diff] [blame] | 1208 | * contiguous memory region into DMA address space. It is used by all |
| 1209 | * mapping functions provided with this IOMMU driver. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1210 | * Must be called with the domain lock held. |
| 1211 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1212 | static dma_addr_t __map_single(struct device *dev, |
| 1213 | struct amd_iommu *iommu, |
| 1214 | struct dma_ops_domain *dma_dom, |
| 1215 | phys_addr_t paddr, |
| 1216 | size_t size, |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1217 | int dir, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1218 | bool align, |
| 1219 | u64 dma_mask) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1220 | { |
| 1221 | dma_addr_t offset = paddr & ~PAGE_MASK; |
| 1222 | dma_addr_t address, start; |
| 1223 | unsigned int pages; |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1224 | unsigned long align_mask = 0; |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1225 | int i; |
| 1226 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 1227 | pages = iommu_num_pages(paddr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1228 | paddr &= PAGE_MASK; |
| 1229 | |
Joerg Roedel | c185897 | 2008-12-12 15:42:39 +0100 | [diff] [blame] | 1230 | if (pages > 1) |
| 1231 | INC_STATS_COUNTER(cross_page); |
| 1232 | |
Joerg Roedel | 6d4f343 | 2008-09-04 19:18:02 +0200 | [diff] [blame] | 1233 | if (align) |
| 1234 | align_mask = (1UL << get_order(size)) - 1; |
| 1235 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1236 | address = dma_ops_alloc_addresses(dev, dma_dom, pages, align_mask, |
| 1237 | dma_mask); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1238 | if (unlikely(address == bad_dma_address)) |
| 1239 | goto out; |
| 1240 | |
| 1241 | start = address; |
| 1242 | for (i = 0; i < pages; ++i) { |
| 1243 | dma_ops_domain_map(iommu, dma_dom, start, paddr, dir); |
| 1244 | paddr += PAGE_SIZE; |
| 1245 | start += PAGE_SIZE; |
| 1246 | } |
| 1247 | address += offset; |
| 1248 | |
FUJITA Tomonori | afa9fdc | 2008-09-20 01:23:30 +0900 | [diff] [blame] | 1249 | if (unlikely(dma_dom->need_flush && !amd_iommu_unmap_flush)) { |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1250 | iommu_flush_tlb(iommu, dma_dom->domain.id); |
| 1251 | dma_dom->need_flush = false; |
| 1252 | } else if (unlikely(iommu_has_npcache(iommu))) |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 1253 | iommu_flush_pages(iommu, dma_dom->domain.id, address, size); |
| 1254 | |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1255 | out: |
| 1256 | return address; |
| 1257 | } |
| 1258 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1259 | /* |
| 1260 | * Does the reverse of the __map_single function. Must be called with |
| 1261 | * the domain lock held too |
| 1262 | */ |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1263 | static void __unmap_single(struct amd_iommu *iommu, |
| 1264 | struct dma_ops_domain *dma_dom, |
| 1265 | dma_addr_t dma_addr, |
| 1266 | size_t size, |
| 1267 | int dir) |
| 1268 | { |
| 1269 | dma_addr_t i, start; |
| 1270 | unsigned int pages; |
| 1271 | |
Joerg Roedel | b8d9905 | 2008-12-08 14:40:26 +0100 | [diff] [blame] | 1272 | if ((dma_addr == bad_dma_address) || |
| 1273 | (dma_addr + size > dma_dom->aperture_size)) |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1274 | return; |
| 1275 | |
Joerg Roedel | e3c449f | 2008-10-15 22:02:11 -0700 | [diff] [blame] | 1276 | pages = iommu_num_pages(dma_addr, size, PAGE_SIZE); |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1277 | dma_addr &= PAGE_MASK; |
| 1278 | start = dma_addr; |
| 1279 | |
| 1280 | for (i = 0; i < pages; ++i) { |
| 1281 | dma_ops_domain_unmap(iommu, dma_dom, start); |
| 1282 | start += PAGE_SIZE; |
| 1283 | } |
| 1284 | |
| 1285 | dma_ops_free_addresses(dma_dom, dma_addr, pages); |
Joerg Roedel | 270cab24 | 2008-09-04 15:49:46 +0200 | [diff] [blame] | 1286 | |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1287 | if (amd_iommu_unmap_flush || dma_dom->need_flush) { |
Joerg Roedel | 1c65577 | 2008-09-04 18:40:05 +0200 | [diff] [blame] | 1288 | iommu_flush_pages(iommu, dma_dom->domain.id, dma_addr, size); |
Joerg Roedel | 80be308 | 2008-11-06 14:59:05 +0100 | [diff] [blame] | 1289 | dma_dom->need_flush = false; |
| 1290 | } |
Joerg Roedel | cb76c32 | 2008-06-26 21:28:00 +0200 | [diff] [blame] | 1291 | } |
| 1292 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1293 | /* |
| 1294 | * The exported map_single function for dma_ops. |
| 1295 | */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1296 | static dma_addr_t map_single(struct device *dev, phys_addr_t paddr, |
| 1297 | size_t size, int dir) |
| 1298 | { |
| 1299 | unsigned long flags; |
| 1300 | struct amd_iommu *iommu; |
| 1301 | struct protection_domain *domain; |
| 1302 | u16 devid; |
| 1303 | dma_addr_t addr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1304 | u64 dma_mask; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1305 | |
Joerg Roedel | 0f2a86f | 2008-12-12 15:05:16 +0100 | [diff] [blame] | 1306 | INC_STATS_COUNTER(cnt_map_single); |
| 1307 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1308 | if (!check_device(dev)) |
| 1309 | return bad_dma_address; |
| 1310 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1311 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1312 | |
| 1313 | get_device_resources(dev, &iommu, &domain, &devid); |
| 1314 | |
| 1315 | if (iommu == NULL || domain == NULL) |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1316 | /* device not handled by any AMD IOMMU */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1317 | return (dma_addr_t)paddr; |
| 1318 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1319 | if (!dma_ops_domain(domain)) |
| 1320 | return bad_dma_address; |
| 1321 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1322 | spin_lock_irqsave(&domain->lock, flags); |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1323 | addr = __map_single(dev, iommu, domain->priv, paddr, size, dir, false, |
| 1324 | dma_mask); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1325 | if (addr == bad_dma_address) |
| 1326 | goto out; |
| 1327 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1328 | iommu_completion_wait(iommu); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1329 | |
| 1330 | out: |
| 1331 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1332 | |
| 1333 | return addr; |
| 1334 | } |
| 1335 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1336 | /* |
| 1337 | * The exported unmap_single function for dma_ops. |
| 1338 | */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1339 | static void unmap_single(struct device *dev, dma_addr_t dma_addr, |
| 1340 | size_t size, int dir) |
| 1341 | { |
| 1342 | unsigned long flags; |
| 1343 | struct amd_iommu *iommu; |
| 1344 | struct protection_domain *domain; |
| 1345 | u16 devid; |
| 1346 | |
Joerg Roedel | 146a691 | 2008-12-12 15:07:12 +0100 | [diff] [blame] | 1347 | INC_STATS_COUNTER(cnt_unmap_single); |
| 1348 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1349 | if (!check_device(dev) || |
| 1350 | !get_device_resources(dev, &iommu, &domain, &devid)) |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1351 | /* device not handled by any AMD IOMMU */ |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1352 | return; |
| 1353 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1354 | if (!dma_ops_domain(domain)) |
| 1355 | return; |
| 1356 | |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1357 | spin_lock_irqsave(&domain->lock, flags); |
| 1358 | |
| 1359 | __unmap_single(iommu, domain->priv, dma_addr, size, dir); |
| 1360 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1361 | iommu_completion_wait(iommu); |
Joerg Roedel | 4da70b9 | 2008-06-26 21:28:01 +0200 | [diff] [blame] | 1362 | |
| 1363 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1364 | } |
| 1365 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1366 | /* |
| 1367 | * This is a special map_sg function which is used if we should map a |
| 1368 | * device which is not handled by an AMD IOMMU in the system. |
| 1369 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1370 | static int map_sg_no_iommu(struct device *dev, struct scatterlist *sglist, |
| 1371 | int nelems, int dir) |
| 1372 | { |
| 1373 | struct scatterlist *s; |
| 1374 | int i; |
| 1375 | |
| 1376 | for_each_sg(sglist, s, nelems, i) { |
| 1377 | s->dma_address = (dma_addr_t)sg_phys(s); |
| 1378 | s->dma_length = s->length; |
| 1379 | } |
| 1380 | |
| 1381 | return nelems; |
| 1382 | } |
| 1383 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1384 | /* |
| 1385 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 1386 | * lists). |
| 1387 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1388 | static int map_sg(struct device *dev, struct scatterlist *sglist, |
| 1389 | int nelems, int dir) |
| 1390 | { |
| 1391 | unsigned long flags; |
| 1392 | struct amd_iommu *iommu; |
| 1393 | struct protection_domain *domain; |
| 1394 | u16 devid; |
| 1395 | int i; |
| 1396 | struct scatterlist *s; |
| 1397 | phys_addr_t paddr; |
| 1398 | int mapped_elems = 0; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1399 | u64 dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1400 | |
Joerg Roedel | d03f067a | 2008-12-12 15:09:48 +0100 | [diff] [blame] | 1401 | INC_STATS_COUNTER(cnt_map_sg); |
| 1402 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1403 | if (!check_device(dev)) |
| 1404 | return 0; |
| 1405 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1406 | dma_mask = *dev->dma_mask; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1407 | |
| 1408 | get_device_resources(dev, &iommu, &domain, &devid); |
| 1409 | |
| 1410 | if (!iommu || !domain) |
| 1411 | return map_sg_no_iommu(dev, sglist, nelems, dir); |
| 1412 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1413 | if (!dma_ops_domain(domain)) |
| 1414 | return 0; |
| 1415 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1416 | spin_lock_irqsave(&domain->lock, flags); |
| 1417 | |
| 1418 | for_each_sg(sglist, s, nelems, i) { |
| 1419 | paddr = sg_phys(s); |
| 1420 | |
| 1421 | s->dma_address = __map_single(dev, iommu, domain->priv, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1422 | paddr, s->length, dir, false, |
| 1423 | dma_mask); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1424 | |
| 1425 | if (s->dma_address) { |
| 1426 | s->dma_length = s->length; |
| 1427 | mapped_elems++; |
| 1428 | } else |
| 1429 | goto unmap; |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1430 | } |
| 1431 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1432 | iommu_completion_wait(iommu); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1433 | |
| 1434 | out: |
| 1435 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1436 | |
| 1437 | return mapped_elems; |
| 1438 | unmap: |
| 1439 | for_each_sg(sglist, s, mapped_elems, i) { |
| 1440 | if (s->dma_address) |
| 1441 | __unmap_single(iommu, domain->priv, s->dma_address, |
| 1442 | s->dma_length, dir); |
| 1443 | s->dma_address = s->dma_length = 0; |
| 1444 | } |
| 1445 | |
| 1446 | mapped_elems = 0; |
| 1447 | |
| 1448 | goto out; |
| 1449 | } |
| 1450 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1451 | /* |
| 1452 | * The exported map_sg function for dma_ops (handles scatter-gather |
| 1453 | * lists). |
| 1454 | */ |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1455 | static void unmap_sg(struct device *dev, struct scatterlist *sglist, |
| 1456 | int nelems, int dir) |
| 1457 | { |
| 1458 | unsigned long flags; |
| 1459 | struct amd_iommu *iommu; |
| 1460 | struct protection_domain *domain; |
| 1461 | struct scatterlist *s; |
| 1462 | u16 devid; |
| 1463 | int i; |
| 1464 | |
Joerg Roedel | 55877a6 | 2008-12-12 15:12:14 +0100 | [diff] [blame] | 1465 | INC_STATS_COUNTER(cnt_unmap_sg); |
| 1466 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1467 | if (!check_device(dev) || |
| 1468 | !get_device_resources(dev, &iommu, &domain, &devid)) |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1469 | return; |
| 1470 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1471 | if (!dma_ops_domain(domain)) |
| 1472 | return; |
| 1473 | |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1474 | spin_lock_irqsave(&domain->lock, flags); |
| 1475 | |
| 1476 | for_each_sg(sglist, s, nelems, i) { |
| 1477 | __unmap_single(iommu, domain->priv, s->dma_address, |
| 1478 | s->dma_length, dir); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1479 | s->dma_address = s->dma_length = 0; |
| 1480 | } |
| 1481 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1482 | iommu_completion_wait(iommu); |
Joerg Roedel | 65b050a | 2008-06-26 21:28:02 +0200 | [diff] [blame] | 1483 | |
| 1484 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1485 | } |
| 1486 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1487 | /* |
| 1488 | * The exported alloc_coherent function for dma_ops. |
| 1489 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1490 | static void *alloc_coherent(struct device *dev, size_t size, |
| 1491 | dma_addr_t *dma_addr, gfp_t flag) |
| 1492 | { |
| 1493 | unsigned long flags; |
| 1494 | void *virt_addr; |
| 1495 | struct amd_iommu *iommu; |
| 1496 | struct protection_domain *domain; |
| 1497 | u16 devid; |
| 1498 | phys_addr_t paddr; |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1499 | u64 dma_mask = dev->coherent_dma_mask; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1500 | |
Joerg Roedel | c8f0fb3 | 2008-12-12 15:14:21 +0100 | [diff] [blame] | 1501 | INC_STATS_COUNTER(cnt_alloc_coherent); |
| 1502 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1503 | if (!check_device(dev)) |
| 1504 | return NULL; |
| 1505 | |
FUJITA Tomonori | 13d9fea | 2008-09-10 20:19:40 +0900 | [diff] [blame] | 1506 | if (!get_device_resources(dev, &iommu, &domain, &devid)) |
| 1507 | flag &= ~(__GFP_DMA | __GFP_HIGHMEM | __GFP_DMA32); |
| 1508 | |
Joerg Roedel | c97ac53 | 2008-09-11 10:59:15 +0200 | [diff] [blame] | 1509 | flag |= __GFP_ZERO; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1510 | virt_addr = (void *)__get_free_pages(flag, get_order(size)); |
| 1511 | if (!virt_addr) |
| 1512 | return 0; |
| 1513 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1514 | paddr = virt_to_phys(virt_addr); |
| 1515 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1516 | if (!iommu || !domain) { |
| 1517 | *dma_addr = (dma_addr_t)paddr; |
| 1518 | return virt_addr; |
| 1519 | } |
| 1520 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1521 | if (!dma_ops_domain(domain)) |
| 1522 | goto out_free; |
| 1523 | |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1524 | if (!dma_mask) |
| 1525 | dma_mask = *dev->dma_mask; |
| 1526 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1527 | spin_lock_irqsave(&domain->lock, flags); |
| 1528 | |
| 1529 | *dma_addr = __map_single(dev, iommu, domain->priv, paddr, |
Joerg Roedel | 832a90c | 2008-09-18 15:54:23 +0200 | [diff] [blame] | 1530 | size, DMA_BIDIRECTIONAL, true, dma_mask); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1531 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1532 | if (*dma_addr == bad_dma_address) |
| 1533 | goto out_free; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1534 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1535 | iommu_completion_wait(iommu); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1536 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1537 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1538 | |
| 1539 | return virt_addr; |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1540 | |
| 1541 | out_free: |
| 1542 | |
| 1543 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 1544 | |
| 1545 | return NULL; |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1546 | } |
| 1547 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1548 | /* |
| 1549 | * The exported free_coherent function for dma_ops. |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1550 | */ |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1551 | static void free_coherent(struct device *dev, size_t size, |
| 1552 | void *virt_addr, dma_addr_t dma_addr) |
| 1553 | { |
| 1554 | unsigned long flags; |
| 1555 | struct amd_iommu *iommu; |
| 1556 | struct protection_domain *domain; |
| 1557 | u16 devid; |
| 1558 | |
Joerg Roedel | 5d31ee7 | 2008-12-12 15:16:38 +0100 | [diff] [blame] | 1559 | INC_STATS_COUNTER(cnt_free_coherent); |
| 1560 | |
Joerg Roedel | dbcc112 | 2008-09-04 15:04:26 +0200 | [diff] [blame] | 1561 | if (!check_device(dev)) |
| 1562 | return; |
| 1563 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1564 | get_device_resources(dev, &iommu, &domain, &devid); |
| 1565 | |
| 1566 | if (!iommu || !domain) |
| 1567 | goto free_mem; |
| 1568 | |
Joerg Roedel | 5b28df6 | 2008-12-02 17:49:42 +0100 | [diff] [blame] | 1569 | if (!dma_ops_domain(domain)) |
| 1570 | goto free_mem; |
| 1571 | |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1572 | spin_lock_irqsave(&domain->lock, flags); |
| 1573 | |
| 1574 | __unmap_single(iommu, domain->priv, dma_addr, size, DMA_BIDIRECTIONAL); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1575 | |
Joerg Roedel | 09ee17e | 2008-12-03 12:19:27 +0100 | [diff] [blame] | 1576 | iommu_completion_wait(iommu); |
Joerg Roedel | 5d8b53c | 2008-06-26 21:28:03 +0200 | [diff] [blame] | 1577 | |
| 1578 | spin_unlock_irqrestore(&domain->lock, flags); |
| 1579 | |
| 1580 | free_mem: |
| 1581 | free_pages((unsigned long)virt_addr, get_order(size)); |
| 1582 | } |
| 1583 | |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1584 | /* |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 1585 | * This function is called by the DMA layer to find out if we can handle a |
| 1586 | * particular device. It is part of the dma_ops. |
| 1587 | */ |
| 1588 | static int amd_iommu_dma_supported(struct device *dev, u64 mask) |
| 1589 | { |
| 1590 | u16 bdf; |
| 1591 | struct pci_dev *pcidev; |
| 1592 | |
| 1593 | /* No device or no PCI device */ |
| 1594 | if (!dev || dev->bus != &pci_bus_type) |
| 1595 | return 0; |
| 1596 | |
| 1597 | pcidev = to_pci_dev(dev); |
| 1598 | |
| 1599 | bdf = calc_devid(pcidev->bus->number, pcidev->devfn); |
| 1600 | |
| 1601 | /* Out of our scope? */ |
| 1602 | if (bdf > amd_iommu_last_bdf) |
| 1603 | return 0; |
| 1604 | |
| 1605 | return 1; |
| 1606 | } |
| 1607 | |
| 1608 | /* |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1609 | * The function for pre-allocating protection domains. |
| 1610 | * |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1611 | * If the driver core informs the DMA layer if a driver grabs a device |
| 1612 | * we don't need to preallocate the protection domains anymore. |
| 1613 | * For now we have to. |
| 1614 | */ |
| 1615 | void prealloc_protection_domains(void) |
| 1616 | { |
| 1617 | struct pci_dev *dev = NULL; |
| 1618 | struct dma_ops_domain *dma_dom; |
| 1619 | struct amd_iommu *iommu; |
| 1620 | int order = amd_iommu_aperture_order; |
| 1621 | u16 devid; |
| 1622 | |
| 1623 | while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) { |
Joerg Roedel | edcb34d | 2008-12-10 20:01:45 +0100 | [diff] [blame] | 1624 | devid = calc_devid(dev->bus->number, dev->devfn); |
Joerg Roedel | 3a61ec3 | 2008-07-25 13:07:50 +0200 | [diff] [blame] | 1625 | if (devid > amd_iommu_last_bdf) |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1626 | continue; |
| 1627 | devid = amd_iommu_alias_table[devid]; |
| 1628 | if (domain_for_device(devid)) |
| 1629 | continue; |
| 1630 | iommu = amd_iommu_rlookup_table[devid]; |
| 1631 | if (!iommu) |
| 1632 | continue; |
| 1633 | dma_dom = dma_ops_domain_alloc(iommu, order); |
| 1634 | if (!dma_dom) |
| 1635 | continue; |
| 1636 | init_unity_mappings_for_device(dma_dom, devid); |
Joerg Roedel | bd60b73 | 2008-09-11 10:24:48 +0200 | [diff] [blame] | 1637 | dma_dom->target_dev = devid; |
| 1638 | |
| 1639 | list_add_tail(&dma_dom->list, &iommu_pd_list); |
Joerg Roedel | c432f3d | 2008-06-26 21:28:04 +0200 | [diff] [blame] | 1640 | } |
| 1641 | } |
| 1642 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1643 | static struct dma_mapping_ops amd_iommu_dma_ops = { |
| 1644 | .alloc_coherent = alloc_coherent, |
| 1645 | .free_coherent = free_coherent, |
| 1646 | .map_single = map_single, |
| 1647 | .unmap_single = unmap_single, |
| 1648 | .map_sg = map_sg, |
| 1649 | .unmap_sg = unmap_sg, |
Joerg Roedel | b39ba6a | 2008-09-09 18:40:46 +0200 | [diff] [blame] | 1650 | .dma_supported = amd_iommu_dma_supported, |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1651 | }; |
| 1652 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1653 | /* |
| 1654 | * The function which clues the AMD IOMMU driver into dma_ops. |
| 1655 | */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1656 | int __init amd_iommu_init_dma_ops(void) |
| 1657 | { |
| 1658 | struct amd_iommu *iommu; |
| 1659 | int order = amd_iommu_aperture_order; |
| 1660 | int ret; |
| 1661 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1662 | /* |
| 1663 | * first allocate a default protection domain for every IOMMU we |
| 1664 | * found in the system. Devices not assigned to any other |
| 1665 | * protection domain will be assigned to the default one. |
| 1666 | */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1667 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
| 1668 | iommu->default_dom = dma_ops_domain_alloc(iommu, order); |
| 1669 | if (iommu->default_dom == NULL) |
| 1670 | return -ENOMEM; |
Joerg Roedel | e2dc14a | 2008-12-10 18:48:59 +0100 | [diff] [blame] | 1671 | iommu->default_dom->domain.flags |= PD_DEFAULT_MASK; |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1672 | ret = iommu_init_unity_mappings(iommu); |
| 1673 | if (ret) |
| 1674 | goto free_domains; |
| 1675 | } |
| 1676 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1677 | /* |
| 1678 | * If device isolation is enabled, pre-allocate the protection |
| 1679 | * domains for each device. |
| 1680 | */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1681 | if (amd_iommu_isolate) |
| 1682 | prealloc_protection_domains(); |
| 1683 | |
| 1684 | iommu_detected = 1; |
| 1685 | force_iommu = 1; |
| 1686 | bad_dma_address = 0; |
Ingo Molnar | 92af4e2 | 2008-06-27 10:48:16 +0200 | [diff] [blame] | 1687 | #ifdef CONFIG_GART_IOMMU |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1688 | gart_iommu_aperture_disabled = 1; |
| 1689 | gart_iommu_aperture = 0; |
Ingo Molnar | 92af4e2 | 2008-06-27 10:48:16 +0200 | [diff] [blame] | 1690 | #endif |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1691 | |
Joerg Roedel | 431b2a2 | 2008-07-11 17:14:22 +0200 | [diff] [blame] | 1692 | /* Make the driver finally visible to the drivers */ |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1693 | dma_ops = &amd_iommu_dma_ops; |
| 1694 | |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 1695 | #ifdef CONFIG_IOMMU_API |
| 1696 | register_iommu(&amd_iommu_ops); |
| 1697 | #endif |
| 1698 | |
Joerg Roedel | e275a2a | 2008-12-10 18:27:25 +0100 | [diff] [blame] | 1699 | bus_register_notifier(&pci_bus_type, &device_nb); |
| 1700 | |
Joerg Roedel | 7f26508 | 2008-12-12 13:50:21 +0100 | [diff] [blame] | 1701 | amd_iommu_stats_init(); |
| 1702 | |
Joerg Roedel | 6631ee9 | 2008-06-26 21:28:05 +0200 | [diff] [blame] | 1703 | return 0; |
| 1704 | |
| 1705 | free_domains: |
| 1706 | |
| 1707 | list_for_each_entry(iommu, &amd_iommu_list, list) { |
| 1708 | if (iommu->default_dom) |
| 1709 | dma_ops_domain_free(iommu->default_dom); |
| 1710 | } |
| 1711 | |
| 1712 | return ret; |
| 1713 | } |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 1714 | |
| 1715 | /***************************************************************************** |
| 1716 | * |
| 1717 | * The following functions belong to the exported interface of AMD IOMMU |
| 1718 | * |
| 1719 | * This interface allows access to lower level functions of the IOMMU |
| 1720 | * like protection domain handling and assignement of devices to domains |
| 1721 | * which is not possible with the dma_ops interface. |
| 1722 | * |
| 1723 | *****************************************************************************/ |
| 1724 | |
| 1725 | #ifdef CONFIG_IOMMU_API |
| 1726 | |
| 1727 | static void cleanup_domain(struct protection_domain *domain) |
| 1728 | { |
| 1729 | unsigned long flags; |
| 1730 | u16 devid; |
| 1731 | |
| 1732 | write_lock_irqsave(&amd_iommu_devtable_lock, flags); |
| 1733 | |
| 1734 | for (devid = 0; devid <= amd_iommu_last_bdf; ++devid) |
| 1735 | if (amd_iommu_pd_table[devid] == domain) |
| 1736 | __detach_device(domain, devid); |
| 1737 | |
| 1738 | write_unlock_irqrestore(&amd_iommu_devtable_lock, flags); |
| 1739 | } |
| 1740 | |
Joerg Roedel | c156e34 | 2008-12-02 18:13:27 +0100 | [diff] [blame] | 1741 | static int amd_iommu_domain_init(struct iommu_domain *dom) |
| 1742 | { |
| 1743 | struct protection_domain *domain; |
| 1744 | |
| 1745 | domain = kzalloc(sizeof(*domain), GFP_KERNEL); |
| 1746 | if (!domain) |
| 1747 | return -ENOMEM; |
| 1748 | |
| 1749 | spin_lock_init(&domain->lock); |
| 1750 | domain->mode = PAGE_MODE_3_LEVEL; |
| 1751 | domain->id = domain_id_alloc(); |
| 1752 | if (!domain->id) |
| 1753 | goto out_free; |
| 1754 | domain->pt_root = (void *)get_zeroed_page(GFP_KERNEL); |
| 1755 | if (!domain->pt_root) |
| 1756 | goto out_free; |
| 1757 | |
| 1758 | dom->priv = domain; |
| 1759 | |
| 1760 | return 0; |
| 1761 | |
| 1762 | out_free: |
| 1763 | kfree(domain); |
| 1764 | |
| 1765 | return -ENOMEM; |
| 1766 | } |
| 1767 | |
Joerg Roedel | 98383fc | 2008-12-02 18:34:12 +0100 | [diff] [blame] | 1768 | static void amd_iommu_domain_destroy(struct iommu_domain *dom) |
| 1769 | { |
| 1770 | struct protection_domain *domain = dom->priv; |
| 1771 | |
| 1772 | if (!domain) |
| 1773 | return; |
| 1774 | |
| 1775 | if (domain->dev_cnt > 0) |
| 1776 | cleanup_domain(domain); |
| 1777 | |
| 1778 | BUG_ON(domain->dev_cnt != 0); |
| 1779 | |
| 1780 | free_pagetable(domain); |
| 1781 | |
| 1782 | domain_id_free(domain->id); |
| 1783 | |
| 1784 | kfree(domain); |
| 1785 | |
| 1786 | dom->priv = NULL; |
| 1787 | } |
| 1788 | |
Joerg Roedel | 684f288 | 2008-12-08 12:07:44 +0100 | [diff] [blame] | 1789 | static void amd_iommu_detach_device(struct iommu_domain *dom, |
| 1790 | struct device *dev) |
| 1791 | { |
| 1792 | struct protection_domain *domain = dom->priv; |
| 1793 | struct amd_iommu *iommu; |
| 1794 | struct pci_dev *pdev; |
| 1795 | u16 devid; |
| 1796 | |
| 1797 | if (dev->bus != &pci_bus_type) |
| 1798 | return; |
| 1799 | |
| 1800 | pdev = to_pci_dev(dev); |
| 1801 | |
| 1802 | devid = calc_devid(pdev->bus->number, pdev->devfn); |
| 1803 | |
| 1804 | if (devid > 0) |
| 1805 | detach_device(domain, devid); |
| 1806 | |
| 1807 | iommu = amd_iommu_rlookup_table[devid]; |
| 1808 | if (!iommu) |
| 1809 | return; |
| 1810 | |
| 1811 | iommu_queue_inv_dev_entry(iommu, devid); |
| 1812 | iommu_completion_wait(iommu); |
| 1813 | } |
| 1814 | |
Joerg Roedel | 0110606 | 2008-12-02 19:34:11 +0100 | [diff] [blame] | 1815 | static int amd_iommu_attach_device(struct iommu_domain *dom, |
| 1816 | struct device *dev) |
| 1817 | { |
| 1818 | struct protection_domain *domain = dom->priv; |
| 1819 | struct protection_domain *old_domain; |
| 1820 | struct amd_iommu *iommu; |
| 1821 | struct pci_dev *pdev; |
| 1822 | u16 devid; |
| 1823 | |
| 1824 | if (dev->bus != &pci_bus_type) |
| 1825 | return -EINVAL; |
| 1826 | |
| 1827 | pdev = to_pci_dev(dev); |
| 1828 | |
| 1829 | devid = calc_devid(pdev->bus->number, pdev->devfn); |
| 1830 | |
| 1831 | if (devid >= amd_iommu_last_bdf || |
| 1832 | devid != amd_iommu_alias_table[devid]) |
| 1833 | return -EINVAL; |
| 1834 | |
| 1835 | iommu = amd_iommu_rlookup_table[devid]; |
| 1836 | if (!iommu) |
| 1837 | return -EINVAL; |
| 1838 | |
| 1839 | old_domain = domain_for_device(devid); |
| 1840 | if (old_domain) |
| 1841 | return -EBUSY; |
| 1842 | |
| 1843 | attach_device(iommu, domain, devid); |
| 1844 | |
| 1845 | iommu_completion_wait(iommu); |
| 1846 | |
| 1847 | return 0; |
| 1848 | } |
| 1849 | |
Joerg Roedel | c6229ca | 2008-12-02 19:48:43 +0100 | [diff] [blame] | 1850 | static int amd_iommu_map_range(struct iommu_domain *dom, |
| 1851 | unsigned long iova, phys_addr_t paddr, |
| 1852 | size_t size, int iommu_prot) |
| 1853 | { |
| 1854 | struct protection_domain *domain = dom->priv; |
| 1855 | unsigned long i, npages = iommu_num_pages(paddr, size, PAGE_SIZE); |
| 1856 | int prot = 0; |
| 1857 | int ret; |
| 1858 | |
| 1859 | if (iommu_prot & IOMMU_READ) |
| 1860 | prot |= IOMMU_PROT_IR; |
| 1861 | if (iommu_prot & IOMMU_WRITE) |
| 1862 | prot |= IOMMU_PROT_IW; |
| 1863 | |
| 1864 | iova &= PAGE_MASK; |
| 1865 | paddr &= PAGE_MASK; |
| 1866 | |
| 1867 | for (i = 0; i < npages; ++i) { |
| 1868 | ret = iommu_map_page(domain, iova, paddr, prot); |
| 1869 | if (ret) |
| 1870 | return ret; |
| 1871 | |
| 1872 | iova += PAGE_SIZE; |
| 1873 | paddr += PAGE_SIZE; |
| 1874 | } |
| 1875 | |
| 1876 | return 0; |
| 1877 | } |
| 1878 | |
Joerg Roedel | eb74ff6 | 2008-12-02 19:59:10 +0100 | [diff] [blame] | 1879 | static void amd_iommu_unmap_range(struct iommu_domain *dom, |
| 1880 | unsigned long iova, size_t size) |
| 1881 | { |
| 1882 | |
| 1883 | struct protection_domain *domain = dom->priv; |
| 1884 | unsigned long i, npages = iommu_num_pages(iova, size, PAGE_SIZE); |
| 1885 | |
| 1886 | iova &= PAGE_MASK; |
| 1887 | |
| 1888 | for (i = 0; i < npages; ++i) { |
| 1889 | iommu_unmap_page(domain, iova); |
| 1890 | iova += PAGE_SIZE; |
| 1891 | } |
| 1892 | |
| 1893 | iommu_flush_domain(domain->id); |
| 1894 | } |
| 1895 | |
Joerg Roedel | 645c4c8 | 2008-12-02 20:05:50 +0100 | [diff] [blame] | 1896 | static phys_addr_t amd_iommu_iova_to_phys(struct iommu_domain *dom, |
| 1897 | unsigned long iova) |
| 1898 | { |
| 1899 | struct protection_domain *domain = dom->priv; |
| 1900 | unsigned long offset = iova & ~PAGE_MASK; |
| 1901 | phys_addr_t paddr; |
| 1902 | u64 *pte; |
| 1903 | |
| 1904 | pte = &domain->pt_root[IOMMU_PTE_L2_INDEX(iova)]; |
| 1905 | |
| 1906 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1907 | return 0; |
| 1908 | |
| 1909 | pte = IOMMU_PTE_PAGE(*pte); |
| 1910 | pte = &pte[IOMMU_PTE_L1_INDEX(iova)]; |
| 1911 | |
| 1912 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1913 | return 0; |
| 1914 | |
| 1915 | pte = IOMMU_PTE_PAGE(*pte); |
| 1916 | pte = &pte[IOMMU_PTE_L0_INDEX(iova)]; |
| 1917 | |
| 1918 | if (!IOMMU_PTE_PRESENT(*pte)) |
| 1919 | return 0; |
| 1920 | |
| 1921 | paddr = *pte & IOMMU_PAGE_MASK; |
| 1922 | paddr |= offset; |
| 1923 | |
| 1924 | return paddr; |
| 1925 | } |
| 1926 | |
Joerg Roedel | 26961ef | 2008-12-03 17:00:17 +0100 | [diff] [blame] | 1927 | static struct iommu_ops amd_iommu_ops = { |
| 1928 | .domain_init = amd_iommu_domain_init, |
| 1929 | .domain_destroy = amd_iommu_domain_destroy, |
| 1930 | .attach_dev = amd_iommu_attach_device, |
| 1931 | .detach_dev = amd_iommu_detach_device, |
| 1932 | .map = amd_iommu_map_range, |
| 1933 | .unmap = amd_iommu_unmap_range, |
| 1934 | .iova_to_phys = amd_iommu_iova_to_phys, |
| 1935 | }; |
| 1936 | |
Joerg Roedel | 6d98cd8 | 2008-12-08 12:05:55 +0100 | [diff] [blame] | 1937 | #endif |