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Zhang Xiantao82470192007-12-17 13:59:56 +08001#ifndef __KVM_IO_APIC_H
2#define __KVM_IO_APIC_H
3
4#include <linux/kvm_host.h>
5
6#include "iodev.h"
7
8struct kvm;
9struct kvm_vcpu;
10
11#define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS
12#define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */
13#define IOAPIC_EDGE_TRIG 0
14#define IOAPIC_LEVEL_TRIG 1
15
16#define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
17#define IOAPIC_MEM_LENGTH 0x100
18
19/* Direct registers. */
20#define IOAPIC_REG_SELECT 0x00
21#define IOAPIC_REG_WINDOW 0x10
22#define IOAPIC_REG_EOI 0x40 /* IA64 IOSAPIC only */
23
24/* Indirect registers. */
25#define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
26#define IOAPIC_REG_VERSION 0x01
27#define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */
28
29/*ioapic delivery mode*/
30#define IOAPIC_FIXED 0x0
31#define IOAPIC_LOWEST_PRIORITY 0x1
32#define IOAPIC_PMI 0x2
33#define IOAPIC_NMI 0x4
34#define IOAPIC_INIT 0x5
35#define IOAPIC_EXTINT 0x7
36
Yang Zhang8dc6aade2013-04-11 19:21:36 +080037#ifdef CONFIG_X86
38#define RTC_GSI 8
39#else
40#define RTC_GSI -1U
41#endif
42
43struct rtc_status {
44 int pending_eoi;
45 DECLARE_BITMAP(dest_map, KVM_MAX_VCPUS);
46};
47
Zhang Xiantao82470192007-12-17 13:59:56 +080048struct kvm_ioapic {
49 u64 base_address;
50 u32 ioregsel;
51 u32 id;
52 u32 irr;
53 u32 pad;
Sheng Yangcf9e4e12009-02-11 16:03:36 +080054 union kvm_ioapic_redirect_entry redirtbl[IOAPIC_NUM_PINS];
Gleb Natapov1a6e4a82009-08-24 11:54:19 +030055 unsigned long irq_states[IOAPIC_NUM_PINS];
Zhang Xiantao82470192007-12-17 13:59:56 +080056 struct kvm_io_device dev;
57 struct kvm *kvm;
Marcelo Tosattif5244722008-07-26 17:01:00 -030058 void (*ack_notifier)(void *opaque, int irq);
Marcelo Tosatti46a47b12010-04-23 14:03:38 -030059 spinlock_t lock;
Avi Kivity46a929b2009-12-28 14:08:30 +020060 DECLARE_BITMAP(handled_vectors, 256);
Yang Zhang8dc6aade2013-04-11 19:21:36 +080061 struct rtc_status rtc_status;
Zhang Xiantao82470192007-12-17 13:59:56 +080062};
63
64#ifdef DEBUG
65#define ASSERT(x) \
66do { \
67 if (!(x)) { \
68 printk(KERN_EMERG "assertion failed %s: %d: %s\n", \
69 __FILE__, __LINE__, #x); \
70 BUG(); \
71 } \
72} while (0)
73#else
74#define ASSERT(x) do { } while (0)
75#endif
76
77static inline struct kvm_ioapic *ioapic_irqchip(struct kvm *kvm)
78{
79 return kvm->arch.vioapic;
80}
81
Yang Zhang10606912013-04-11 19:21:38 +080082void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu *vcpu);
Gleb Natapov343f94f2009-03-05 16:34:54 +020083int kvm_apic_match_dest(struct kvm_vcpu *vcpu, struct kvm_lapic *source,
84 int short_hand, int dest, int dest_mode);
Gleb Natapove1035712009-03-05 16:34:59 +020085int kvm_apic_compare_prio(struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2);
Yang Zhang1fcc7892013-04-11 19:21:35 +080086void kvm_ioapic_update_eoi(struct kvm_vcpu *vcpu, int vector,
87 int trigger_mode);
Michael S. Tsirkina0c9a8222012-04-11 18:49:55 +030088bool kvm_ioapic_handles_vector(struct kvm *kvm, int vector);
Zhang Xiantao82470192007-12-17 13:59:56 +080089int kvm_ioapic_init(struct kvm *kvm);
Wei Yongjun72bb2fc2010-02-09 10:33:03 +080090void kvm_ioapic_destroy(struct kvm *kvm);
Michael S. Tsirkin1a577b72012-07-19 13:45:20 +030091int kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int irq_source_id,
Yang Zhangaa2fbe62013-04-11 19:21:40 +080092 int level, bool line_status);
Michael S. Tsirkin1a577b72012-07-19 13:45:20 +030093void kvm_ioapic_clear_all(struct kvm_ioapic *ioapic, int irq_source_id);
Gleb Natapov58c2dde2009-03-05 16:35:04 +020094int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
Yang Zhangb4f22252013-04-11 19:21:37 +080095 struct kvm_lapic_irq *irq, unsigned long *dest_map);
Gleb Natapoveba02262009-08-24 11:54:25 +030096int kvm_get_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
97int kvm_set_ioapic(struct kvm *kvm, struct kvm_ioapic_state *state);
Yang Zhang3d81bc72013-04-11 19:25:13 +080098void kvm_vcpu_request_scan_ioapic(struct kvm *kvm);
Yang Zhangcf9e65b2013-04-11 19:25:14 +080099void kvm_ioapic_scan_entry(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap,
100 u32 *tmr);
Gleb Natapoveba02262009-08-24 11:54:25 +0300101
Zhang Xiantao82470192007-12-17 13:59:56 +0800102#endif