arch/arm64/boot/dts/qcom/apq8009-robot-som-refboard.dts

/*
 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/dts-v1/;

#include "msm8909-mtp.dtsi"
#include "8909-pm8916.dtsi"
#include "msm8909-pm8916-mtp.dtsi"
#include "apq8009-audio-external_codec.dtsi"
#include "msm8909-pm8916-camera.dtsi"
#include "msm8909-pm8916-camera-sensor-robot-som.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. APQ8009 Robot SOM refboard";
	compatible = "qcom,apq8009-mtp", "qcom,apq8009", "qcom,mtp";
	qcom,msm-id = <265 2>;
	qcom,board-id = <8 0x15>;
};

&audio_codec_mtp {
	status = "disabled";
};

&i2c_4 {
	status= "okay";
};

&pm8916_gpios {
	wcd_vdd_en { /* GPIO 4 */
		wcd_vdd_en_active: wcd_vdd_en_active {
			status = "ok";
			pins = "gpio4";
			function = "normal";
			output-high;
			qcom,drive-strength = <2>;
		};
		wcd_vdd_en_sleep: wcd_vdd_en_sleep {
			status = "ok";
			pins = "gpio4";
			function = "normal";
			output-low;
			qcom,drive-strength = <2>;
		};

	};
};

&soc {
	ext_codec: sound-9335 {
		compatible = "qcom,apq8009-audio-i2s-codec";
		qcom,model = "apq8009-tashalite-snd-card-tdm";

		qcom,audio-routing =
			"AIF4 VI", "MCLK",
			"RX_BIAS", "MCLK",
			"MADINPUT", "MCLK",
			"SpkrLeft IN", "SPK1 OUT",
			"SpkrRight IN", "SPK2 OUT";

		qcom,tdm-i2s-switch-enable = <&msm_gpio 88 0>;
		qcom,pri-mi2s-gpios = <&cdc_pri_mi2s_gpios>;
		qcom,quat-mi2s-gpios = <&cdc_quat_tdm_gpios>;
	};

	clock_audio: audio_ext_clk {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-mclk-clk-freq = <9600000>;
		qcom,lpass-clock = <1>;
		reg = <0x07702004 0x4>;
		pinctrl-names = "sleep", "active";
		pinctrl-0 = <&i2s_mclk_sleep>;
		pinctrl-1 = <&i2s_mclk_active>;
		#clock-cells = <1>;
	};

	i2c@78b8000 {
		wcd9xxx_codec@d {
			status = "okay";
			compatible = "qcom,tasha-i2c-pgd";
			reg = <0x0d>;

			interrupt-parent = <&wcd9xxx_intc>;
			interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
				17 18 19 20 21 22 23 24 25 26 27 28 29
				30>;

			qcom,wcd-rst-gpio-node = <&wcd_rst_gpio>;

			qcom,has-buck-vsel-gpio;
			qcom,buck-vsel-gpio-node = <&wcd_vdd_gpio>;
			swr_master {
				compatible = "qcom,swr-wcd";
				qcom,swr-num-dev = <2>;
				#address-cells = <2>;
				#size-cells = <0>;

				wsa881x_211:wsa881x@21170211 {
					compatible = "qcom,wsa881x";
					reg = <0x00 0x21170211>;
					qcom,spkr-sd-n-node = <&wsa_spkr>;
				};

				wsa881x_212:wsa881x@21170212 {
					compatible = "qcom,wsa881x";
					reg = <0x00 0x21170212>;
					qcom,spkr-sd-n-node = <&wsa_spkr>;
				};

				wsa881x_213:wsa881x@21170213 {
					compatible = "qcom,wsa881x";
					reg = <0x00 0x21170213>;
					qcom,spkr-sd-n-node = <&wsa_spkr>;
				};

				wsa881x_214:wsa881x@21170214 {
					compatible = "qcom,wsa881x";
					reg = <0x00 0x21170214>;
					qcom,spkr-sd-n-node = <&wsa_spkr>;
				};
			};
		};
	};

	cdc_pri_mi2s_gpios: msm_cdc_pinctrl_pri {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&pri_mi2s_active &pri_mi2s_ws_active
		     &pri_mi2s_dout_active &pri_mi2s_din_active>;
		pinctrl-1 = <&pri_mi2s_sleep &pri_mi2s_ws_sleep
		     &pri_mi2s_dout_sleep &pri_mi2s_din_sleep>;
	};

	cdc_quat_tdm_gpios: msm_cdc_pinctrl_quat {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&quat_mi2s_active &quat_mi2s_din_active>;
		pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_din_sleep>;
	};

	wcd_rst_gpio: wcd_gpio_ctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&cdc_reset1_active>;
		pinctrl-1 = <&cdc_reset1_sleep>;
	};

	wcd_vdd_gpio: wcd_vdd_gpio_ctrl {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&wcd_vdd_en_active>;
		pinctrl-1 = <&wcd_vdd_en_sleep>;
	};

	wsa_spkr: msm_cdc_pinctrll {
		compatible = "qcom,msm-cdc-pinctrl";
		pinctrl-names = "aud_active", "aud_sleep";
		pinctrl-0 = <&spkr_en_active>;
		pinctrl-1 = <&spkr_en_sleep>;
	};

	vph_pwr_vreg: vph_pwr_vreg {
		compatible = "regulator-fixed";
		status = "ok";
		regulator-name = "vph_pwr";
		regulator-always-on;
	};

	otg_vreg_5p0: otg_vreg_5p0 {
		compatible = "regulator-fixed";
		regulator-name = "sbc_vreg_5p0";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		status = "ok";
		enable-active-low;
		vin-supply = <&vph_pwr_vreg>;
	};

	vbus_otg_vreg: vbus_otg_vreg {
		compatible = "regulator-fixed";
		regulator-name = "vbus_otg_vreg";
		gpio = <&msm_gpio 74 0>;
		vin-supply = <&otg_vreg_5p0>;
	};

	mdss_mdp: qcom,mdss_mdp@1a00000 {
		status = "disabled";
	};

	bluetooth: bt_qca9379 {
		compatible = "qca,qca9379";
		qca,bt-reset-gpio = <&msm_gpio 47 0>; /* BT_EN */
	};
	cnss_sdio: qcom,cnss_sdio {
		compatible = "qcom,cnss_sdio";
		subsys-name = "AR6320";
		/**
		 * There is no vdd-wlan on board and this is not for DSRC.
		 * IO and XTAL share the same vreg.
		 */
		vdd-wlan-io-supply = <&pm8916_l5>;
		qcom,cap-tsf-gpio = <&msm_gpio 42 1>;
		qcom,wlan-ramdump-dynamic = <0x200000>;
		qcom,msm-bus,name = "msm-cnss";
		qcom,msm-bus,num-cases = <4>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
			<79 512 0 0>,             /* No vote */
			<79 512 6250 200000>,     /* 50 Mbps */
			<79 512 25000 200000>,    /* 200 Mbps */
			<79 512 2048000 4096000>; /* MAX */
	};

	gpio_keys {
		status = "disable";
	};

	spi@78ba000 {
		reg = <0x78ba000 0x600>;
		spi-max-frequency = <50000000>;
		status = "okay";

		spi@0 {
			compatible = "qcom,spi-msm-slave";
			reg = <0>;
			spi-max-frequency = <50000000>;
		};
	};
};

&i2c_1 {
	status = "okay";
	icm20602@68 {
		compatible = "invensense,icm20602";
		reg = <0x68>;
		interrupt-parent = <&msm_gpio>;
		interrupts = <12 0>;
		invensense,icm20602-gpio = <&msm_gpio 12 0x0>;
		vdd-ldo-supply = <&pm8916_l6>;
		interrupt-names = "icm20602_irq";
		pinctrl-names = "imu_active","imu_suspend";
		pinctrl-0 = <&imu_int_active>;
		pinctrl-1 = <&imu_int_suspend>;
		status = "ok";
	};
	vl53l0x@29 {
		compatible = "st,stmvl53l0";
		reg = <0x29>;
		status = "ok";
	};
};

&wcnss {
	status = "disabled";
};

&msm_gpio {
	sdc2_wlan_gpio_on: sdc2_wlan_gpio_on {
		mux {
			pins = "gpio43";
			function = "gpio";
		};
		config {
			pins = "gpio43";
			drive-strength = <10>;
			bias-pull-up;
			output-high;
		};
	};

	sdc2_wlan_gpio_off: sdc2_wlan_gpio_off {
		mux {
			pins = "gpio43";
			function = "gpio";
		};
		config {
			pins = "gpio43";
			drive-strength = <2>;
			bias-disable;
			output-low;
		};
	};
};

&sdhc_2 {
	/delete-property/cd-gpios;
	#address-cells = <0>;
	interrupt-parent = <&sdhc_2>;
	interrupts = <0 1 2>;
	#interrupt-cells = <1>;
	interrupt-map-mask = <0xffffffff>;
	interrupt-map = <0 &intc 0 125 0
		1 &intc 0 221 0
		2 &msm_gpio 40 0x1>;
	interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";

	qcom,vdd-voltage-level = <1800000 2950000>;
	qcom,vdd-current-level = <15000 400000>;

	qcom,vdd-io-voltage-level = <1800000 1800000>;
	qcom,vdd-io-current-level = <200 50000>;
	qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;
	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on
	&sdc2_wlan_gpio_on>;
	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off
	&sdc2_wlan_gpio_off>;
	qcom,nonremovable;
	qcom,core_3_0v_support;
	status = "ok";
};

&usb_otg {
	interrupts = <0 134 0>,<0 140 0>,<0 136 0>;
	interrupt-names = "core_irq", "async_irq", "phy_irq";
	qcom,hsusb-otg-mode = <3>;
	qcom,switch-vbus-w-id;
	qcom,phy-id-high-as-peripheral;
	vbus_otg-supply = <&vbus_otg_vreg>;
};

&external_image_mem {
	reg = <0x0 0x87900000 0x0 0x0700000>;
};

&modem_adsp_mem {
	reg = <0x0 0x88000000 0x0 0x01e00000>;
};

&peripheral_mem {
	status = "disabled";
};

&pm8916_chg {
	status = "ok";
};

&pm8916_bms {
	status = "ok";
};

&blsp1_uart2_hs {
	status = "ok";
};

&i2c_1 {
	status = "okay";
	vl53l0x@52 {
		compatible = "st,stmvl53l0";
		reg = <0x29>;
		status = "ok";
	};
};


&wcd_rst_gpio {
	status = "okay";
};

&ext_codec {
	status = "okay";
};