Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 1 | #ifndef _ASM_POWERPC_TLBFLUSH_H |
| 2 | #define _ASM_POWERPC_TLBFLUSH_H |
Benjamin Herrenschmidt | e701d26 | 2007-10-30 09:46:06 +1100 | [diff] [blame] | 3 | |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 4 | /* |
| 5 | * TLB flushing: |
| 6 | * |
| 7 | * - flush_tlb_mm(mm) flushes the specified mm context TLB's |
| 8 | * - flush_tlb_page(vma, vmaddr) flushes one page |
Kumar Gala | df3b861 | 2008-11-19 05:53:24 +0000 | [diff] [blame] | 9 | * - local_flush_tlb_page(vmaddr) flushes one page on the local processor |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 10 | * - flush_tlb_page_nohash(vma, vmaddr) flushes one page if SW loaded TLB |
| 11 | * - flush_tlb_range(vma, start, end) flushes a range of pages |
| 12 | * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 13 | * |
| 14 | * This program is free software; you can redistribute it and/or |
| 15 | * modify it under the terms of the GNU General Public License |
| 16 | * as published by the Free Software Foundation; either version |
| 17 | * 2 of the License, or (at your option) any later version. |
| 18 | */ |
| 19 | #ifdef __KERNEL__ |
| 20 | |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 21 | #if defined(CONFIG_4xx) || defined(CONFIG_8xx) || defined(CONFIG_FSL_BOOKE) |
| 22 | /* |
| 23 | * TLB flushing for software loaded TLB chips |
| 24 | * |
| 25 | * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range & |
| 26 | * flush_tlb_kernel_range are best implemented as tlbia vs |
| 27 | * specific tlbie's |
| 28 | */ |
| 29 | |
Benjamin Herrenschmidt | e701d26 | 2007-10-30 09:46:06 +1100 | [diff] [blame] | 30 | #include <linux/mm.h> |
| 31 | |
| 32 | extern void _tlbie(unsigned long address, unsigned int pid); |
Kumar Gala | 0ba3418 | 2008-07-15 16:12:25 -0500 | [diff] [blame] | 33 | extern void _tlbil_all(void); |
| 34 | extern void _tlbil_pid(unsigned int pid); |
| 35 | extern void _tlbil_va(unsigned long address, unsigned int pid); |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 36 | |
| 37 | #if defined(CONFIG_40x) || defined(CONFIG_8xx) |
| 38 | #define _tlbia() asm volatile ("tlbia; sync" : : : "memory") |
| 39 | #else /* CONFIG_44x || CONFIG_FSL_BOOKE */ |
| 40 | extern void _tlbia(void); |
| 41 | #endif |
| 42 | |
Benjamin Herrenschmidt | 1a37a3f | 2008-12-14 19:44:24 +0000 | [diff] [blame^] | 43 | static inline void local_flush_tlb_mm(struct mm_struct *mm) |
| 44 | { |
| 45 | _tlbil_pid(mm->context.id); |
| 46 | } |
| 47 | |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 48 | static inline void flush_tlb_mm(struct mm_struct *mm) |
| 49 | { |
Kumar Gala | 0ba3418 | 2008-07-15 16:12:25 -0500 | [diff] [blame] | 50 | _tlbil_pid(mm->context.id); |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 51 | } |
| 52 | |
Kumar Gala | df3b861 | 2008-11-19 05:53:24 +0000 | [diff] [blame] | 53 | static inline void local_flush_tlb_page(unsigned long vmaddr) |
| 54 | { |
| 55 | _tlbil_va(vmaddr, 0); |
| 56 | } |
| 57 | |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 58 | static inline void flush_tlb_page(struct vm_area_struct *vma, |
| 59 | unsigned long vmaddr) |
| 60 | { |
Kumar Gala | 0ba3418 | 2008-07-15 16:12:25 -0500 | [diff] [blame] | 61 | _tlbil_va(vmaddr, vma ? vma->vm_mm->context.id : 0); |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 62 | } |
| 63 | |
| 64 | static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, |
| 65 | unsigned long vmaddr) |
| 66 | { |
Kumar Gala | 0ba3418 | 2008-07-15 16:12:25 -0500 | [diff] [blame] | 67 | flush_tlb_page(vma, vmaddr); |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 68 | } |
| 69 | |
| 70 | static inline void flush_tlb_range(struct vm_area_struct *vma, |
| 71 | unsigned long start, unsigned long end) |
| 72 | { |
Kumar Gala | 0ba3418 | 2008-07-15 16:12:25 -0500 | [diff] [blame] | 73 | _tlbil_pid(vma->vm_mm->context.id); |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | static inline void flush_tlb_kernel_range(unsigned long start, |
| 77 | unsigned long end) |
| 78 | { |
Kumar Gala | 0ba3418 | 2008-07-15 16:12:25 -0500 | [diff] [blame] | 79 | _tlbil_pid(0); |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 80 | } |
| 81 | |
| 82 | #elif defined(CONFIG_PPC32) |
| 83 | /* |
| 84 | * TLB flushing for "classic" hash-MMMU 32-bit CPUs, 6xx, 7xx, 7xxx |
| 85 | */ |
| 86 | extern void _tlbie(unsigned long address); |
| 87 | extern void _tlbia(void); |
| 88 | |
| 89 | extern void flush_tlb_mm(struct mm_struct *mm); |
| 90 | extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr); |
| 91 | extern void flush_tlb_page_nohash(struct vm_area_struct *vma, unsigned long addr); |
| 92 | extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, |
| 93 | unsigned long end); |
| 94 | extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); |
Kumar Gala | df3b861 | 2008-11-19 05:53:24 +0000 | [diff] [blame] | 95 | static inline void local_flush_tlb_page(unsigned long vmaddr) |
| 96 | { |
| 97 | flush_tlb_page(NULL, vmaddr); |
| 98 | } |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 99 | |
| 100 | #else |
| 101 | /* |
| 102 | * TLB flushing for 64-bit has-MMU CPUs |
| 103 | */ |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 104 | |
| 105 | #include <linux/percpu.h> |
| 106 | #include <asm/page.h> |
| 107 | |
| 108 | #define PPC64_TLB_BATCH_NR 192 |
| 109 | |
| 110 | struct ppc64_tlb_batch { |
Benjamin Herrenschmidt | a741e67 | 2007-04-10 17:09:37 +1000 | [diff] [blame] | 111 | int active; |
| 112 | unsigned long index; |
| 113 | struct mm_struct *mm; |
| 114 | real_pte_t pte[PPC64_TLB_BATCH_NR]; |
| 115 | unsigned long vaddr[PPC64_TLB_BATCH_NR]; |
| 116 | unsigned int psize; |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 117 | int ssize; |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 118 | }; |
| 119 | DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); |
| 120 | |
| 121 | extern void __flush_tlb_pending(struct ppc64_tlb_batch *batch); |
| 122 | |
Benjamin Herrenschmidt | a741e67 | 2007-04-10 17:09:37 +1000 | [diff] [blame] | 123 | extern void hpte_need_flush(struct mm_struct *mm, unsigned long addr, |
| 124 | pte_t *ptep, unsigned long pte, int huge); |
| 125 | |
| 126 | #define __HAVE_ARCH_ENTER_LAZY_MMU_MODE |
| 127 | |
| 128 | static inline void arch_enter_lazy_mmu_mode(void) |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 129 | { |
Benjamin Herrenschmidt | a741e67 | 2007-04-10 17:09:37 +1000 | [diff] [blame] | 130 | struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); |
| 131 | |
| 132 | batch->active = 1; |
| 133 | } |
| 134 | |
| 135 | static inline void arch_leave_lazy_mmu_mode(void) |
| 136 | { |
| 137 | struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 138 | |
| 139 | if (batch->index) |
| 140 | __flush_tlb_pending(batch); |
Benjamin Herrenschmidt | a741e67 | 2007-04-10 17:09:37 +1000 | [diff] [blame] | 141 | batch->active = 0; |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 142 | } |
| 143 | |
Benjamin Herrenschmidt | a741e67 | 2007-04-10 17:09:37 +1000 | [diff] [blame] | 144 | #define arch_flush_lazy_mmu_mode() do {} while (0) |
| 145 | |
| 146 | |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 147 | extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize, |
Paul Mackerras | 1189be6 | 2007-10-11 20:37:10 +1000 | [diff] [blame] | 148 | int ssize, int local); |
Benjamin Herrenschmidt | 3c726f8 | 2005-11-07 11:06:55 +1100 | [diff] [blame] | 149 | extern void flush_hash_range(unsigned long number, int local); |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 150 | |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 151 | |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 152 | static inline void flush_tlb_mm(struct mm_struct *mm) |
| 153 | { |
| 154 | } |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 155 | |
Kumar Gala | df3b861 | 2008-11-19 05:53:24 +0000 | [diff] [blame] | 156 | static inline void local_flush_tlb_page(unsigned long vmaddr) |
| 157 | { |
| 158 | } |
| 159 | |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 160 | static inline void flush_tlb_page(struct vm_area_struct *vma, |
| 161 | unsigned long vmaddr) |
| 162 | { |
| 163 | } |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 164 | |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 165 | static inline void flush_tlb_page_nohash(struct vm_area_struct *vma, |
| 166 | unsigned long vmaddr) |
| 167 | { |
| 168 | } |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 169 | |
David Gibson | 6210230 | 2007-04-24 13:09:12 +1000 | [diff] [blame] | 170 | static inline void flush_tlb_range(struct vm_area_struct *vma, |
| 171 | unsigned long start, unsigned long end) |
| 172 | { |
| 173 | } |
| 174 | |
| 175 | static inline void flush_tlb_kernel_range(unsigned long start, |
| 176 | unsigned long end) |
| 177 | { |
| 178 | } |
| 179 | |
Benjamin Herrenschmidt | 3d5134e | 2007-06-04 15:15:36 +1000 | [diff] [blame] | 180 | /* Private function for use by PCI IO mapping code */ |
| 181 | extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start, |
| 182 | unsigned long end); |
| 183 | |
| 184 | |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 185 | #endif |
| 186 | |
Stephen Rothwell | 1970282 | 2005-11-04 16:58:59 +1100 | [diff] [blame] | 187 | #endif /*__KERNEL__ */ |
| 188 | #endif /* _ASM_POWERPC_TLBFLUSH_H */ |