Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Freescale PowerQUICC Ethernet Driver -- MIIM bus implementation |
| 3 | * Provides Bus interface for MIIM regs |
| 4 | * |
| 5 | * Author: Andy Fleming <afleming@freescale.com> |
Sandeep Gopalpet | 1d2397d | 2009-11-02 07:03:22 +0000 | [diff] [blame] | 6 | * Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com> |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 7 | * |
Sandeep Gopalpet | 1d2397d | 2009-11-02 07:03:22 +0000 | [diff] [blame] | 8 | * Copyright 2002-2004, 2008-2009 Freescale Semiconductor, Inc. |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 9 | * |
| 10 | * Based on gianfar_mii.c and ucc_geth_mii.c (Li Yang, Kim Phillips) |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify it |
| 13 | * under the terms of the GNU General Public License as published by the |
| 14 | * Free Software Foundation; either version 2 of the License, or (at your |
| 15 | * option) any later version. |
| 16 | * |
| 17 | */ |
| 18 | |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/string.h> |
| 21 | #include <linux/errno.h> |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 22 | #include <linux/slab.h> |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 23 | #include <linux/init.h> |
| 24 | #include <linux/delay.h> |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 25 | #include <linux/module.h> |
| 26 | #include <linux/platform_device.h> |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 27 | #include <linux/mii.h> |
Grant Likely | 22ae782 | 2010-07-29 11:49:01 -0600 | [diff] [blame] | 28 | #include <linux/of_address.h> |
Grant Likely | 324931b | 2009-04-25 12:53:07 +0000 | [diff] [blame] | 29 | #include <linux/of_mdio.h> |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 30 | #include <linux/of_platform.h> |
| 31 | |
| 32 | #include <asm/io.h> |
Timur Tabi | 1aa06d4 | 2012-08-29 08:07:58 +0000 | [diff] [blame^] | 33 | #include <asm/ucc.h> /* for ucc_set_qe_mux_mii_mng() */ |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 34 | |
| 35 | #include "gianfar.h" |
Timur Tabi | 19bcd6c | 2012-08-29 08:07:57 +0000 | [diff] [blame] | 36 | |
| 37 | #define MIIMIND_BUSY 0x00000001 |
| 38 | #define MIIMIND_NOTVALID 0x00000004 |
| 39 | #define MIIMCFG_INIT_VALUE 0x00000007 |
| 40 | #define MIIMCFG_RESET 0x80000000 |
| 41 | |
| 42 | #define MII_READ_COMMAND 0x00000001 |
| 43 | |
| 44 | struct fsl_pq_mdio { |
| 45 | u8 res1[16]; |
| 46 | u32 ieventm; /* MDIO Interrupt event register (for etsec2)*/ |
| 47 | u32 imaskm; /* MDIO Interrupt mask register (for etsec2)*/ |
| 48 | u8 res2[4]; |
| 49 | u32 emapm; /* MDIO Event mapping register (for etsec2)*/ |
| 50 | u8 res3[1280]; |
| 51 | u32 miimcfg; /* MII management configuration reg */ |
| 52 | u32 miimcom; /* MII management command reg */ |
| 53 | u32 miimadd; /* MII management address reg */ |
| 54 | u32 miimcon; /* MII management control reg */ |
| 55 | u32 miimstat; /* MII management status reg */ |
| 56 | u32 miimind; /* MII management indication reg */ |
| 57 | u8 res4[28]; |
| 58 | u32 utbipar; /* TBI phy address reg (only on UCC) */ |
| 59 | u8 res5[2728]; |
| 60 | } __packed; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 61 | |
Timur Tabi | 59399c5 | 2012-07-09 16:57:36 -0500 | [diff] [blame] | 62 | /* Number of microseconds to wait for an MII register to respond */ |
| 63 | #define MII_TIMEOUT 1000 |
| 64 | |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 65 | struct fsl_pq_mdio_priv { |
| 66 | void __iomem *map; |
| 67 | struct fsl_pq_mdio __iomem *regs; |
| 68 | }; |
| 69 | |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 70 | /* |
| 71 | * Write value to the PHY at mii_id at register regnum, |
| 72 | * on the bus attached to the local interface, which may be different from the |
| 73 | * generic mdio bus (tied to a single interface), waiting until the write is |
| 74 | * done before returning. This is helpful in programming interfaces like |
| 75 | * the TBI which control interfaces like onchip SERDES and are always tied to |
| 76 | * the local mdio pins, which may not be the same as system mdio bus, used for |
| 77 | * controlling the external PHYs, for example. |
| 78 | */ |
Timur Tabi | 19bcd6c | 2012-08-29 08:07:57 +0000 | [diff] [blame] | 79 | static int fsl_pq_local_mdio_write(struct fsl_pq_mdio __iomem *regs, int mii_id, |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 80 | int regnum, u16 value) |
| 81 | { |
Timur Tabi | 59399c5 | 2012-07-09 16:57:36 -0500 | [diff] [blame] | 82 | u32 status; |
| 83 | |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 84 | /* Set the PHY address and the register address we want to write */ |
| 85 | out_be32(®s->miimadd, (mii_id << 8) | regnum); |
| 86 | |
| 87 | /* Write out the value we want */ |
| 88 | out_be32(®s->miimcon, value); |
| 89 | |
| 90 | /* Wait for the transaction to finish */ |
Timur Tabi | 59399c5 | 2012-07-09 16:57:36 -0500 | [diff] [blame] | 91 | status = spin_event_timeout(!(in_be32(®s->miimind) & MIIMIND_BUSY), |
| 92 | MII_TIMEOUT, 0); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 93 | |
Timur Tabi | 59399c5 | 2012-07-09 16:57:36 -0500 | [diff] [blame] | 94 | return status ? 0 : -ETIMEDOUT; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 95 | } |
| 96 | |
| 97 | /* |
| 98 | * Read the bus for PHY at addr mii_id, register regnum, and |
| 99 | * return the value. Clears miimcom first. All PHY operation |
| 100 | * done on the bus attached to the local interface, |
| 101 | * which may be different from the generic mdio bus |
| 102 | * This is helpful in programming interfaces like |
| 103 | * the TBI which, in turn, control interfaces like onchip SERDES |
| 104 | * and are always tied to the local mdio pins, which may not be the |
| 105 | * same as system mdio bus, used for controlling the external PHYs, for eg. |
| 106 | */ |
Timur Tabi | 19bcd6c | 2012-08-29 08:07:57 +0000 | [diff] [blame] | 107 | static int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs, |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 108 | int mii_id, int regnum) |
| 109 | { |
| 110 | u16 value; |
Timur Tabi | 59399c5 | 2012-07-09 16:57:36 -0500 | [diff] [blame] | 111 | u32 status; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 112 | |
| 113 | /* Set the PHY address and the register address we want to read */ |
| 114 | out_be32(®s->miimadd, (mii_id << 8) | regnum); |
| 115 | |
| 116 | /* Clear miimcom, and then initiate a read */ |
| 117 | out_be32(®s->miimcom, 0); |
| 118 | out_be32(®s->miimcom, MII_READ_COMMAND); |
| 119 | |
Timur Tabi | 59399c5 | 2012-07-09 16:57:36 -0500 | [diff] [blame] | 120 | /* Wait for the transaction to finish, normally less than 100us */ |
| 121 | status = spin_event_timeout(!(in_be32(®s->miimind) & |
| 122 | (MIIMIND_NOTVALID | MIIMIND_BUSY)), |
| 123 | MII_TIMEOUT, 0); |
| 124 | if (!status) |
| 125 | return -ETIMEDOUT; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 126 | |
| 127 | /* Grab the value of the register from miimstat */ |
| 128 | value = in_be32(®s->miimstat); |
| 129 | |
| 130 | return value; |
| 131 | } |
| 132 | |
Anton Vorontsov | 6748f60 | 2009-11-04 12:52:57 +0000 | [diff] [blame] | 133 | static struct fsl_pq_mdio __iomem *fsl_pq_mdio_get_regs(struct mii_bus *bus) |
| 134 | { |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 135 | struct fsl_pq_mdio_priv *priv = bus->priv; |
| 136 | |
| 137 | return priv->regs; |
Anton Vorontsov | 6748f60 | 2009-11-04 12:52:57 +0000 | [diff] [blame] | 138 | } |
| 139 | |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 140 | /* |
| 141 | * Write value to the PHY at mii_id at register regnum, |
| 142 | * on the bus, waiting until the write is done before returning. |
| 143 | */ |
Timur Tabi | 19bcd6c | 2012-08-29 08:07:57 +0000 | [diff] [blame] | 144 | static int fsl_pq_mdio_write(struct mii_bus *bus, int mii_id, int regnum, |
| 145 | u16 value) |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 146 | { |
Anton Vorontsov | 6748f60 | 2009-11-04 12:52:57 +0000 | [diff] [blame] | 147 | struct fsl_pq_mdio __iomem *regs = fsl_pq_mdio_get_regs(bus); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 148 | |
| 149 | /* Write to the local MII regs */ |
Eric Dumazet | 807540b | 2010-09-23 05:40:09 +0000 | [diff] [blame] | 150 | return fsl_pq_local_mdio_write(regs, mii_id, regnum, value); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 151 | } |
| 152 | |
| 153 | /* |
| 154 | * Read the bus for PHY at addr mii_id, register regnum, and |
| 155 | * return the value. Clears miimcom first. |
| 156 | */ |
Timur Tabi | 19bcd6c | 2012-08-29 08:07:57 +0000 | [diff] [blame] | 157 | static int fsl_pq_mdio_read(struct mii_bus *bus, int mii_id, int regnum) |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 158 | { |
Anton Vorontsov | 6748f60 | 2009-11-04 12:52:57 +0000 | [diff] [blame] | 159 | struct fsl_pq_mdio __iomem *regs = fsl_pq_mdio_get_regs(bus); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 160 | |
| 161 | /* Read the local MII regs */ |
Eric Dumazet | 807540b | 2010-09-23 05:40:09 +0000 | [diff] [blame] | 162 | return fsl_pq_local_mdio_read(regs, mii_id, regnum); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 163 | } |
| 164 | |
| 165 | /* Reset the MIIM registers, and wait for the bus to free */ |
| 166 | static int fsl_pq_mdio_reset(struct mii_bus *bus) |
| 167 | { |
Anton Vorontsov | 6748f60 | 2009-11-04 12:52:57 +0000 | [diff] [blame] | 168 | struct fsl_pq_mdio __iomem *regs = fsl_pq_mdio_get_regs(bus); |
Timur Tabi | 59399c5 | 2012-07-09 16:57:36 -0500 | [diff] [blame] | 169 | u32 status; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 170 | |
| 171 | mutex_lock(&bus->mdio_lock); |
| 172 | |
| 173 | /* Reset the management interface */ |
| 174 | out_be32(®s->miimcfg, MIIMCFG_RESET); |
| 175 | |
| 176 | /* Setup the MII Mgmt clock speed */ |
| 177 | out_be32(®s->miimcfg, MIIMCFG_INIT_VALUE); |
| 178 | |
| 179 | /* Wait until the bus is free */ |
Timur Tabi | 59399c5 | 2012-07-09 16:57:36 -0500 | [diff] [blame] | 180 | status = spin_event_timeout(!(in_be32(®s->miimind) & MIIMIND_BUSY), |
| 181 | MII_TIMEOUT, 0); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 182 | |
| 183 | mutex_unlock(&bus->mdio_lock); |
| 184 | |
Timur Tabi | 59399c5 | 2012-07-09 16:57:36 -0500 | [diff] [blame] | 185 | if (!status) { |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 186 | printk(KERN_ERR "%s: The MII Bus is stuck!\n", |
| 187 | bus->name); |
| 188 | return -EBUSY; |
| 189 | } |
| 190 | |
| 191 | return 0; |
| 192 | } |
| 193 | |
Timur Tabi | 19bcd6c | 2012-08-29 08:07:57 +0000 | [diff] [blame] | 194 | static void fsl_pq_mdio_bus_name(char *name, struct device_node *np) |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 195 | { |
Anton Vorontsov | 18f2738 | 2009-03-19 06:48:08 +0000 | [diff] [blame] | 196 | const u32 *addr; |
| 197 | u64 taddr = OF_BAD_ADDR; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 198 | |
Anton Vorontsov | 18f2738 | 2009-03-19 06:48:08 +0000 | [diff] [blame] | 199 | addr = of_get_address(np, 0, NULL, NULL); |
| 200 | if (addr) |
| 201 | taddr = of_translate_address(np, addr); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 202 | |
Anton Vorontsov | 18f2738 | 2009-03-19 06:48:08 +0000 | [diff] [blame] | 203 | snprintf(name, MII_BUS_ID_SIZE, "%s@%llx", np->name, |
| 204 | (unsigned long long)taddr); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 205 | } |
| 206 | |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 207 | |
Sandeep Gopalpet | 1d2397d | 2009-11-02 07:03:22 +0000 | [diff] [blame] | 208 | static u32 __iomem *get_gfar_tbipa(struct fsl_pq_mdio __iomem *regs, struct device_node *np) |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 209 | { |
Andy Fleming | 952c5ca | 2011-11-11 05:10:39 +0000 | [diff] [blame] | 210 | #if defined(CONFIG_GIANFAR) || defined(CONFIG_GIANFAR_MODULE) |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 211 | struct gfar __iomem *enet_regs; |
| 212 | |
| 213 | /* |
| 214 | * This is mildly evil, but so is our hardware for doing this. |
| 215 | * Also, we have to cast back to struct gfar because of |
| 216 | * definition weirdness done in gianfar.h. |
| 217 | */ |
Sandeep Gopalpet | 1d2397d | 2009-11-02 07:03:22 +0000 | [diff] [blame] | 218 | if(of_device_is_compatible(np, "fsl,gianfar-mdio") || |
| 219 | of_device_is_compatible(np, "fsl,gianfar-tbi") || |
| 220 | of_device_is_compatible(np, "gianfar")) { |
| 221 | enet_regs = (struct gfar __iomem *)regs; |
| 222 | return &enet_regs->tbipa; |
| 223 | } else if (of_device_is_compatible(np, "fsl,etsec2-mdio") || |
| 224 | of_device_is_compatible(np, "fsl,etsec2-tbi")) { |
Anton Vorontsov | 3b1fd3e | 2010-04-23 07:12:35 +0000 | [diff] [blame] | 225 | return of_iomap(np, 1); |
Andy Fleming | 952c5ca | 2011-11-11 05:10:39 +0000 | [diff] [blame] | 226 | } |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 227 | #endif |
Andy Fleming | 952c5ca | 2011-11-11 05:10:39 +0000 | [diff] [blame] | 228 | return NULL; |
| 229 | } |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 230 | |
| 231 | |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 232 | static int get_ucc_id_for_range(u64 start, u64 end, u32 *ucc_id) |
| 233 | { |
Andy Fleming | 952c5ca | 2011-11-11 05:10:39 +0000 | [diff] [blame] | 234 | #if defined(CONFIG_UCC_GETH) || defined(CONFIG_UCC_GETH_MODULE) |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 235 | struct device_node *np = NULL; |
| 236 | int err = 0; |
| 237 | |
| 238 | for_each_compatible_node(np, NULL, "ucc_geth") { |
| 239 | struct resource tempres; |
| 240 | |
| 241 | err = of_address_to_resource(np, 0, &tempres); |
| 242 | if (err) |
| 243 | continue; |
| 244 | |
| 245 | /* if our mdio regs fall within this UCC regs range */ |
| 246 | if ((start >= tempres.start) && (end <= tempres.end)) { |
| 247 | /* Find the id of the UCC */ |
| 248 | const u32 *id; |
| 249 | |
| 250 | id = of_get_property(np, "cell-index", NULL); |
| 251 | if (!id) { |
| 252 | id = of_get_property(np, "device-id", NULL); |
| 253 | if (!id) |
| 254 | continue; |
| 255 | } |
| 256 | |
| 257 | *ucc_id = *id; |
| 258 | |
| 259 | return 0; |
| 260 | } |
| 261 | } |
| 262 | |
| 263 | if (err) |
| 264 | return err; |
| 265 | else |
| 266 | return -EINVAL; |
Andy Fleming | 952c5ca | 2011-11-11 05:10:39 +0000 | [diff] [blame] | 267 | #else |
| 268 | return -ENODEV; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 269 | #endif |
Andy Fleming | 952c5ca | 2011-11-11 05:10:39 +0000 | [diff] [blame] | 270 | } |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 271 | |
Grant Likely | 7488876 | 2011-02-22 21:05:51 -0700 | [diff] [blame] | 272 | static int fsl_pq_mdio_probe(struct platform_device *ofdev) |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 273 | { |
Grant Likely | 61c7a08 | 2010-04-13 16:12:29 -0700 | [diff] [blame] | 274 | struct device_node *np = ofdev->dev.of_node; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 275 | struct device_node *tbi; |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 276 | struct fsl_pq_mdio_priv *priv; |
Sandeep Gopalpet | 1d2397d | 2009-11-02 07:03:22 +0000 | [diff] [blame] | 277 | struct fsl_pq_mdio __iomem *regs = NULL; |
Anton Vorontsov | 2951d64 | 2009-11-04 12:52:56 +0000 | [diff] [blame] | 278 | void __iomem *map; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 279 | u32 __iomem *tbipa; |
| 280 | struct mii_bus *new_bus; |
| 281 | int tbiaddr = -1; |
Anton Vorontsov | 3b1fd3e | 2010-04-23 07:12:35 +0000 | [diff] [blame] | 282 | const u32 *addrp; |
Anton Vorontsov | 2951d64 | 2009-11-04 12:52:56 +0000 | [diff] [blame] | 283 | u64 addr = 0, size = 0; |
Anton Vorontsov | 08d18f3 | 2010-05-14 04:27:30 +0000 | [diff] [blame] | 284 | int err; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 285 | |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 286 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
| 287 | if (!priv) |
| 288 | return -ENOMEM; |
| 289 | |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 290 | new_bus = mdiobus_alloc(); |
Anton Vorontsov | 08d18f3 | 2010-05-14 04:27:30 +0000 | [diff] [blame] | 291 | if (!new_bus) { |
| 292 | err = -ENOMEM; |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 293 | goto err_free_priv; |
Anton Vorontsov | 08d18f3 | 2010-05-14 04:27:30 +0000 | [diff] [blame] | 294 | } |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 295 | |
| 296 | new_bus->name = "Freescale PowerQUICC MII Bus", |
| 297 | new_bus->read = &fsl_pq_mdio_read, |
| 298 | new_bus->write = &fsl_pq_mdio_write, |
| 299 | new_bus->reset = &fsl_pq_mdio_reset, |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 300 | new_bus->priv = priv; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 301 | fsl_pq_mdio_bus_name(new_bus->id, np); |
| 302 | |
Anton Vorontsov | 3b1fd3e | 2010-04-23 07:12:35 +0000 | [diff] [blame] | 303 | addrp = of_get_address(np, 0, &size, NULL); |
| 304 | if (!addrp) { |
| 305 | err = -EINVAL; |
| 306 | goto err_free_bus; |
| 307 | } |
| 308 | |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 309 | /* Set the PHY base address */ |
Anton Vorontsov | 3b1fd3e | 2010-04-23 07:12:35 +0000 | [diff] [blame] | 310 | addr = of_translate_address(np, addrp); |
| 311 | if (addr == OF_BAD_ADDR) { |
| 312 | err = -EINVAL; |
| 313 | goto err_free_bus; |
| 314 | } |
| 315 | |
Anton Vorontsov | 2951d64 | 2009-11-04 12:52:56 +0000 | [diff] [blame] | 316 | map = ioremap(addr, size); |
| 317 | if (!map) { |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 318 | err = -ENOMEM; |
| 319 | goto err_free_bus; |
| 320 | } |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 321 | priv->map = map; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 322 | |
Anton Vorontsov | 2951d64 | 2009-11-04 12:52:56 +0000 | [diff] [blame] | 323 | if (of_device_is_compatible(np, "fsl,gianfar-mdio") || |
| 324 | of_device_is_compatible(np, "fsl,gianfar-tbi") || |
| 325 | of_device_is_compatible(np, "fsl,ucc-mdio") || |
| 326 | of_device_is_compatible(np, "ucc_geth_phy")) |
| 327 | map -= offsetof(struct fsl_pq_mdio, miimcfg); |
| 328 | regs = map; |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 329 | priv->regs = regs; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 330 | |
Grant Likely | 324931b | 2009-04-25 12:53:07 +0000 | [diff] [blame] | 331 | new_bus->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 332 | |
| 333 | if (NULL == new_bus->irq) { |
| 334 | err = -ENOMEM; |
| 335 | goto err_unmap_regs; |
| 336 | } |
| 337 | |
| 338 | new_bus->parent = &ofdev->dev; |
| 339 | dev_set_drvdata(&ofdev->dev, new_bus); |
| 340 | |
| 341 | if (of_device_is_compatible(np, "fsl,gianfar-mdio") || |
Anton Vorontsov | 3019684 | 2009-03-21 13:30:05 -0700 | [diff] [blame] | 342 | of_device_is_compatible(np, "fsl,gianfar-tbi") || |
Sandeep Gopalpet | 1d2397d | 2009-11-02 07:03:22 +0000 | [diff] [blame] | 343 | of_device_is_compatible(np, "fsl,etsec2-mdio") || |
| 344 | of_device_is_compatible(np, "fsl,etsec2-tbi") || |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 345 | of_device_is_compatible(np, "gianfar")) { |
Sandeep Gopalpet | 1d2397d | 2009-11-02 07:03:22 +0000 | [diff] [blame] | 346 | tbipa = get_gfar_tbipa(regs, np); |
| 347 | if (!tbipa) { |
| 348 | err = -EINVAL; |
| 349 | goto err_free_irqs; |
| 350 | } |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 351 | } else if (of_device_is_compatible(np, "fsl,ucc-mdio") || |
| 352 | of_device_is_compatible(np, "ucc_geth_phy")) { |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 353 | u32 id; |
Haiying Wang | fbcc0e2 | 2009-06-02 04:04:14 +0000 | [diff] [blame] | 354 | static u32 mii_mng_master; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 355 | |
| 356 | tbipa = ®s->utbipar; |
| 357 | |
| 358 | if ((err = get_ucc_id_for_range(addr, addr + size, &id))) |
| 359 | goto err_free_irqs; |
| 360 | |
Haiying Wang | fbcc0e2 | 2009-06-02 04:04:14 +0000 | [diff] [blame] | 361 | if (!mii_mng_master) { |
| 362 | mii_mng_master = id; |
| 363 | ucc_set_qe_mux_mii_mng(id - 1); |
| 364 | } |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 365 | } else { |
| 366 | err = -ENODEV; |
| 367 | goto err_free_irqs; |
| 368 | } |
| 369 | |
| 370 | for_each_child_of_node(np, tbi) { |
| 371 | if (!strncmp(tbi->type, "tbi-phy", 8)) |
| 372 | break; |
| 373 | } |
| 374 | |
| 375 | if (tbi) { |
| 376 | const u32 *prop = of_get_property(tbi, "reg", NULL); |
| 377 | |
| 378 | if (prop) |
| 379 | tbiaddr = *prop; |
Baruch Siach | c3e072f | 2011-11-14 08:21:30 +0200 | [diff] [blame] | 380 | |
Kenth Eriksson | 464b57d | 2012-03-27 22:05:54 +0000 | [diff] [blame] | 381 | if (tbiaddr == -1) { |
| 382 | err = -EBUSY; |
| 383 | goto err_free_irqs; |
| 384 | } else { |
| 385 | out_be32(tbipa, tbiaddr); |
| 386 | } |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 387 | } |
| 388 | |
Grant Likely | 324931b | 2009-04-25 12:53:07 +0000 | [diff] [blame] | 389 | err = of_mdiobus_register(new_bus, np); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 390 | if (err) { |
| 391 | printk (KERN_ERR "%s: Cannot register as MDIO bus\n", |
| 392 | new_bus->name); |
| 393 | goto err_free_irqs; |
| 394 | } |
| 395 | |
| 396 | return 0; |
| 397 | |
| 398 | err_free_irqs: |
| 399 | kfree(new_bus->irq); |
| 400 | err_unmap_regs: |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 401 | iounmap(priv->map); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 402 | err_free_bus: |
| 403 | kfree(new_bus); |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 404 | err_free_priv: |
| 405 | kfree(priv); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 406 | return err; |
| 407 | } |
| 408 | |
| 409 | |
Grant Likely | 2dc1158 | 2010-08-06 09:25:50 -0600 | [diff] [blame] | 410 | static int fsl_pq_mdio_remove(struct platform_device *ofdev) |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 411 | { |
| 412 | struct device *device = &ofdev->dev; |
| 413 | struct mii_bus *bus = dev_get_drvdata(device); |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 414 | struct fsl_pq_mdio_priv *priv = bus->priv; |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 415 | |
| 416 | mdiobus_unregister(bus); |
| 417 | |
| 418 | dev_set_drvdata(device, NULL); |
| 419 | |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 420 | iounmap(priv->map); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 421 | bus->priv = NULL; |
| 422 | mdiobus_free(bus); |
Anton Vorontsov | b3319b1 | 2009-12-30 08:23:34 +0000 | [diff] [blame] | 423 | kfree(priv); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 424 | |
| 425 | return 0; |
| 426 | } |
| 427 | |
| 428 | static struct of_device_id fsl_pq_mdio_match[] = { |
| 429 | { |
| 430 | .type = "mdio", |
| 431 | .compatible = "ucc_geth_phy", |
| 432 | }, |
| 433 | { |
| 434 | .type = "mdio", |
| 435 | .compatible = "gianfar", |
| 436 | }, |
| 437 | { |
| 438 | .compatible = "fsl,ucc-mdio", |
| 439 | }, |
| 440 | { |
| 441 | .compatible = "fsl,gianfar-tbi", |
| 442 | }, |
| 443 | { |
| 444 | .compatible = "fsl,gianfar-mdio", |
| 445 | }, |
Sandeep Gopalpet | 1d2397d | 2009-11-02 07:03:22 +0000 | [diff] [blame] | 446 | { |
| 447 | .compatible = "fsl,etsec2-tbi", |
| 448 | }, |
| 449 | { |
| 450 | .compatible = "fsl,etsec2-mdio", |
| 451 | }, |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 452 | {}, |
| 453 | }; |
Anton Vorontsov | e72701a | 2009-10-14 14:54:52 -0700 | [diff] [blame] | 454 | MODULE_DEVICE_TABLE(of, fsl_pq_mdio_match); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 455 | |
Grant Likely | 7488876 | 2011-02-22 21:05:51 -0700 | [diff] [blame] | 456 | static struct platform_driver fsl_pq_mdio_driver = { |
Grant Likely | 4018294 | 2010-04-13 16:13:02 -0700 | [diff] [blame] | 457 | .driver = { |
| 458 | .name = "fsl-pq_mdio", |
| 459 | .owner = THIS_MODULE, |
| 460 | .of_match_table = fsl_pq_mdio_match, |
| 461 | }, |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 462 | .probe = fsl_pq_mdio_probe, |
| 463 | .remove = fsl_pq_mdio_remove, |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 464 | }; |
| 465 | |
Axel Lin | db62f68 | 2011-11-27 16:44:17 +0000 | [diff] [blame] | 466 | module_platform_driver(fsl_pq_mdio_driver); |
Andy Fleming | 1577ece | 2009-02-04 16:42:12 -0800 | [diff] [blame] | 467 | |
Sebastian Siewior | 2606289 | 2009-11-06 08:50:28 +0000 | [diff] [blame] | 468 | MODULE_LICENSE("GPL"); |