blob: 14a519f2a725c3659acba4eddee0516c86cda86d [file] [log] [blame]
Narendra Muppalla1b0b3352015-09-29 10:16:51 -07001/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#ifndef _SDE_HW_MDP_CTL_H
14#define _SDE_HW_MDP_CTL_H
15
16#include "sde_hw_mdss.h"
17#include "sde_hw_catalog.h"
18
19struct sde_hw_ctl;
20/**
21 * struct sde_hw_stage_cfg - blending stage cfg
22 * @stage
23 * @border_enable
24 */
25struct sde_hw_stage_cfg {
26 enum sde_sspp stage[SDE_STAGE_MAX][PIPES_PER_STAGE];
27 u8 border_enable;
28};
29
30/**
31 * struct sde_hw_ctl_ops - Interface to the wb Hw driver functions
32 * Assumption is these functions will be called after clocks are enabled
33 */
34struct sde_hw_ctl_ops {
35 void (*setup_flush)(struct sde_hw_ctl *ctx,
36 u32 flushbits,
37 u8 force_start);
38
39 int (*reset)(struct sde_hw_ctl *c);
40
41 int (*get_bitmask_sspp)(struct sde_hw_ctl *ctx,
42 u32 *flushbits,
43 enum sde_sspp blk);
44
45 int (*get_bitmask_mixer)(struct sde_hw_ctl *ctx,
46 u32 *flushbits,
47 enum sde_lm blk);
48
49 int (*get_bitmask_dspp)(struct sde_hw_ctl *ctx,
50 u32 *flushbits,
51 enum sde_dspp blk);
52
53 int (*get_bitmask_intf)(struct sde_hw_ctl *ctx,
54 u32 *flushbits,
55 enum sde_intf blk);
56
57 int (*get_bitmask_cdm)(struct sde_hw_ctl *ctx,
58 u32 *flushbits,
59 enum sde_cdm blk);
60
61 void (*setup_blendstage)(struct sde_hw_ctl *ctx,
62 enum sde_lm lm,
63 struct sde_hw_stage_cfg *cfg);
64};
65
66/**
67 * struct sde_hw_ctl : CTL PATH driver object
68 * @struct sde_hw_blk_reg_map *hw;
69 * @idx
70 * @ctl_hw_caps
71 * @mixer_hw_caps
72 * @ops
73 */
74struct sde_hw_ctl {
75 /* base */
76 struct sde_hw_blk_reg_map hw;
77
78 /* ctl path */
79 int idx;
80 const struct sde_ctl_cfg *caps;
81 int mixer_count;
82 const struct sde_lm_cfg *mixer_hw_caps;
83
84 /* ops */
85 struct sde_hw_ctl_ops ops;
86};
87
88/**
89 * sde_hw_ctl_init(): Initializes the ctl_path hw driver object.
90 * should be called before accessing every mixer.
91 * @idx: ctl_path index for which driver object is required
92 * @addr: mapped register io address of MDP
93 * @m : pointer to mdss catalog data
94 */
95struct sde_hw_ctl *sde_hw_ctl_init(enum sde_ctl idx,
96 void __iomem *addr,
97 struct sde_mdss_cfg *m);
98
99#endif /*_SDE_HW_MDP_CTL_H */