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Felipe Balbi4a457872014-06-23 13:20:59 -05001/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/* AM437x SK EVM */
10
11/dts-v1/;
12
13#include "am4372.dtsi"
14#include <dt-bindings/pinctrl/am43xx.h>
15#include <dt-bindings/pwm/pwm.h>
16#include <dt-bindings/gpio/gpio.h>
17#include <dt-bindings/input/input.h>
18
19/ {
20 model = "TI AM437x SK EVM";
21 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
22
23 aliases {
24 display0 = &lcd0;
25 };
26
Keerthyfff51e72015-08-18 15:11:14 +053027 /* fixed 32k external oscillator clock */
28 clk_32k_rtc: clk_32k_rtc {
29 #clock-cells = <0>;
30 compatible = "fixed-clock";
31 clock-frequency = <32768>;
32 };
33
Felipe Balbi4a457872014-06-23 13:20:59 -050034 backlight {
35 compatible = "pwm-backlight";
36 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
37 brightness-levels = <0 51 53 56 62 75 101 152 255>;
38 default-brightness-level = <8>;
39 };
40
41 sound {
Peter Ujfalusi20746c52015-07-02 17:06:18 +030042 compatible = "simple-audio-card";
43 simple-audio-card,name = "AM437x-SK-EVM";
44 simple-audio-card,widgets =
45 "Headphone", "Headphone Jack",
46 "Line", "Line In";
47 simple-audio-card,routing =
48 "Headphone Jack", "HPLOUT",
49 "Headphone Jack", "HPROUT",
50 "LINE1L", "Line In",
51 "LINE1R", "Line In";
52 simple-audio-card,format = "dsp_b";
53 simple-audio-card,bitclock-master = <&sound_master>;
54 simple-audio-card,frame-master = <&sound_master>;
55 simple-audio-card,bitclock-inversion;
56
57 simple-audio-card,cpu {
58 sound-dai = <&mcasp1>;
59 };
60
61 sound_master: simple-audio-card,codec {
62 sound-dai = <&tlv320aic3106>;
63 system-clock-frequency = <24000000>;
64 };
Felipe Balbi4a457872014-06-23 13:20:59 -050065 };
66
Javier Martinez Canillas18ad99d2016-08-01 12:46:57 -040067 matrix_keypad: matrix_keypad0 {
Felipe Balbi4a457872014-06-23 13:20:59 -050068 compatible = "gpio-matrix-keypad";
69
70 pinctrl-names = "default";
71 pinctrl-0 = <&matrix_keypad_pins>;
72
73 debounce-delay-ms = <5>;
Felipe Balbif6b957f2015-04-09 10:59:27 -050074 col-scan-delay-us = <5>;
Felipe Balbi4a457872014-06-23 13:20:59 -050075
76 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */
77 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */
78
79 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */
80 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */
81
82 linux,keymap = <
83 MATRIX_KEY(0, 0, KEY_DOWN)
84 MATRIX_KEY(0, 1, KEY_RIGHT)
85 MATRIX_KEY(1, 0, KEY_LEFT)
86 MATRIX_KEY(1, 1, KEY_UP)
87 >;
88 };
89
90 leds {
91 compatible = "gpio-leds";
92
93 pinctrl-names = "default";
94 pinctrl-0 = <&leds_pins>;
95
Javier Martinez Canillasc731abd2016-08-01 12:47:03 -040096 led0 {
Felipe Balbi4a457872014-06-23 13:20:59 -050097 label = "am437x-sk:red:heartbeat";
98 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */
99 linux,default-trigger = "heartbeat";
100 default-state = "off";
101 };
102
Javier Martinez Canillasc731abd2016-08-01 12:47:03 -0400103 led1 {
Felipe Balbi4a457872014-06-23 13:20:59 -0500104 label = "am437x-sk:green:mmc1";
105 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */
106 linux,default-trigger = "mmc0";
107 default-state = "off";
108 };
109
Javier Martinez Canillasc731abd2016-08-01 12:47:03 -0400110 led2 {
Felipe Balbi4a457872014-06-23 13:20:59 -0500111 label = "am437x-sk:blue:cpu0";
112 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */
113 linux,default-trigger = "cpu0";
114 default-state = "off";
115 };
116
Javier Martinez Canillasc731abd2016-08-01 12:47:03 -0400117 led3 {
Felipe Balbi4a457872014-06-23 13:20:59 -0500118 label = "am437x-sk:blue:usr3";
119 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */
120 default-state = "off";
121 };
122 };
123
124 lcd0: display {
Tomi Valkeinend73f8252014-12-05 09:39:31 +0200125 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
Felipe Balbi4a457872014-06-23 13:20:59 -0500126 label = "lcd";
127
128 pinctrl-names = "default";
129 pinctrl-0 = <&lcd_pins>;
130
131 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
132
133 panel-timing {
134 clock-frequency = <9000000>;
135 hactive = <480>;
136 vactive = <272>;
Tomi Valkeinend73f8252014-12-05 09:39:31 +0200137 hfront-porch = <2>;
138 hback-porch = <2>;
139 hsync-len = <41>;
140 vfront-porch = <2>;
141 vback-porch = <2>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500142 vsync-len = <10>;
143 hsync-active = <0>;
144 vsync-active = <0>;
145 de-active = <1>;
146 pixelclk-active = <1>;
147 };
148
149 port {
150 lcd_in: endpoint {
151 remote-endpoint = <&dpi_out>;
152 };
153 };
154 };
155};
156
157&am43xx_pinmux {
158 matrix_keypad_pins: matrix_keypad_pins {
159 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300160 AM4372_IOPAD(0xa4c, PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */
161 AM4372_IOPAD(0xa50, PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */
162 AM4372_IOPAD(0xa54, PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */
163 AM4372_IOPAD(0xa58, PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500164 >;
165 };
166
167 leds_pins: leds_pins {
168 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300169 AM4372_IOPAD(0xa28, PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */
170 AM4372_IOPAD(0xa2c, PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */
171 AM4372_IOPAD(0xa30, PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */
172 AM4372_IOPAD(0xa34, PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500173 >;
174 };
175
176 i2c0_pins: i2c0_pins {
177 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300178 AM4372_IOPAD(0x988, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
179 AM4372_IOPAD(0x98c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
Felipe Balbi4a457872014-06-23 13:20:59 -0500180 >;
181 };
182
183 i2c1_pins: i2c1_pins {
184 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300185 AM4372_IOPAD(0x95c, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
186 AM4372_IOPAD(0x958, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
Felipe Balbi4a457872014-06-23 13:20:59 -0500187 >;
188 };
189
190 mmc1_pins: pinmux_mmc1_pins {
191 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300192 AM4372_IOPAD(0x8f0, PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
193 AM4372_IOPAD(0x8f4, PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
194 AM4372_IOPAD(0x8f8, PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
195 AM4372_IOPAD(0x8fc, PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
196 AM4372_IOPAD(0x900, PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
197 AM4372_IOPAD(0x904, PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
198 AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500199 >;
200 };
201
202 ecap0_pins: backlight_pins {
203 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300204 AM4372_IOPAD(0x964, PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
Felipe Balbi4a457872014-06-23 13:20:59 -0500205 >;
206 };
207
208 edt_ft5306_ts_pins: edt_ft5306_ts_pins {
209 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300210 AM4372_IOPAD(0x874, PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
211 AM4372_IOPAD(0x878, PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500212 >;
213 };
214
Darren Etheridge5ccaa6e2014-12-18 21:54:13 +0530215 vpfe0_pins_default: vpfe0_pins_default {
216 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300217 AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
218 AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
219 AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
220 AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
221 AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
222 AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
223 AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
224 AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
225 AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
226 AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
227 AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
228 AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
229 AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
230 AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
231 AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
Darren Etheridge5ccaa6e2014-12-18 21:54:13 +0530232 >;
233 };
234
235 vpfe0_pins_sleep: vpfe0_pins_sleep {
236 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300237 AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
238 AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
239 AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
240 AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
241 AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
242 AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
243 AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
244 AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
245 AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
246 AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
247 AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
248 AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
249 AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
250 AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
251 AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
Darren Etheridge5ccaa6e2014-12-18 21:54:13 +0530252 >;
253 };
254
Felipe Balbi4a457872014-06-23 13:20:59 -0500255 cpsw_default: cpsw_default {
256 pinctrl-single,pins = <
257 /* Slave 1 */
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300258 AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
259 AM4372_IOPAD(0x914, PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
260 AM4372_IOPAD(0x928, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
261 AM4372_IOPAD(0x924, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
262 AM4372_IOPAD(0x920, PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
263 AM4372_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
264 AM4372_IOPAD(0x930, PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
265 AM4372_IOPAD(0x918, PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
266 AM4372_IOPAD(0x940, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
267 AM4372_IOPAD(0x93c, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
268 AM4372_IOPAD(0x938, PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */
269 AM4372_IOPAD(0x934, PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500270
271 /* Slave 2 */
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300272 AM4372_IOPAD(0x858, PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
273 AM4372_IOPAD(0x840, PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
274 AM4372_IOPAD(0x854, PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
275 AM4372_IOPAD(0x850, PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
276 AM4372_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
277 AM4372_IOPAD(0x848, PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
278 AM4372_IOPAD(0x85c, PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
279 AM4372_IOPAD(0x844, PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */
280 AM4372_IOPAD(0x86c, PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
281 AM4372_IOPAD(0x868, PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
282 AM4372_IOPAD(0x864, PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
283 AM4372_IOPAD(0x860, PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500284 >;
285 };
286
287 cpsw_sleep: cpsw_sleep {
288 pinctrl-single,pins = <
289 /* Slave 1 reset value */
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300290 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
291 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
292 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
293 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
294 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
295 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
296 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
297 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
298 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
299 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
300 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
301 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
Felipe Balbi4a457872014-06-23 13:20:59 -0500302
303 /* Slave 2 reset value */
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300304 AM4372_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
305 AM4372_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
306 AM4372_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
307 AM4372_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
308 AM4372_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
309 AM4372_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
310 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
311 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
312 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
313 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
314 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
315 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
Felipe Balbi4a457872014-06-23 13:20:59 -0500316 >;
317 };
318
319 davinci_mdio_default: davinci_mdio_default {
320 pinctrl-single,pins = <
321 /* MDIO */
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300322 AM4372_IOPAD(0x948, PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
323 AM4372_IOPAD(0x94c, PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */
Felipe Balbi4a457872014-06-23 13:20:59 -0500324 >;
325 };
326
327 davinci_mdio_sleep: davinci_mdio_sleep {
328 pinctrl-single,pins = <
329 /* MDIO reset value */
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300330 AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
331 AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
Felipe Balbi4a457872014-06-23 13:20:59 -0500332 >;
333 };
334
335 dss_pins: dss_pins {
336 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300337 AM4372_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */
338 AM4372_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)
339 AM4372_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)
340 AM4372_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)
341 AM4372_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)
342 AM4372_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)
343 AM4372_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)
344 AM4372_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */
345 AM4372_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */
346 AM4372_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)
347 AM4372_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)
348 AM4372_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)
349 AM4372_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)
350 AM4372_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)
351 AM4372_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)
352 AM4372_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)
353 AM4372_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)
354 AM4372_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)
355 AM4372_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)
356 AM4372_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)
357 AM4372_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)
358 AM4372_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)
359 AM4372_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)
360 AM4372_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */
361 AM4372_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */
362 AM4372_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */
363 AM4372_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */
364 AM4372_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */
Felipe Balbi4a457872014-06-23 13:20:59 -0500365
366 >;
367 };
368
369 qspi_pins: qspi_pins {
370 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300371 AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */
372 AM4372_IOPAD(0x888, PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */
373 AM4372_IOPAD(0x890, PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */
374 AM4372_IOPAD(0x894, PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */
375 AM4372_IOPAD(0x898, PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */
376 AM4372_IOPAD(0x89c, PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500377 >;
378 };
379
380 mcasp1_pins: mcasp1_pins {
381 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300382 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
383 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
384 AM4372_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
385 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500386 >;
387 };
388
Peter Ujfalusi7155ace2015-07-02 17:06:17 +0300389 mcasp1_pins_sleep: mcasp1_pins_sleep {
390 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300391 AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
392 AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
393 AM4372_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
394 AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
Peter Ujfalusi7155ace2015-07-02 17:06:17 +0300395 >;
396 };
397
Felipe Balbi4a457872014-06-23 13:20:59 -0500398 lcd_pins: lcd_pins {
399 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300400 AM4372_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
Felipe Balbi4a457872014-06-23 13:20:59 -0500401 >;
402 };
Felipe Balbi221fed32014-12-04 11:01:57 -0600403
404 usb1_pins: usb1_pins {
405 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300406 AM4372_IOPAD(0xac0, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
Felipe Balbi221fed32014-12-04 11:01:57 -0600407 >;
408 };
409
410 usb2_pins: usb2_pins {
411 pinctrl-single,pins = <
Javier Martinez Canillase98ceb22015-11-13 01:53:56 -0300412 AM4372_IOPAD(0xac4, PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
Felipe Balbi221fed32014-12-04 11:01:57 -0600413 >;
414 };
Felipe Balbi4a457872014-06-23 13:20:59 -0500415};
416
417&i2c0 {
418 status = "okay";
419 pinctrl-names = "default";
420 pinctrl-0 = <&i2c0_pins>;
Dave Gerlachd279f7a2016-06-15 11:45:28 +0530421 clock-frequency = <100000>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500422
423 tps@24 {
424 compatible = "ti,tps65218";
425 reg = <0x24>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500426 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
427 interrupt-controller;
428 #interrupt-cells = <2>;
429
430 dcdc1: regulator-dcdc1 {
431 compatible = "ti,tps65218-dcdc1";
432 /* VDD_CORE limits min of OPP50 and max of OPP100 */
433 regulator-name = "vdd_core";
434 regulator-min-microvolt = <912000>;
435 regulator-max-microvolt = <1144000>;
436 regulator-boot-on;
437 regulator-always-on;
438 };
439
440 dcdc2: regulator-dcdc2 {
441 compatible = "ti,tps65218-dcdc2";
442 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
443 regulator-name = "vdd_mpu";
444 regulator-min-microvolt = <912000>;
445 regulator-max-microvolt = <1378000>;
446 regulator-boot-on;
447 regulator-always-on;
448 };
449
450 dcdc3: regulator-dcdc3 {
451 compatible = "ti,tps65218-dcdc3";
452 regulator-name = "vdds_ddr";
Keerthy5cd98a72014-11-06 16:20:04 +0530453 regulator-min-microvolt = <1500000>;
454 regulator-max-microvolt = <1500000>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500455 regulator-boot-on;
456 regulator-always-on;
Keerthy1bc5e132016-08-11 10:57:48 +0530457 regulator-state-mem {
458 regulator-on-in-suspend;
459 };
Felipe Balbi4a457872014-06-23 13:20:59 -0500460 };
461
462 dcdc4: regulator-dcdc4 {
463 compatible = "ti,tps65218-dcdc4";
464 regulator-name = "v3_3d";
465 regulator-min-microvolt = <3300000>;
466 regulator-max-microvolt = <3300000>;
467 regulator-boot-on;
468 regulator-always-on;
469 };
470
Keerthy1bc5e132016-08-11 10:57:48 +0530471 dcdc5: regulator-dcdc5 {
472 compatible = "ti,tps65218-dcdc5";
473 regulator-name = "v1_0bat";
474 regulator-min-microvolt = <1000000>;
475 regulator-max-microvolt = <1000000>;
476 regulator-boot-on;
477 regulator-always-on;
478 regulator-state-mem {
479 regulator-on-in-suspend;
480 };
481 };
482
483 dcdc6: regulator-dcdc6 {
484 compatible = "ti,tps65218-dcdc6";
485 regulator-name = "v1_8bat";
486 regulator-min-microvolt = <1800000>;
487 regulator-max-microvolt = <1800000>;
488 regulator-boot-on;
489 regulator-always-on;
490 regulator-state-mem {
491 regulator-on-in-suspend;
492 };
493 };
494
Felipe Balbi4a457872014-06-23 13:20:59 -0500495 ldo1: regulator-ldo1 {
496 compatible = "ti,tps65218-ldo1";
497 regulator-name = "v1_8d";
498 regulator-min-microvolt = <1800000>;
499 regulator-max-microvolt = <1800000>;
500 regulator-boot-on;
501 regulator-always-on;
502 };
503
Felipe Balbibb1c5fe2014-12-26 13:28:23 -0600504 power-button {
505 compatible = "ti,tps65218-pwrbutton";
506 status = "okay";
507 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
508 };
Felipe Balbi4a457872014-06-23 13:20:59 -0500509 };
510
511 at24@50 {
512 compatible = "at24,24c256";
513 pagesize = <64>;
514 reg = <0x50>;
515 };
516};
517
518&i2c1 {
519 status = "okay";
520 pinctrl-names = "default";
521 pinctrl-0 = <&i2c1_pins>;
522 clock-frequency = <400000>;
523
524 edt-ft5306@38 {
525 status = "okay";
526 compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
527 pinctrl-names = "default";
528 pinctrl-0 = <&edt_ft5306_ts_pins>;
529
530 reg = <0x38>;
531 interrupt-parent = <&gpio0>;
Dmitry Torokhov09bb4312015-09-12 10:22:55 -0700532 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500533
Felipe Balbifaa4ec12015-04-09 10:59:26 -0500534 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500535
536 touchscreen-size-x = <480>;
537 touchscreen-size-y = <272>;
538 };
539
540 tlv320aic3106: tlv320aic3106@1b {
Peter Ujfalusi20746c52015-07-02 17:06:18 +0300541 #sound-dai-cells = <0>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500542 compatible = "ti,tlv320aic3106";
543 reg = <0x1b>;
544 status = "okay";
545
546 /* Regulators */
547 AVDD-supply = <&dcdc4>;
548 IOVDD-supply = <&dcdc4>;
549 DRVDD-supply = <&dcdc4>;
550 DVDD-supply = <&ldo1>;
551 };
552
553 lis331dlh@18 {
554 compatible = "st,lis331dlh";
555 reg = <0x18>;
556 status = "okay";
557
558 Vdd-supply = <&dcdc4>;
559 Vdd_IO-supply = <&dcdc4>;
560 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
561 };
562};
563
564&epwmss0 {
565 status = "okay";
566};
567
568&ecap0 {
569 status = "okay";
570 pinctrl-names = "default";
571 pinctrl-0 = <&ecap0_pins>;
572};
573
574&gpio0 {
575 status = "okay";
576};
577
578&gpio1 {
579 status = "okay";
580};
581
582&gpio5 {
583 status = "okay";
584};
585
586&mmc1 {
587 status = "okay";
588 pinctrl-names = "default";
589 pinctrl-0 = <&mmc1_pins>;
590
591 vmmc-supply = <&dcdc4>;
592 bus-width = <4>;
Mugunthan V N0731cbd2015-10-12 14:37:11 +0530593 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500594};
595
596&usb2_phy1 {
597 status = "okay";
598};
599
600&usb1 {
601 dr_mode = "peripheral";
602 status = "okay";
Felipe Balbi221fed32014-12-04 11:01:57 -0600603 pinctrl-names = "default";
604 pinctrl-0 = <&usb1_pins>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500605};
606
607&usb2_phy2 {
608 status = "okay";
609};
610
611&usb2 {
612 dr_mode = "host";
613 status = "okay";
Felipe Balbi221fed32014-12-04 11:01:57 -0600614 pinctrl-names = "default";
615 pinctrl-0 = <&usb2_pins>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500616};
617
618&qspi {
619 status = "okay";
620 pinctrl-names = "default";
621 pinctrl-0 = <&qspi_pins>;
622
623 spi-max-frequency = <48000000>;
624 m25p80@0 {
625 compatible = "mx66l51235l";
626 spi-max-frequency = <48000000>;
627 reg = <0>;
628 spi-cpol;
629 spi-cpha;
630 spi-tx-bus-width = <1>;
631 spi-rx-bus-width = <4>;
632 #address-cells = <1>;
633 #size-cells = <1>;
634
635 /* MTD partition table.
636 * The ROM checks the first 512KiB
637 * for a valid file to boot(XIP).
638 */
639 partition@0 {
640 label = "QSPI.U_BOOT";
641 reg = <0x00000000 0x000080000>;
642 };
643 partition@1 {
644 label = "QSPI.U_BOOT.backup";
645 reg = <0x00080000 0x00080000>;
646 };
647 partition@2 {
648 label = "QSPI.U-BOOT-SPL_OS";
649 reg = <0x00100000 0x00010000>;
650 };
651 partition@3 {
652 label = "QSPI.U_BOOT_ENV";
653 reg = <0x00110000 0x00010000>;
654 };
655 partition@4 {
656 label = "QSPI.U-BOOT-ENV.backup";
657 reg = <0x00120000 0x00010000>;
658 };
659 partition@5 {
660 label = "QSPI.KERNEL";
661 reg = <0x00130000 0x0800000>;
662 };
663 partition@6 {
664 label = "QSPI.FILESYSTEM";
665 reg = <0x00930000 0x36D0000>;
666 };
667 };
668};
669
670&mac {
671 pinctrl-names = "default", "sleep";
672 pinctrl-0 = <&cpsw_default>;
673 pinctrl-1 = <&cpsw_sleep>;
674 dual_emac = <1>;
675 status = "okay";
676};
677
678&davinci_mdio {
679 pinctrl-names = "default", "sleep";
680 pinctrl-0 = <&davinci_mdio_default>;
681 pinctrl-1 = <&davinci_mdio_sleep>;
682 status = "okay";
683};
684
685&cpsw_emac0 {
686 phy_id = <&davinci_mdio>, <4>;
687 phy-mode = "rgmii";
688 dual_emac_res_vlan = <1>;
689};
690
691&cpsw_emac1 {
692 phy_id = <&davinci_mdio>, <5>;
693 phy-mode = "rgmii";
694 dual_emac_res_vlan = <2>;
695};
696
697&elm {
698 status = "okay";
699};
700
701&mcasp1 {
Peter Ujfalusi20746c52015-07-02 17:06:18 +0300702 #sound-dai-cells = <0>;
Peter Ujfalusi7155ace2015-07-02 17:06:17 +0300703 pinctrl-names = "default", "sleep";
Felipe Balbi4a457872014-06-23 13:20:59 -0500704 pinctrl-0 = <&mcasp1_pins>;
Peter Ujfalusi7155ace2015-07-02 17:06:17 +0300705 pinctrl-1 = <&mcasp1_pins_sleep>;
Felipe Balbi4a457872014-06-23 13:20:59 -0500706
707 status = "okay";
708
709 op-mode = <0>;
710 tdm-slots = <2>;
711 serial-dir = <
712 0 0 1 2
713 >;
714
715 tx-num-evt = <1>;
716 rx-num-evt = <1>;
717};
718
719&dss {
720 status = "okay";
721
722 pinctrl-names = "default";
723 pinctrl-0 = <&dss_pins>;
724
725 port {
726 dpi_out: endpoint@0 {
727 remote-endpoint = <&lcd_in>;
728 data-lines = <24>;
729 };
730 };
731};
732
733&rtc {
Keerthyfff51e72015-08-18 15:11:14 +0530734 clocks = <&clk_32k_rtc>, <&clk_32768_ck>;
735 clock-names = "ext-clk", "int-clk";
Felipe Balbi4a457872014-06-23 13:20:59 -0500736 status = "okay";
737};
738
739&wdt {
740 status = "okay";
741};
Dave Gerlach3e1fe452014-12-04 09:24:39 -0600742
743&cpu {
744 cpu0-supply = <&dcdc2>;
745};
Darren Etheridge5ccaa6e2014-12-18 21:54:13 +0530746
747&vpfe0 {
748 status = "okay";
749 pinctrl-names = "default", "sleep";
750 pinctrl-0 = <&vpfe0_pins_default>;
751 pinctrl-1 = <&vpfe0_pins_sleep>;
752
753 /* Camera port */
754 port {
755 vpfe0_ep: endpoint {
756 /* remote-endpoint = <&sensor>; add once we have it */
757 ti,am437x-vpfe-interface = <0>;
758 bus-width = <8>;
759 hsync-active = <0>;
760 vsync-active = <0>;
761 };
762 };
763};