Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 1 | /* |
| 2 | * TI Palmas MFD Driver |
| 3 | * |
| 4 | * Copyright 2011-2012 Texas Instruments Inc. |
| 5 | * |
| 6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the |
| 10 | * Free Software Foundation; either version 2 of the License, or (at your |
| 11 | * option) any later version. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #include <linux/module.h> |
| 16 | #include <linux/moduleparam.h> |
| 17 | #include <linux/init.h> |
| 18 | #include <linux/slab.h> |
| 19 | #include <linux/i2c.h> |
| 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/irq.h> |
| 22 | #include <linux/regmap.h> |
| 23 | #include <linux/err.h> |
| 24 | #include <linux/mfd/core.h> |
| 25 | #include <linux/mfd/palmas.h> |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 26 | #include <linux/of_device.h> |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 27 | |
Laxman Dewangan | cc01b46 | 2013-08-13 13:23:11 +0530 | [diff] [blame] | 28 | #define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 | \ |
| 29 | PALMAS_EXT_CONTROL_ENABLE2 | \ |
| 30 | PALMAS_EXT_CONTROL_NSLEEP) |
| 31 | |
| 32 | struct palmas_sleep_requestor_info { |
| 33 | int id; |
| 34 | int reg_offset; |
| 35 | int bit_pos; |
| 36 | }; |
| 37 | |
| 38 | #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ |
| 39 | [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \ |
| 40 | .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \ |
| 41 | .reg_offset = _offset, \ |
| 42 | .bit_pos = _pos, \ |
| 43 | } |
| 44 | |
| 45 | static struct palmas_sleep_requestor_info sleep_req_info[] = { |
| 46 | EXTERNAL_REQUESTOR(REGEN1, 0, 0), |
| 47 | EXTERNAL_REQUESTOR(REGEN2, 0, 1), |
| 48 | EXTERNAL_REQUESTOR(SYSEN1, 0, 2), |
| 49 | EXTERNAL_REQUESTOR(SYSEN2, 0, 3), |
| 50 | EXTERNAL_REQUESTOR(CLK32KG, 0, 4), |
| 51 | EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5), |
| 52 | EXTERNAL_REQUESTOR(REGEN3, 0, 6), |
| 53 | EXTERNAL_REQUESTOR(SMPS12, 1, 0), |
| 54 | EXTERNAL_REQUESTOR(SMPS3, 1, 1), |
| 55 | EXTERNAL_REQUESTOR(SMPS45, 1, 2), |
| 56 | EXTERNAL_REQUESTOR(SMPS6, 1, 3), |
| 57 | EXTERNAL_REQUESTOR(SMPS7, 1, 4), |
| 58 | EXTERNAL_REQUESTOR(SMPS8, 1, 5), |
| 59 | EXTERNAL_REQUESTOR(SMPS9, 1, 6), |
| 60 | EXTERNAL_REQUESTOR(SMPS10, 1, 7), |
| 61 | EXTERNAL_REQUESTOR(LDO1, 2, 0), |
| 62 | EXTERNAL_REQUESTOR(LDO2, 2, 1), |
| 63 | EXTERNAL_REQUESTOR(LDO3, 2, 2), |
| 64 | EXTERNAL_REQUESTOR(LDO4, 2, 3), |
| 65 | EXTERNAL_REQUESTOR(LDO5, 2, 4), |
| 66 | EXTERNAL_REQUESTOR(LDO6, 2, 5), |
| 67 | EXTERNAL_REQUESTOR(LDO7, 2, 6), |
| 68 | EXTERNAL_REQUESTOR(LDO8, 2, 7), |
| 69 | EXTERNAL_REQUESTOR(LDO9, 3, 0), |
| 70 | EXTERNAL_REQUESTOR(LDOLN, 3, 1), |
| 71 | EXTERNAL_REQUESTOR(LDOUSB, 3, 2), |
| 72 | }; |
| 73 | |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 74 | static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = { |
| 75 | { |
| 76 | .reg_bits = 8, |
| 77 | .val_bits = 8, |
| 78 | .max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE, |
| 79 | PALMAS_PRIMARY_SECONDARY_PAD3), |
| 80 | }, |
| 81 | { |
| 82 | .reg_bits = 8, |
| 83 | .val_bits = 8, |
| 84 | .max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE, |
| 85 | PALMAS_GPADC_SMPS_VSEL_MONITORING), |
| 86 | }, |
| 87 | { |
| 88 | .reg_bits = 8, |
| 89 | .val_bits = 8, |
| 90 | .max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE, |
| 91 | PALMAS_GPADC_TRIM16), |
| 92 | }, |
| 93 | }; |
| 94 | |
Keerthy | 1c113d8 | 2014-06-18 15:28:55 +0530 | [diff] [blame^] | 95 | static const struct regmap_irq tps65917_irqs[] = { |
| 96 | /* INT1 IRQs */ |
| 97 | [TPS65917_RESERVED1] = { |
| 98 | .mask = TPS65917_RESERVED, |
| 99 | }, |
| 100 | [TPS65917_PWRON_IRQ] = { |
| 101 | .mask = TPS65917_INT1_STATUS_PWRON, |
| 102 | }, |
| 103 | [TPS65917_LONG_PRESS_KEY_IRQ] = { |
| 104 | .mask = TPS65917_INT1_STATUS_LONG_PRESS_KEY, |
| 105 | }, |
| 106 | [TPS65917_RESERVED2] = { |
| 107 | .mask = TPS65917_RESERVED, |
| 108 | }, |
| 109 | [TPS65917_PWRDOWN_IRQ] = { |
| 110 | .mask = TPS65917_INT1_STATUS_PWRDOWN, |
| 111 | }, |
| 112 | [TPS65917_HOTDIE_IRQ] = { |
| 113 | .mask = TPS65917_INT1_STATUS_HOTDIE, |
| 114 | }, |
| 115 | [TPS65917_VSYS_MON_IRQ] = { |
| 116 | .mask = TPS65917_INT1_STATUS_VSYS_MON, |
| 117 | }, |
| 118 | [TPS65917_RESERVED3] = { |
| 119 | .mask = TPS65917_RESERVED, |
| 120 | }, |
| 121 | /* INT2 IRQs*/ |
| 122 | [TPS65917_RESERVED4] = { |
| 123 | .mask = TPS65917_RESERVED, |
| 124 | .reg_offset = 1, |
| 125 | }, |
| 126 | [TPS65917_OTP_ERROR_IRQ] = { |
| 127 | .mask = TPS65917_INT2_STATUS_OTP_ERROR, |
| 128 | .reg_offset = 1, |
| 129 | }, |
| 130 | [TPS65917_WDT_IRQ] = { |
| 131 | .mask = TPS65917_INT2_STATUS_WDT, |
| 132 | .reg_offset = 1, |
| 133 | }, |
| 134 | [TPS65917_RESERVED5] = { |
| 135 | .mask = TPS65917_RESERVED, |
| 136 | .reg_offset = 1, |
| 137 | }, |
| 138 | [TPS65917_RESET_IN_IRQ] = { |
| 139 | .mask = TPS65917_INT2_STATUS_RESET_IN, |
| 140 | .reg_offset = 1, |
| 141 | }, |
| 142 | [TPS65917_FSD_IRQ] = { |
| 143 | .mask = TPS65917_INT2_STATUS_FSD, |
| 144 | .reg_offset = 1, |
| 145 | }, |
| 146 | [TPS65917_SHORT_IRQ] = { |
| 147 | .mask = TPS65917_INT2_STATUS_SHORT, |
| 148 | .reg_offset = 1, |
| 149 | }, |
| 150 | [TPS65917_RESERVED6] = { |
| 151 | .mask = TPS65917_RESERVED, |
| 152 | .reg_offset = 1, |
| 153 | }, |
| 154 | /* INT3 IRQs */ |
| 155 | [TPS65917_GPADC_AUTO_0_IRQ] = { |
| 156 | .mask = TPS65917_INT3_STATUS_GPADC_AUTO_0, |
| 157 | .reg_offset = 2, |
| 158 | }, |
| 159 | [TPS65917_GPADC_AUTO_1_IRQ] = { |
| 160 | .mask = TPS65917_INT3_STATUS_GPADC_AUTO_1, |
| 161 | .reg_offset = 2, |
| 162 | }, |
| 163 | [TPS65917_GPADC_EOC_SW_IRQ] = { |
| 164 | .mask = TPS65917_INT3_STATUS_GPADC_EOC_SW, |
| 165 | .reg_offset = 2, |
| 166 | }, |
| 167 | [TPS65917_RESREVED6] = { |
| 168 | .mask = TPS65917_RESERVED6, |
| 169 | .reg_offset = 2, |
| 170 | }, |
| 171 | [TPS65917_RESERVED7] = { |
| 172 | .mask = TPS65917_RESERVED, |
| 173 | .reg_offset = 2, |
| 174 | }, |
| 175 | [TPS65917_RESERVED8] = { |
| 176 | .mask = TPS65917_RESERVED, |
| 177 | .reg_offset = 2, |
| 178 | }, |
| 179 | [TPS65917_RESERVED9] = { |
| 180 | .mask = TPS65917_RESERVED, |
| 181 | .reg_offset = 2, |
| 182 | }, |
| 183 | [TPS65917_VBUS_IRQ] = { |
| 184 | .mask = TPS65917_INT3_STATUS_VBUS, |
| 185 | .reg_offset = 2, |
| 186 | }, |
| 187 | /* INT4 IRQs */ |
| 188 | [TPS65917_GPIO_0_IRQ] = { |
| 189 | .mask = TPS65917_INT4_STATUS_GPIO_0, |
| 190 | .reg_offset = 3, |
| 191 | }, |
| 192 | [TPS65917_GPIO_1_IRQ] = { |
| 193 | .mask = TPS65917_INT4_STATUS_GPIO_1, |
| 194 | .reg_offset = 3, |
| 195 | }, |
| 196 | [TPS65917_GPIO_2_IRQ] = { |
| 197 | .mask = TPS65917_INT4_STATUS_GPIO_2, |
| 198 | .reg_offset = 3, |
| 199 | }, |
| 200 | [TPS65917_GPIO_3_IRQ] = { |
| 201 | .mask = TPS65917_INT4_STATUS_GPIO_3, |
| 202 | .reg_offset = 3, |
| 203 | }, |
| 204 | [TPS65917_GPIO_4_IRQ] = { |
| 205 | .mask = TPS65917_INT4_STATUS_GPIO_4, |
| 206 | .reg_offset = 3, |
| 207 | }, |
| 208 | [TPS65917_GPIO_5_IRQ] = { |
| 209 | .mask = TPS65917_INT4_STATUS_GPIO_5, |
| 210 | .reg_offset = 3, |
| 211 | }, |
| 212 | [TPS65917_GPIO_6_IRQ] = { |
| 213 | .mask = TPS65917_INT4_STATUS_GPIO_6, |
| 214 | .reg_offset = 3, |
| 215 | }, |
| 216 | [TPS65917_RESERVED10] = { |
| 217 | .mask = TPS65917_RESERVED10, |
| 218 | .reg_offset = 3, |
| 219 | }, |
| 220 | }; |
| 221 | |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 222 | static const struct regmap_irq palmas_irqs[] = { |
| 223 | /* INT1 IRQs */ |
| 224 | [PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = { |
| 225 | .mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV, |
| 226 | }, |
| 227 | [PALMAS_PWRON_IRQ] = { |
| 228 | .mask = PALMAS_INT1_STATUS_PWRON, |
| 229 | }, |
| 230 | [PALMAS_LONG_PRESS_KEY_IRQ] = { |
| 231 | .mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY, |
| 232 | }, |
| 233 | [PALMAS_RPWRON_IRQ] = { |
| 234 | .mask = PALMAS_INT1_STATUS_RPWRON, |
| 235 | }, |
| 236 | [PALMAS_PWRDOWN_IRQ] = { |
| 237 | .mask = PALMAS_INT1_STATUS_PWRDOWN, |
| 238 | }, |
| 239 | [PALMAS_HOTDIE_IRQ] = { |
| 240 | .mask = PALMAS_INT1_STATUS_HOTDIE, |
| 241 | }, |
| 242 | [PALMAS_VSYS_MON_IRQ] = { |
| 243 | .mask = PALMAS_INT1_STATUS_VSYS_MON, |
| 244 | }, |
| 245 | [PALMAS_VBAT_MON_IRQ] = { |
| 246 | .mask = PALMAS_INT1_STATUS_VBAT_MON, |
| 247 | }, |
| 248 | /* INT2 IRQs*/ |
| 249 | [PALMAS_RTC_ALARM_IRQ] = { |
| 250 | .mask = PALMAS_INT2_STATUS_RTC_ALARM, |
| 251 | .reg_offset = 1, |
| 252 | }, |
| 253 | [PALMAS_RTC_TIMER_IRQ] = { |
| 254 | .mask = PALMAS_INT2_STATUS_RTC_TIMER, |
| 255 | .reg_offset = 1, |
| 256 | }, |
| 257 | [PALMAS_WDT_IRQ] = { |
| 258 | .mask = PALMAS_INT2_STATUS_WDT, |
| 259 | .reg_offset = 1, |
| 260 | }, |
| 261 | [PALMAS_BATREMOVAL_IRQ] = { |
| 262 | .mask = PALMAS_INT2_STATUS_BATREMOVAL, |
| 263 | .reg_offset = 1, |
| 264 | }, |
| 265 | [PALMAS_RESET_IN_IRQ] = { |
| 266 | .mask = PALMAS_INT2_STATUS_RESET_IN, |
| 267 | .reg_offset = 1, |
| 268 | }, |
| 269 | [PALMAS_FBI_BB_IRQ] = { |
| 270 | .mask = PALMAS_INT2_STATUS_FBI_BB, |
| 271 | .reg_offset = 1, |
| 272 | }, |
| 273 | [PALMAS_SHORT_IRQ] = { |
| 274 | .mask = PALMAS_INT2_STATUS_SHORT, |
| 275 | .reg_offset = 1, |
| 276 | }, |
| 277 | [PALMAS_VAC_ACOK_IRQ] = { |
| 278 | .mask = PALMAS_INT2_STATUS_VAC_ACOK, |
| 279 | .reg_offset = 1, |
| 280 | }, |
| 281 | /* INT3 IRQs */ |
| 282 | [PALMAS_GPADC_AUTO_0_IRQ] = { |
| 283 | .mask = PALMAS_INT3_STATUS_GPADC_AUTO_0, |
| 284 | .reg_offset = 2, |
| 285 | }, |
| 286 | [PALMAS_GPADC_AUTO_1_IRQ] = { |
| 287 | .mask = PALMAS_INT3_STATUS_GPADC_AUTO_1, |
| 288 | .reg_offset = 2, |
| 289 | }, |
| 290 | [PALMAS_GPADC_EOC_SW_IRQ] = { |
| 291 | .mask = PALMAS_INT3_STATUS_GPADC_EOC_SW, |
| 292 | .reg_offset = 2, |
| 293 | }, |
| 294 | [PALMAS_GPADC_EOC_RT_IRQ] = { |
| 295 | .mask = PALMAS_INT3_STATUS_GPADC_EOC_RT, |
| 296 | .reg_offset = 2, |
| 297 | }, |
| 298 | [PALMAS_ID_OTG_IRQ] = { |
| 299 | .mask = PALMAS_INT3_STATUS_ID_OTG, |
| 300 | .reg_offset = 2, |
| 301 | }, |
| 302 | [PALMAS_ID_IRQ] = { |
| 303 | .mask = PALMAS_INT3_STATUS_ID, |
| 304 | .reg_offset = 2, |
| 305 | }, |
| 306 | [PALMAS_VBUS_OTG_IRQ] = { |
| 307 | .mask = PALMAS_INT3_STATUS_VBUS_OTG, |
| 308 | .reg_offset = 2, |
| 309 | }, |
| 310 | [PALMAS_VBUS_IRQ] = { |
| 311 | .mask = PALMAS_INT3_STATUS_VBUS, |
| 312 | .reg_offset = 2, |
| 313 | }, |
| 314 | /* INT4 IRQs */ |
| 315 | [PALMAS_GPIO_0_IRQ] = { |
| 316 | .mask = PALMAS_INT4_STATUS_GPIO_0, |
| 317 | .reg_offset = 3, |
| 318 | }, |
| 319 | [PALMAS_GPIO_1_IRQ] = { |
| 320 | .mask = PALMAS_INT4_STATUS_GPIO_1, |
| 321 | .reg_offset = 3, |
| 322 | }, |
| 323 | [PALMAS_GPIO_2_IRQ] = { |
| 324 | .mask = PALMAS_INT4_STATUS_GPIO_2, |
| 325 | .reg_offset = 3, |
| 326 | }, |
| 327 | [PALMAS_GPIO_3_IRQ] = { |
| 328 | .mask = PALMAS_INT4_STATUS_GPIO_3, |
| 329 | .reg_offset = 3, |
| 330 | }, |
| 331 | [PALMAS_GPIO_4_IRQ] = { |
| 332 | .mask = PALMAS_INT4_STATUS_GPIO_4, |
| 333 | .reg_offset = 3, |
| 334 | }, |
| 335 | [PALMAS_GPIO_5_IRQ] = { |
| 336 | .mask = PALMAS_INT4_STATUS_GPIO_5, |
| 337 | .reg_offset = 3, |
| 338 | }, |
| 339 | [PALMAS_GPIO_6_IRQ] = { |
| 340 | .mask = PALMAS_INT4_STATUS_GPIO_6, |
| 341 | .reg_offset = 3, |
| 342 | }, |
| 343 | [PALMAS_GPIO_7_IRQ] = { |
| 344 | .mask = PALMAS_INT4_STATUS_GPIO_7, |
| 345 | .reg_offset = 3, |
| 346 | }, |
| 347 | }; |
| 348 | |
| 349 | static struct regmap_irq_chip palmas_irq_chip = { |
| 350 | .name = "palmas", |
| 351 | .irqs = palmas_irqs, |
| 352 | .num_irqs = ARRAY_SIZE(palmas_irqs), |
| 353 | |
| 354 | .num_regs = 4, |
| 355 | .irq_reg_stride = 5, |
| 356 | .status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, |
| 357 | PALMAS_INT1_STATUS), |
| 358 | .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, |
| 359 | PALMAS_INT1_MASK), |
| 360 | }; |
| 361 | |
Keerthy | 1c113d8 | 2014-06-18 15:28:55 +0530 | [diff] [blame^] | 362 | static struct regmap_irq_chip tps65917_irq_chip = { |
| 363 | .name = "tps65917", |
| 364 | .irqs = tps65917_irqs, |
| 365 | .num_irqs = ARRAY_SIZE(tps65917_irqs), |
| 366 | |
| 367 | .num_regs = 4, |
| 368 | .irq_reg_stride = 5, |
| 369 | .status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, |
| 370 | PALMAS_INT1_STATUS), |
| 371 | .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, |
| 372 | PALMAS_INT1_MASK), |
| 373 | }; |
| 374 | |
Laxman Dewangan | cc01b46 | 2013-08-13 13:23:11 +0530 | [diff] [blame] | 375 | int palmas_ext_control_req_config(struct palmas *palmas, |
| 376 | enum palmas_external_requestor_id id, int ext_ctrl, bool enable) |
| 377 | { |
| 378 | int preq_mask_bit = 0; |
| 379 | int reg_add = 0; |
| 380 | int bit_pos; |
| 381 | int ret; |
| 382 | |
| 383 | if (!(ext_ctrl & PALMAS_EXT_REQ)) |
| 384 | return 0; |
| 385 | |
| 386 | if (id >= PALMAS_EXTERNAL_REQSTR_ID_MAX) |
| 387 | return 0; |
| 388 | |
| 389 | if (ext_ctrl & PALMAS_EXT_CONTROL_NSLEEP) { |
| 390 | reg_add = PALMAS_NSLEEP_RES_ASSIGN; |
| 391 | preq_mask_bit = 0; |
| 392 | } else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE1) { |
| 393 | reg_add = PALMAS_ENABLE1_RES_ASSIGN; |
| 394 | preq_mask_bit = 1; |
| 395 | } else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE2) { |
| 396 | reg_add = PALMAS_ENABLE2_RES_ASSIGN; |
| 397 | preq_mask_bit = 2; |
| 398 | } |
| 399 | |
| 400 | bit_pos = sleep_req_info[id].bit_pos; |
| 401 | reg_add += sleep_req_info[id].reg_offset; |
| 402 | if (enable) |
| 403 | ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, |
| 404 | reg_add, BIT(bit_pos), BIT(bit_pos)); |
| 405 | else |
| 406 | ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, |
| 407 | reg_add, BIT(bit_pos), 0); |
| 408 | if (ret < 0) { |
| 409 | dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n", |
| 410 | reg_add, ret); |
| 411 | return ret; |
| 412 | } |
| 413 | |
| 414 | /* Unmask the PREQ */ |
| 415 | ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE, |
| 416 | PALMAS_POWER_CTRL, BIT(preq_mask_bit), 0); |
| 417 | if (ret < 0) { |
| 418 | dev_err(palmas->dev, "POWER_CTRL register update failed %d\n", |
| 419 | ret); |
| 420 | return ret; |
| 421 | } |
| 422 | return ret; |
| 423 | } |
| 424 | EXPORT_SYMBOL_GPL(palmas_ext_control_req_config); |
| 425 | |
Laxman Dewangan | df545d1 | 2013-03-01 20:13:46 +0530 | [diff] [blame] | 426 | static int palmas_set_pdata_irq_flag(struct i2c_client *i2c, |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 427 | struct palmas_platform_data *pdata) |
| 428 | { |
Laxman Dewangan | df545d1 | 2013-03-01 20:13:46 +0530 | [diff] [blame] | 429 | struct irq_data *irq_data = irq_get_irq_data(i2c->irq); |
| 430 | if (!irq_data) { |
| 431 | dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq); |
| 432 | return -EINVAL; |
| 433 | } |
| 434 | |
| 435 | pdata->irq_flags = irqd_get_trigger_type(irq_data); |
| 436 | dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags); |
| 437 | return 0; |
| 438 | } |
| 439 | |
| 440 | static void palmas_dt_to_pdata(struct i2c_client *i2c, |
| 441 | struct palmas_platform_data *pdata) |
| 442 | { |
| 443 | struct device_node *node = i2c->dev.of_node; |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 444 | int ret; |
| 445 | u32 prop; |
| 446 | |
J Keerthy | 2154a2b | 2013-02-18 10:42:44 +0530 | [diff] [blame] | 447 | ret = of_property_read_u32(node, "ti,mux-pad1", &prop); |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 448 | if (!ret) { |
| 449 | pdata->mux_from_pdata = 1; |
| 450 | pdata->pad1 = prop; |
| 451 | } |
| 452 | |
J Keerthy | 2154a2b | 2013-02-18 10:42:44 +0530 | [diff] [blame] | 453 | ret = of_property_read_u32(node, "ti,mux-pad2", &prop); |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 454 | if (!ret) { |
| 455 | pdata->mux_from_pdata = 1; |
| 456 | pdata->pad2 = prop; |
| 457 | } |
| 458 | |
| 459 | /* The default for this register is all masked */ |
J Keerthy | 2154a2b | 2013-02-18 10:42:44 +0530 | [diff] [blame] | 460 | ret = of_property_read_u32(node, "ti,power-ctrl", &prop); |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 461 | if (!ret) |
| 462 | pdata->power_ctrl = prop; |
| 463 | else |
| 464 | pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK | |
| 465 | PALMAS_POWER_CTRL_ENABLE1_MASK | |
| 466 | PALMAS_POWER_CTRL_ENABLE2_MASK; |
Laxman Dewangan | df545d1 | 2013-03-01 20:13:46 +0530 | [diff] [blame] | 467 | if (i2c->irq) |
| 468 | palmas_set_pdata_irq_flag(i2c, pdata); |
Bill Huang | b81eec0 | 2013-08-08 04:45:05 -0700 | [diff] [blame] | 469 | |
| 470 | pdata->pm_off = of_property_read_bool(node, |
| 471 | "ti,system-power-controller"); |
| 472 | } |
| 473 | |
| 474 | static struct palmas *palmas_dev; |
| 475 | static void palmas_power_off(void) |
| 476 | { |
| 477 | unsigned int addr; |
| 478 | int ret, slave; |
| 479 | |
| 480 | if (!palmas_dev) |
| 481 | return; |
| 482 | |
| 483 | slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE); |
| 484 | addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_DEV_CTRL); |
| 485 | |
| 486 | ret = regmap_update_bits( |
| 487 | palmas_dev->regmap[slave], |
| 488 | addr, |
| 489 | PALMAS_DEV_CTRL_DEV_ON, |
| 490 | 0); |
| 491 | |
| 492 | if (ret) |
| 493 | pr_err("%s: Unable to write to DEV_CTRL_DEV_ON: %d\n", |
| 494 | __func__, ret); |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 495 | } |
| 496 | |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 497 | static unsigned int palmas_features = PALMAS_PMIC_FEATURE_SMPS10_BOOST; |
J Keerthy | 4124e6e | 2013-06-20 16:35:16 +0530 | [diff] [blame] | 498 | static unsigned int tps659038_features; |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 499 | |
Keerthy | 1c113d8 | 2014-06-18 15:28:55 +0530 | [diff] [blame^] | 500 | struct palmas_driver_data { |
| 501 | unsigned int *features; |
| 502 | struct regmap_irq_chip *irq_chip; |
| 503 | }; |
| 504 | |
| 505 | static struct palmas_driver_data palmas_data = { |
| 506 | .features = &palmas_features, |
| 507 | .irq_chip = &palmas_irq_chip, |
| 508 | }; |
| 509 | |
| 510 | static struct palmas_driver_data tps659038_data = { |
| 511 | .features = &tps659038_features, |
| 512 | .irq_chip = &palmas_irq_chip, |
| 513 | }; |
| 514 | |
| 515 | static struct palmas_driver_data tps65917_data = { |
| 516 | .features = &tps659038_features, |
| 517 | .irq_chip = &tps65917_irq_chip, |
| 518 | }; |
| 519 | |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 520 | static const struct of_device_id of_palmas_match_tbl[] = { |
| 521 | { |
| 522 | .compatible = "ti,palmas", |
Keerthy | 1c113d8 | 2014-06-18 15:28:55 +0530 | [diff] [blame^] | 523 | .data = &palmas_data, |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 524 | }, |
J Keerthy | 4124e6e | 2013-06-20 16:35:16 +0530 | [diff] [blame] | 525 | { |
| 526 | .compatible = "ti,tps659038", |
Keerthy | 1c113d8 | 2014-06-18 15:28:55 +0530 | [diff] [blame^] | 527 | .data = &tps659038_data, |
| 528 | }, |
| 529 | { |
| 530 | .compatible = "ti,tps65917", |
| 531 | .data = &tps65917_data, |
J Keerthy | 4124e6e | 2013-06-20 16:35:16 +0530 | [diff] [blame] | 532 | }, |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 533 | { }, |
| 534 | }; |
Laxman Dewangan | 2d8edaf | 2013-09-26 19:03:49 +0530 | [diff] [blame] | 535 | MODULE_DEVICE_TABLE(of, of_palmas_match_tbl); |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 536 | |
Bill Pemberton | f791be4 | 2012-11-19 13:23:04 -0500 | [diff] [blame] | 537 | static int palmas_i2c_probe(struct i2c_client *i2c, |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 538 | const struct i2c_device_id *id) |
| 539 | { |
| 540 | struct palmas *palmas; |
| 541 | struct palmas_platform_data *pdata; |
Keerthy | 1c113d8 | 2014-06-18 15:28:55 +0530 | [diff] [blame^] | 542 | struct palmas_driver_data *driver_data; |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 543 | struct device_node *node = i2c->dev.of_node; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 544 | int ret = 0, i; |
Keerthy | 1c113d8 | 2014-06-18 15:28:55 +0530 | [diff] [blame^] | 545 | unsigned int reg, addr; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 546 | int slave; |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 547 | const struct of_device_id *match; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 548 | |
| 549 | pdata = dev_get_platdata(&i2c->dev); |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 550 | |
| 551 | if (node && !pdata) { |
| 552 | pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL); |
| 553 | |
| 554 | if (!pdata) |
| 555 | return -ENOMEM; |
| 556 | |
Laxman Dewangan | df545d1 | 2013-03-01 20:13:46 +0530 | [diff] [blame] | 557 | palmas_dt_to_pdata(i2c, pdata); |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 558 | } |
| 559 | |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 560 | if (!pdata) |
| 561 | return -EINVAL; |
| 562 | |
| 563 | palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL); |
| 564 | if (palmas == NULL) |
| 565 | return -ENOMEM; |
| 566 | |
| 567 | i2c_set_clientdata(i2c, palmas); |
| 568 | palmas->dev = &i2c->dev; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 569 | palmas->irq = i2c->irq; |
| 570 | |
Sachin Kamat | 84195b7 | 2013-10-15 09:18:51 +0530 | [diff] [blame] | 571 | match = of_match_device(of_palmas_match_tbl, &i2c->dev); |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 572 | |
| 573 | if (!match) |
| 574 | return -ENODATA; |
| 575 | |
Keerthy | 1c113d8 | 2014-06-18 15:28:55 +0530 | [diff] [blame^] | 576 | driver_data = (struct palmas_driver_data *)match->data; |
| 577 | palmas->features = *driver_data->features; |
J Keerthy | 1ffb0be | 2013-06-19 11:27:48 +0530 | [diff] [blame] | 578 | |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 579 | for (i = 0; i < PALMAS_NUM_CLIENTS; i++) { |
| 580 | if (i == 0) |
| 581 | palmas->i2c_clients[i] = i2c; |
| 582 | else { |
| 583 | palmas->i2c_clients[i] = |
| 584 | i2c_new_dummy(i2c->adapter, |
| 585 | i2c->addr + i); |
| 586 | if (!palmas->i2c_clients[i]) { |
| 587 | dev_err(palmas->dev, |
| 588 | "can't attach client %d\n", i); |
| 589 | ret = -ENOMEM; |
Laxman Dewangan | 5e172d7 | 2013-09-26 19:03:51 +0530 | [diff] [blame] | 590 | goto err_i2c; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 591 | } |
Laxman Dewangan | c4fbec3 | 2013-03-19 14:28:20 +0530 | [diff] [blame] | 592 | palmas->i2c_clients[i]->dev.of_node = of_node_get(node); |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 593 | } |
| 594 | palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i], |
| 595 | &palmas_regmap_config[i]); |
| 596 | if (IS_ERR(palmas->regmap[i])) { |
| 597 | ret = PTR_ERR(palmas->regmap[i]); |
| 598 | dev_err(palmas->dev, |
| 599 | "Failed to allocate regmap %d, err: %d\n", |
| 600 | i, ret); |
Laxman Dewangan | 5e172d7 | 2013-09-26 19:03:51 +0530 | [diff] [blame] | 601 | goto err_i2c; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 602 | } |
| 603 | } |
| 604 | |
J Keerthy | ad522f4 | 2013-06-19 11:27:47 +0530 | [diff] [blame] | 605 | if (!palmas->irq) { |
| 606 | dev_warn(palmas->dev, "IRQ missing: skipping irq request\n"); |
| 607 | goto no_irq; |
| 608 | } |
| 609 | |
Laxman Dewangan | df545d1 | 2013-03-01 20:13:46 +0530 | [diff] [blame] | 610 | /* Change interrupt line output polarity */ |
| 611 | if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH) |
| 612 | reg = PALMAS_POLARITY_CTRL_INT_POLARITY; |
| 613 | else |
| 614 | reg = 0; |
| 615 | ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE, |
| 616 | PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY, |
| 617 | reg); |
| 618 | if (ret < 0) { |
| 619 | dev_err(palmas->dev, "POLARITY_CTRL updat failed: %d\n", ret); |
Laxman Dewangan | 5e172d7 | 2013-09-26 19:03:51 +0530 | [diff] [blame] | 620 | goto err_i2c; |
Laxman Dewangan | df545d1 | 2013-03-01 20:13:46 +0530 | [diff] [blame] | 621 | } |
| 622 | |
Graeme Gregory | b330f85 | 2012-06-22 13:36:19 +0100 | [diff] [blame] | 623 | /* Change IRQ into clear on read mode for efficiency */ |
| 624 | slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE); |
| 625 | addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL); |
| 626 | reg = PALMAS_INT_CTRL_INT_CLEAR; |
| 627 | |
| 628 | regmap_write(palmas->regmap[slave], addr, reg); |
| 629 | |
| 630 | ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq, |
Keerthy | 1c113d8 | 2014-06-18 15:28:55 +0530 | [diff] [blame^] | 631 | IRQF_ONESHOT | pdata->irq_flags, 0, |
| 632 | driver_data->irq_chip, &palmas->irq_data); |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 633 | if (ret < 0) |
Laxman Dewangan | 5e172d7 | 2013-09-26 19:03:51 +0530 | [diff] [blame] | 634 | goto err_i2c; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 635 | |
J Keerthy | ad522f4 | 2013-06-19 11:27:47 +0530 | [diff] [blame] | 636 | no_irq: |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 637 | slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE); |
| 638 | addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE, |
| 639 | PALMAS_PRIMARY_SECONDARY_PAD1); |
| 640 | |
| 641 | if (pdata->mux_from_pdata) { |
| 642 | reg = pdata->pad1; |
| 643 | ret = regmap_write(palmas->regmap[slave], addr, reg); |
| 644 | if (ret) |
Graeme Gregory | 3f78dec | 2012-08-28 13:47:35 +0200 | [diff] [blame] | 645 | goto err_irq; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 646 | } else { |
| 647 | ret = regmap_read(palmas->regmap[slave], addr, ®); |
| 648 | if (ret) |
Graeme Gregory | 3f78dec | 2012-08-28 13:47:35 +0200 | [diff] [blame] | 649 | goto err_irq; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 650 | } |
| 651 | |
| 652 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0)) |
| 653 | palmas->gpio_muxed |= PALMAS_GPIO_0_MUXED; |
| 654 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK)) |
| 655 | palmas->gpio_muxed |= PALMAS_GPIO_1_MUXED; |
| 656 | else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) == |
| 657 | (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT)) |
| 658 | palmas->led_muxed |= PALMAS_LED1_MUXED; |
| 659 | else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) == |
| 660 | (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT)) |
| 661 | palmas->pwm_muxed |= PALMAS_PWM1_MUXED; |
| 662 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK)) |
| 663 | palmas->gpio_muxed |= PALMAS_GPIO_2_MUXED; |
| 664 | else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) == |
| 665 | (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT)) |
| 666 | palmas->led_muxed |= PALMAS_LED2_MUXED; |
| 667 | else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) == |
| 668 | (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT)) |
| 669 | palmas->pwm_muxed |= PALMAS_PWM2_MUXED; |
| 670 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3)) |
| 671 | palmas->gpio_muxed |= PALMAS_GPIO_3_MUXED; |
| 672 | |
| 673 | addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE, |
| 674 | PALMAS_PRIMARY_SECONDARY_PAD2); |
| 675 | |
| 676 | if (pdata->mux_from_pdata) { |
| 677 | reg = pdata->pad2; |
| 678 | ret = regmap_write(palmas->regmap[slave], addr, reg); |
| 679 | if (ret) |
Graeme Gregory | 3f78dec | 2012-08-28 13:47:35 +0200 | [diff] [blame] | 680 | goto err_irq; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 681 | } else { |
| 682 | ret = regmap_read(palmas->regmap[slave], addr, ®); |
| 683 | if (ret) |
Graeme Gregory | 3f78dec | 2012-08-28 13:47:35 +0200 | [diff] [blame] | 684 | goto err_irq; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 685 | } |
| 686 | |
| 687 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4)) |
| 688 | palmas->gpio_muxed |= PALMAS_GPIO_4_MUXED; |
| 689 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK)) |
| 690 | palmas->gpio_muxed |= PALMAS_GPIO_5_MUXED; |
| 691 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6)) |
| 692 | palmas->gpio_muxed |= PALMAS_GPIO_6_MUXED; |
| 693 | if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK)) |
| 694 | palmas->gpio_muxed |= PALMAS_GPIO_7_MUXED; |
| 695 | |
| 696 | dev_info(palmas->dev, "Muxing GPIO %x, PWM %x, LED %x\n", |
| 697 | palmas->gpio_muxed, palmas->pwm_muxed, |
| 698 | palmas->led_muxed); |
| 699 | |
| 700 | reg = pdata->power_ctrl; |
| 701 | |
| 702 | slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE); |
| 703 | addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL); |
| 704 | |
| 705 | ret = regmap_write(palmas->regmap[slave], addr, reg); |
| 706 | if (ret) |
Graeme Gregory | 3f78dec | 2012-08-28 13:47:35 +0200 | [diff] [blame] | 707 | goto err_irq; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 708 | |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 709 | /* |
| 710 | * If we are probing with DT do this the DT way and return here |
| 711 | * otherwise continue and add devices using mfd helpers. |
| 712 | */ |
| 713 | if (node) { |
| 714 | ret = of_platform_populate(node, NULL, NULL, &i2c->dev); |
Bill Huang | b81eec0 | 2013-08-08 04:45:05 -0700 | [diff] [blame] | 715 | if (ret < 0) { |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 716 | goto err_irq; |
Bill Huang | b81eec0 | 2013-08-08 04:45:05 -0700 | [diff] [blame] | 717 | } else if (pdata->pm_off && !pm_power_off) { |
| 718 | palmas_dev = palmas; |
| 719 | pm_power_off = palmas_power_off; |
Bill Huang | b81eec0 | 2013-08-08 04:45:05 -0700 | [diff] [blame] | 720 | } |
Graeme Gregory | 9c14ac3 | 2012-08-28 13:47:38 +0200 | [diff] [blame] | 721 | } |
| 722 | |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 723 | return ret; |
| 724 | |
Graeme Gregory | 3f78dec | 2012-08-28 13:47:35 +0200 | [diff] [blame] | 725 | err_irq: |
| 726 | regmap_del_irq_chip(palmas->irq, palmas->irq_data); |
Laxman Dewangan | 5e172d7 | 2013-09-26 19:03:51 +0530 | [diff] [blame] | 727 | err_i2c: |
| 728 | for (i = 1; i < PALMAS_NUM_CLIENTS; i++) { |
| 729 | if (palmas->i2c_clients[i]) |
| 730 | i2c_unregister_device(palmas->i2c_clients[i]); |
| 731 | } |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 732 | return ret; |
| 733 | } |
| 734 | |
| 735 | static int palmas_i2c_remove(struct i2c_client *i2c) |
| 736 | { |
| 737 | struct palmas *palmas = i2c_get_clientdata(i2c); |
Laxman Dewangan | 5e172d7 | 2013-09-26 19:03:51 +0530 | [diff] [blame] | 738 | int i; |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 739 | |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 740 | regmap_del_irq_chip(palmas->irq, palmas->irq_data); |
| 741 | |
Laxman Dewangan | 5e172d7 | 2013-09-26 19:03:51 +0530 | [diff] [blame] | 742 | for (i = 1; i < PALMAS_NUM_CLIENTS; i++) { |
| 743 | if (palmas->i2c_clients[i]) |
| 744 | i2c_unregister_device(palmas->i2c_clients[i]); |
| 745 | } |
| 746 | |
Laxman Dewangan | 7178347 | 2013-09-26 19:03:50 +0530 | [diff] [blame] | 747 | if (palmas == palmas_dev) { |
| 748 | pm_power_off = NULL; |
| 749 | palmas_dev = NULL; |
| 750 | } |
| 751 | |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 752 | return 0; |
| 753 | } |
| 754 | |
| 755 | static const struct i2c_device_id palmas_i2c_id[] = { |
| 756 | { "palmas", }, |
| 757 | { "twl6035", }, |
| 758 | { "twl6037", }, |
| 759 | { "tps65913", }, |
Axel Lin | 00ba81c | 2012-05-21 23:33:22 +0800 | [diff] [blame] | 760 | { /* end */ } |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 761 | }; |
| 762 | MODULE_DEVICE_TABLE(i2c, palmas_i2c_id); |
| 763 | |
Graeme Gregory | 2945fbc | 2012-05-15 15:48:56 +0900 | [diff] [blame] | 764 | static struct i2c_driver palmas_i2c_driver = { |
| 765 | .driver = { |
| 766 | .name = "palmas", |
| 767 | .of_match_table = of_palmas_match_tbl, |
| 768 | .owner = THIS_MODULE, |
| 769 | }, |
| 770 | .probe = palmas_i2c_probe, |
| 771 | .remove = palmas_i2c_remove, |
| 772 | .id_table = palmas_i2c_id, |
| 773 | }; |
| 774 | |
| 775 | static int __init palmas_i2c_init(void) |
| 776 | { |
| 777 | return i2c_add_driver(&palmas_i2c_driver); |
| 778 | } |
| 779 | /* init early so consumer devices can complete system boot */ |
| 780 | subsys_initcall(palmas_i2c_init); |
| 781 | |
| 782 | static void __exit palmas_i2c_exit(void) |
| 783 | { |
| 784 | i2c_del_driver(&palmas_i2c_driver); |
| 785 | } |
| 786 | module_exit(palmas_i2c_exit); |
| 787 | |
| 788 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); |
| 789 | MODULE_DESCRIPTION("Palmas chip family multi-function driver"); |
| 790 | MODULE_LICENSE("GPL"); |