Jakub Kicinski | c869f77 | 2015-05-26 11:16:00 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org> |
| 3 | * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 |
| 7 | * as published by the Free Software Foundation |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #ifndef __MT7601U_DMA_H |
| 16 | #define __MT7601U_DMA_H |
| 17 | |
| 18 | #include <asm/unaligned.h> |
| 19 | #include <linux/skbuff.h> |
| 20 | |
Jakub Kicinski | c869f77 | 2015-05-26 11:16:00 +0200 | [diff] [blame] | 21 | #define MT_DMA_HDR_LEN 4 |
| 22 | #define MT_RX_INFO_LEN 4 |
| 23 | #define MT_FCE_INFO_LEN 4 |
| 24 | #define MT_DMA_HDRS (MT_DMA_HDR_LEN + MT_RX_INFO_LEN) |
| 25 | |
| 26 | /* Common Tx DMA descriptor fields */ |
| 27 | #define MT_TXD_INFO_LEN GENMASK(15, 0) |
| 28 | #define MT_TXD_INFO_D_PORT GENMASK(29, 27) |
| 29 | #define MT_TXD_INFO_TYPE GENMASK(31, 30) |
| 30 | |
| 31 | enum mt76_msg_port { |
| 32 | WLAN_PORT, |
| 33 | CPU_RX_PORT, |
| 34 | CPU_TX_PORT, |
| 35 | HOST_PORT, |
| 36 | VIRTUAL_CPU_RX_PORT, |
| 37 | VIRTUAL_CPU_TX_PORT, |
| 38 | DISCARD, |
| 39 | }; |
| 40 | |
| 41 | enum mt76_info_type { |
| 42 | DMA_PACKET, |
| 43 | DMA_COMMAND, |
| 44 | }; |
| 45 | |
| 46 | /* Tx DMA packet specific flags */ |
| 47 | #define MT_TXD_PKT_INFO_NEXT_VLD BIT(16) |
| 48 | #define MT_TXD_PKT_INFO_TX_BURST BIT(17) |
| 49 | #define MT_TXD_PKT_INFO_80211 BIT(19) |
| 50 | #define MT_TXD_PKT_INFO_TSO BIT(20) |
| 51 | #define MT_TXD_PKT_INFO_CSO BIT(21) |
| 52 | #define MT_TXD_PKT_INFO_WIV BIT(24) |
| 53 | #define MT_TXD_PKT_INFO_QSEL GENMASK(26, 25) |
| 54 | |
| 55 | enum mt76_qsel { |
| 56 | MT_QSEL_MGMT, |
| 57 | MT_QSEL_HCCA, |
| 58 | MT_QSEL_EDCA, |
| 59 | MT_QSEL_EDCA_2, |
| 60 | }; |
| 61 | |
| 62 | /* Tx DMA MCU command specific flags */ |
| 63 | #define MT_TXD_CMD_INFO_SEQ GENMASK(19, 16) |
| 64 | #define MT_TXD_CMD_INFO_TYPE GENMASK(26, 20) |
| 65 | |
| 66 | static inline int mt7601u_dma_skb_wrap(struct sk_buff *skb, |
| 67 | enum mt76_msg_port d_port, |
| 68 | enum mt76_info_type type, u32 flags) |
| 69 | { |
| 70 | u32 info; |
| 71 | |
| 72 | /* Buffer layout: |
| 73 | * | 4B | xfer len | pad | 4B | |
| 74 | * | TXINFO | pkt/cmd | zero pad to 4B | zero | |
| 75 | * |
| 76 | * length field of TXINFO should be set to 'xfer len'. |
| 77 | */ |
| 78 | |
| 79 | info = flags | |
Jakub Kicinski | d43af50 | 2016-08-31 12:46:47 +0100 | [diff] [blame] | 80 | FIELD_PREP(MT_TXD_INFO_LEN, round_up(skb->len, 4)) | |
| 81 | FIELD_PREP(MT_TXD_INFO_D_PORT, d_port) | |
| 82 | FIELD_PREP(MT_TXD_INFO_TYPE, type); |
Jakub Kicinski | c869f77 | 2015-05-26 11:16:00 +0200 | [diff] [blame] | 83 | |
| 84 | put_unaligned_le32(info, skb_push(skb, sizeof(info))); |
| 85 | return skb_put_padto(skb, round_up(skb->len, 4) + 4); |
| 86 | } |
| 87 | |
| 88 | static inline int |
| 89 | mt7601u_dma_skb_wrap_pkt(struct sk_buff *skb, enum mt76_qsel qsel, u32 flags) |
| 90 | { |
Jakub Kicinski | d43af50 | 2016-08-31 12:46:47 +0100 | [diff] [blame] | 91 | flags |= FIELD_PREP(MT_TXD_PKT_INFO_QSEL, qsel); |
Jakub Kicinski | c869f77 | 2015-05-26 11:16:00 +0200 | [diff] [blame] | 92 | return mt7601u_dma_skb_wrap(skb, WLAN_PORT, DMA_PACKET, flags); |
| 93 | } |
| 94 | |
| 95 | /* Common Rx DMA descriptor fields */ |
| 96 | #define MT_RXD_INFO_LEN GENMASK(13, 0) |
| 97 | #define MT_RXD_INFO_PCIE_INTR BIT(24) |
| 98 | #define MT_RXD_INFO_QSEL GENMASK(26, 25) |
| 99 | #define MT_RXD_INFO_PORT GENMASK(29, 27) |
| 100 | #define MT_RXD_INFO_TYPE GENMASK(31, 30) |
| 101 | |
| 102 | /* Rx DMA packet specific flags */ |
| 103 | #define MT_RXD_PKT_INFO_UDP_ERR BIT(16) |
| 104 | #define MT_RXD_PKT_INFO_TCP_ERR BIT(17) |
| 105 | #define MT_RXD_PKT_INFO_IP_ERR BIT(18) |
| 106 | #define MT_RXD_PKT_INFO_PKT_80211 BIT(19) |
| 107 | #define MT_RXD_PKT_INFO_L3L4_DONE BIT(20) |
| 108 | #define MT_RXD_PKT_INFO_MAC_LEN GENMASK(23, 21) |
| 109 | |
| 110 | /* Rx DMA MCU command specific flags */ |
| 111 | #define MT_RXD_CMD_INFO_SELF_GEN BIT(15) |
| 112 | #define MT_RXD_CMD_INFO_CMD_SEQ GENMASK(19, 16) |
| 113 | #define MT_RXD_CMD_INFO_EVT_TYPE GENMASK(23, 20) |
| 114 | |
| 115 | enum mt76_evt_type { |
| 116 | CMD_DONE, |
| 117 | CMD_ERROR, |
| 118 | CMD_RETRY, |
| 119 | EVENT_PWR_RSP, |
| 120 | EVENT_WOW_RSP, |
| 121 | EVENT_CARRIER_DETECT_RSP, |
| 122 | EVENT_DFS_DETECT_RSP, |
| 123 | }; |
| 124 | |
| 125 | #endif |