blob: 9ec304dc4705f3d2682b631c5372b4a396966260 [file] [log] [blame]
Luca Risoliab9df9782005-06-25 16:30:24 +02001/***************************************************************************
Luca Risoliaf327ebb2007-01-08 10:43:56 -03002 * Plug-in for OV7630 image sensor connected to the SN9C1xx PC Camera *
Luca Risoliab9df9782005-06-25 16:30:24 +02003 * Controllers *
4 * *
Luca Risoliaf327ebb2007-01-08 10:43:56 -03005 * Copyright (C) 2006-2007 by Luca Risolia <luca.risolia@studio.unibo.it> *
Luca Risoliab9df9782005-06-25 16:30:24 +02006 * *
7 * This program is free software; you can redistribute it and/or modify *
8 * it under the terms of the GNU General Public License as published by *
9 * the Free Software Foundation; either version 2 of the License, or *
10 * (at your option) any later version. *
11 * *
12 * This program is distributed in the hope that it will be useful, *
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
15 * GNU General Public License for more details. *
16 * *
17 * You should have received a copy of the GNU General Public License *
18 * along with this program; if not, write to the Free Software *
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. *
20 ***************************************************************************/
21
22#include "sn9c102_sensor.h"
Hans Verkuild45b9b82008-09-04 03:33:43 -030023#include "sn9c102_devtable.h"
Luca Risoliab9df9782005-06-25 16:30:24 +020024
25
Jinqiang Zengcd6ff5c2014-04-19 00:09:47 -030026static int ov7630_init(struct sn9c102_device *cam)
Luca Risoliab9df9782005-06-25 16:30:24 +020027{
28 int err = 0;
29
Luca Risoliaf327ebb2007-01-08 10:43:56 -030030 switch (sn9c102_get_bridge(cam)) {
31 case BRIDGE_SN9C101:
32 case BRIDGE_SN9C102:
Luca Risolia480b55c22007-05-02 10:04:03 -030033 err = sn9c102_write_const_regs(cam, {0x00, 0x14}, {0x60, 0x17},
34 {0x0f, 0x18}, {0x50, 0x19});
Luca Risoliab9df9782005-06-25 16:30:24 +020035
Luca Risoliaf327ebb2007-01-08 10:43:56 -030036 err += sn9c102_i2c_write(cam, 0x12, 0x8d);
37 err += sn9c102_i2c_write(cam, 0x12, 0x0d);
38 err += sn9c102_i2c_write(cam, 0x11, 0x00);
Luca Risoliaf423b9a2007-03-26 16:12:04 -030039 err += sn9c102_i2c_write(cam, 0x15, 0x35);
40 err += sn9c102_i2c_write(cam, 0x16, 0x03);
41 err += sn9c102_i2c_write(cam, 0x17, 0x1c);
42 err += sn9c102_i2c_write(cam, 0x18, 0xbd);
43 err += sn9c102_i2c_write(cam, 0x19, 0x06);
44 err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
45 err += sn9c102_i2c_write(cam, 0x1b, 0x04);
Luca Risoliaf327ebb2007-01-08 10:43:56 -030046 err += sn9c102_i2c_write(cam, 0x20, 0x44);
47 err += sn9c102_i2c_write(cam, 0x23, 0xee);
48 err += sn9c102_i2c_write(cam, 0x26, 0xa0);
49 err += sn9c102_i2c_write(cam, 0x27, 0x9a);
50 err += sn9c102_i2c_write(cam, 0x28, 0x20);
51 err += sn9c102_i2c_write(cam, 0x29, 0x30);
52 err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
53 err += sn9c102_i2c_write(cam, 0x30, 0x24);
54 err += sn9c102_i2c_write(cam, 0x32, 0x86);
55 err += sn9c102_i2c_write(cam, 0x60, 0xa9);
56 err += sn9c102_i2c_write(cam, 0x61, 0x42);
57 err += sn9c102_i2c_write(cam, 0x65, 0x00);
58 err += sn9c102_i2c_write(cam, 0x69, 0x38);
59 err += sn9c102_i2c_write(cam, 0x6f, 0x88);
60 err += sn9c102_i2c_write(cam, 0x70, 0x0b);
61 err += sn9c102_i2c_write(cam, 0x71, 0x00);
62 err += sn9c102_i2c_write(cam, 0x74, 0x21);
63 err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
64 break;
65 case BRIDGE_SN9C103:
Trent Piephoc680dd62007-04-04 17:11:04 -030066 err = sn9c102_write_const_regs(cam, {0x00, 0x02}, {0x00, 0x03},
67 {0x1a, 0x04}, {0x20, 0x05},
68 {0x20, 0x06}, {0x20, 0x07},
69 {0x03, 0x10}, {0x0a, 0x14},
70 {0x60, 0x17}, {0x0f, 0x18},
71 {0x50, 0x19}, {0x1d, 0x1a},
72 {0x10, 0x1b}, {0x02, 0x1c},
73 {0x03, 0x1d}, {0x0f, 0x1e},
74 {0x0c, 0x1f}, {0x00, 0x20},
75 {0x10, 0x21}, {0x20, 0x22},
76 {0x30, 0x23}, {0x40, 0x24},
77 {0x50, 0x25}, {0x60, 0x26},
78 {0x70, 0x27}, {0x80, 0x28},
79 {0x90, 0x29}, {0xa0, 0x2a},
80 {0xb0, 0x2b}, {0xc0, 0x2c},
81 {0xd0, 0x2d}, {0xe0, 0x2e},
82 {0xf0, 0x2f}, {0xff, 0x30});
Luca Risoliaf327ebb2007-01-08 10:43:56 -030083
84 err += sn9c102_i2c_write(cam, 0x12, 0x8d);
85 err += sn9c102_i2c_write(cam, 0x12, 0x0d);
86 err += sn9c102_i2c_write(cam, 0x15, 0x34);
87 err += sn9c102_i2c_write(cam, 0x11, 0x01);
88 err += sn9c102_i2c_write(cam, 0x1b, 0x04);
89 err += sn9c102_i2c_write(cam, 0x20, 0x44);
Luca Risoliaf423b9a2007-03-26 16:12:04 -030090 err += sn9c102_i2c_write(cam, 0x23, 0xee);
91 err += sn9c102_i2c_write(cam, 0x26, 0xa0);
92 err += sn9c102_i2c_write(cam, 0x27, 0x9a);
Luca Risoliaf327ebb2007-01-08 10:43:56 -030093 err += sn9c102_i2c_write(cam, 0x28, 0x20);
Luca Risoliaf423b9a2007-03-26 16:12:04 -030094 err += sn9c102_i2c_write(cam, 0x29, 0x30);
95 err += sn9c102_i2c_write(cam, 0x2f, 0x3d);
96 err += sn9c102_i2c_write(cam, 0x30, 0x24);
97 err += sn9c102_i2c_write(cam, 0x32, 0x86);
98 err += sn9c102_i2c_write(cam, 0x60, 0xa9);
99 err += sn9c102_i2c_write(cam, 0x61, 0x42);
100 err += sn9c102_i2c_write(cam, 0x65, 0x00);
101 err += sn9c102_i2c_write(cam, 0x69, 0x38);
102 err += sn9c102_i2c_write(cam, 0x6f, 0x88);
103 err += sn9c102_i2c_write(cam, 0x70, 0x0b);
104 err += sn9c102_i2c_write(cam, 0x71, 0x00);
105 err += sn9c102_i2c_write(cam, 0x74, 0x21);
106 err += sn9c102_i2c_write(cam, 0x7d, 0xf7);
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300107 break;
Luca Risolia3770be32007-06-13 14:37:50 -0300108 case BRIDGE_SN9C105:
109 case BRIDGE_SN9C120:
110 err = sn9c102_write_const_regs(cam, {0x40, 0x02}, {0x00, 0x03},
111 {0x1a, 0x04}, {0x03, 0x10},
112 {0x0a, 0x14}, {0xe2, 0x17},
113 {0x0b, 0x18}, {0x00, 0x19},
114 {0x1d, 0x1a}, {0x10, 0x1b},
115 {0x02, 0x1c}, {0x03, 0x1d},
116 {0x0f, 0x1e}, {0x0c, 0x1f},
117 {0x00, 0x20}, {0x24, 0x21},
118 {0x3b, 0x22}, {0x47, 0x23},
119 {0x60, 0x24}, {0x71, 0x25},
120 {0x80, 0x26}, {0x8f, 0x27},
121 {0x9d, 0x28}, {0xaa, 0x29},
122 {0xb8, 0x2a}, {0xc4, 0x2b},
123 {0xd1, 0x2c}, {0xdd, 0x2d},
124 {0xe8, 0x2e}, {0xf4, 0x2f},
125 {0xff, 0x30}, {0x00, 0x3f},
126 {0xc7, 0x40}, {0x01, 0x41},
127 {0x44, 0x42}, {0x00, 0x43},
128 {0x44, 0x44}, {0x00, 0x45},
129 {0x44, 0x46}, {0x00, 0x47},
130 {0xc7, 0x48}, {0x01, 0x49},
131 {0xc7, 0x4a}, {0x01, 0x4b},
132 {0xc7, 0x4c}, {0x01, 0x4d},
133 {0x44, 0x4e}, {0x00, 0x4f},
134 {0x44, 0x50}, {0x00, 0x51},
135 {0x44, 0x52}, {0x00, 0x53},
136 {0xc7, 0x54}, {0x01, 0x55},
137 {0xc7, 0x56}, {0x01, 0x57},
138 {0xc7, 0x58}, {0x01, 0x59},
139 {0x44, 0x5a}, {0x00, 0x5b},
140 {0x44, 0x5c}, {0x00, 0x5d},
141 {0x44, 0x5e}, {0x00, 0x5f},
142 {0xc7, 0x60}, {0x01, 0x61},
143 {0xc7, 0x62}, {0x01, 0x63},
144 {0xc7, 0x64}, {0x01, 0x65},
145 {0x44, 0x66}, {0x00, 0x67},
146 {0x44, 0x68}, {0x00, 0x69},
147 {0x44, 0x6a}, {0x00, 0x6b},
148 {0xc7, 0x6c}, {0x01, 0x6d},
149 {0xc7, 0x6e}, {0x01, 0x6f},
150 {0xc7, 0x70}, {0x01, 0x71},
151 {0x44, 0x72}, {0x00, 0x73},
152 {0x44, 0x74}, {0x00, 0x75},
153 {0x44, 0x76}, {0x00, 0x77},
154 {0xc7, 0x78}, {0x01, 0x79},
155 {0xc7, 0x7a}, {0x01, 0x7b},
156 {0xc7, 0x7c}, {0x01, 0x7d},
157 {0x44, 0x7e}, {0x00, 0x7f},
158 {0x17, 0x84}, {0x00, 0x85},
159 {0x2e, 0x86}, {0x00, 0x87},
160 {0x09, 0x88}, {0x00, 0x89},
161 {0xe8, 0x8a}, {0x0f, 0x8b},
162 {0xda, 0x8c}, {0x0f, 0x8d},
163 {0x40, 0x8e}, {0x00, 0x8f},
164 {0x37, 0x90}, {0x00, 0x91},
165 {0xcf, 0x92}, {0x0f, 0x93},
166 {0xfa, 0x94}, {0x0f, 0x95},
167 {0x00, 0x96}, {0x00, 0x97},
168 {0x00, 0x98}, {0x66, 0x99},
169 {0x00, 0x9a}, {0x40, 0x9b},
170 {0x20, 0x9c}, {0x00, 0x9d},
171 {0x00, 0x9e}, {0x00, 0x9f},
172 {0x2d, 0xc0}, {0x2d, 0xc1},
173 {0x3a, 0xc2}, {0x00, 0xc3},
174 {0x04, 0xc4}, {0x3f, 0xc5},
175 {0x00, 0xc6}, {0x00, 0xc7},
176 {0x50, 0xc8}, {0x3c, 0xc9},
177 {0x28, 0xca}, {0xd8, 0xcb},
178 {0x14, 0xcc}, {0xec, 0xcd},
179 {0x32, 0xce}, {0xdd, 0xcf},
180 {0x32, 0xd0}, {0xdd, 0xd1},
181 {0x6a, 0xd2}, {0x50, 0xd3},
182 {0x60, 0xd4}, {0x00, 0xd5},
183 {0x00, 0xd6});
184
185 err += sn9c102_i2c_write(cam, 0x12, 0x80);
186 err += sn9c102_i2c_write(cam, 0x12, 0x48);
187 err += sn9c102_i2c_write(cam, 0x01, 0x80);
188 err += sn9c102_i2c_write(cam, 0x02, 0x80);
189 err += sn9c102_i2c_write(cam, 0x03, 0x80);
190 err += sn9c102_i2c_write(cam, 0x04, 0x10);
191 err += sn9c102_i2c_write(cam, 0x05, 0x20);
192 err += sn9c102_i2c_write(cam, 0x06, 0x80);
193 err += sn9c102_i2c_write(cam, 0x11, 0x00);
194 err += sn9c102_i2c_write(cam, 0x0c, 0x20);
195 err += sn9c102_i2c_write(cam, 0x0d, 0x20);
196 err += sn9c102_i2c_write(cam, 0x15, 0x80);
197 err += sn9c102_i2c_write(cam, 0x16, 0x03);
198 err += sn9c102_i2c_write(cam, 0x17, 0x1b);
199 err += sn9c102_i2c_write(cam, 0x18, 0xbd);
200 err += sn9c102_i2c_write(cam, 0x19, 0x05);
201 err += sn9c102_i2c_write(cam, 0x1a, 0xf6);
202 err += sn9c102_i2c_write(cam, 0x1b, 0x04);
203 err += sn9c102_i2c_write(cam, 0x21, 0x1b);
204 err += sn9c102_i2c_write(cam, 0x22, 0x00);
205 err += sn9c102_i2c_write(cam, 0x23, 0xde);
206 err += sn9c102_i2c_write(cam, 0x24, 0x10);
207 err += sn9c102_i2c_write(cam, 0x25, 0x8a);
208 err += sn9c102_i2c_write(cam, 0x26, 0xa0);
209 err += sn9c102_i2c_write(cam, 0x27, 0xca);
210 err += sn9c102_i2c_write(cam, 0x28, 0xa2);
211 err += sn9c102_i2c_write(cam, 0x29, 0x74);
212 err += sn9c102_i2c_write(cam, 0x2a, 0x88);
213 err += sn9c102_i2c_write(cam, 0x2b, 0x34);
214 err += sn9c102_i2c_write(cam, 0x2c, 0x88);
215 err += sn9c102_i2c_write(cam, 0x2e, 0x00);
216 err += sn9c102_i2c_write(cam, 0x2f, 0x00);
217 err += sn9c102_i2c_write(cam, 0x30, 0x00);
218 err += sn9c102_i2c_write(cam, 0x32, 0xc2);
219 err += sn9c102_i2c_write(cam, 0x33, 0x08);
220 err += sn9c102_i2c_write(cam, 0x4c, 0x40);
221 err += sn9c102_i2c_write(cam, 0x4d, 0xf3);
222 err += sn9c102_i2c_write(cam, 0x60, 0x05);
223 err += sn9c102_i2c_write(cam, 0x61, 0x40);
224 err += sn9c102_i2c_write(cam, 0x62, 0x12);
225 err += sn9c102_i2c_write(cam, 0x63, 0x57);
226 err += sn9c102_i2c_write(cam, 0x64, 0x73);
227 err += sn9c102_i2c_write(cam, 0x65, 0x00);
228 err += sn9c102_i2c_write(cam, 0x66, 0x55);
229 err += sn9c102_i2c_write(cam, 0x67, 0x01);
230 err += sn9c102_i2c_write(cam, 0x68, 0xac);
231 err += sn9c102_i2c_write(cam, 0x69, 0x38);
232 err += sn9c102_i2c_write(cam, 0x6f, 0x1f);
233 err += sn9c102_i2c_write(cam, 0x70, 0x01);
234 err += sn9c102_i2c_write(cam, 0x71, 0x00);
235 err += sn9c102_i2c_write(cam, 0x72, 0x10);
236 err += sn9c102_i2c_write(cam, 0x73, 0x50);
237 err += sn9c102_i2c_write(cam, 0x74, 0x20);
238 err += sn9c102_i2c_write(cam, 0x76, 0x01);
239 err += sn9c102_i2c_write(cam, 0x77, 0xf3);
240 err += sn9c102_i2c_write(cam, 0x78, 0x90);
241 err += sn9c102_i2c_write(cam, 0x79, 0x98);
242 err += sn9c102_i2c_write(cam, 0x7a, 0x98);
243 err += sn9c102_i2c_write(cam, 0x7b, 0x00);
244 err += sn9c102_i2c_write(cam, 0x7c, 0x38);
245 err += sn9c102_i2c_write(cam, 0x7d, 0xff);
246 break;
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300247 default:
248 break;
249 }
Luca Risoliab9df9782005-06-25 16:30:24 +0200250
251 return err;
252}
253
254
Jinqiang Zengcd6ff5c2014-04-19 00:09:47 -0300255static int ov7630_get_ctrl(struct sn9c102_device *cam,
256 struct v4l2_control *ctrl)
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300257{
Luca Risolia3770be32007-06-13 14:37:50 -0300258 enum sn9c102_bridge bridge = sn9c102_get_bridge(cam);
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300259 int err = 0;
260
261 switch (ctrl->id) {
262 case V4L2_CID_EXPOSURE:
Chi Pham86a7dac2014-03-09 14:55:14 +0100263 ctrl->value = sn9c102_i2c_read(cam, 0x10);
264 if (ctrl->value < 0)
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300265 return -EIO;
266 break;
267 case V4L2_CID_RED_BALANCE:
Luca Risolia3770be32007-06-13 14:37:50 -0300268 if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
269 ctrl->value = sn9c102_pread_reg(cam, 0x05);
270 else
271 ctrl->value = sn9c102_pread_reg(cam, 0x07);
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300272 break;
273 case V4L2_CID_BLUE_BALANCE:
274 ctrl->value = sn9c102_pread_reg(cam, 0x06);
275 break;
276 case SN9C102_V4L2_CID_GREEN_BALANCE:
Luca Risolia3770be32007-06-13 14:37:50 -0300277 if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
278 ctrl->value = sn9c102_pread_reg(cam, 0x07);
279 else
280 ctrl->value = sn9c102_pread_reg(cam, 0x05);
281 break;
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300282 break;
283 case V4L2_CID_GAIN:
Chi Pham86a7dac2014-03-09 14:55:14 +0100284 ctrl->value = sn9c102_i2c_read(cam, 0x00);
285 if (ctrl->value < 0)
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300286 return -EIO;
287 ctrl->value &= 0x3f;
288 break;
289 case V4L2_CID_DO_WHITE_BALANCE:
Chi Pham86a7dac2014-03-09 14:55:14 +0100290 ctrl->value = sn9c102_i2c_read(cam, 0x0c);
291 if (ctrl->value < 0)
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300292 return -EIO;
293 ctrl->value &= 0x3f;
294 break;
295 case V4L2_CID_WHITENESS:
Chi Pham86a7dac2014-03-09 14:55:14 +0100296 ctrl->value = sn9c102_i2c_read(cam, 0x0d);
297 if (ctrl->value < 0)
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300298 return -EIO;
299 ctrl->value &= 0x3f;
300 break;
301 case V4L2_CID_AUTOGAIN:
Chi Pham86a7dac2014-03-09 14:55:14 +0100302 ctrl->value = sn9c102_i2c_read(cam, 0x13);
303 if (ctrl->value < 0)
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300304 return -EIO;
305 ctrl->value &= 0x01;
306 break;
307 case V4L2_CID_VFLIP:
Chi Pham86a7dac2014-03-09 14:55:14 +0100308 ctrl->value = sn9c102_i2c_read(cam, 0x75);
309 if (ctrl->value < 0)
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300310 return -EIO;
311 ctrl->value = (ctrl->value & 0x80) ? 1 : 0;
312 break;
313 case SN9C102_V4L2_CID_GAMMA:
Chi Pham86a7dac2014-03-09 14:55:14 +0100314 ctrl->value = sn9c102_i2c_read(cam, 0x14);
315 if (ctrl->value < 0)
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300316 return -EIO;
317 ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
318 break;
319 case SN9C102_V4L2_CID_BAND_FILTER:
Chi Pham86a7dac2014-03-09 14:55:14 +0100320 ctrl->value = sn9c102_i2c_read(cam, 0x2d);
321 if (ctrl->value < 0)
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300322 return -EIO;
323 ctrl->value = (ctrl->value & 0x02) ? 1 : 0;
324 break;
325 default:
326 return -EINVAL;
327 }
328
329 return err ? -EIO : 0;
330}
331
332
Jinqiang Zengcd6ff5c2014-04-19 00:09:47 -0300333static int ov7630_set_ctrl(struct sn9c102_device *cam,
334 const struct v4l2_control *ctrl)
Luca Risoliab9df9782005-06-25 16:30:24 +0200335{
Luca Risolia3770be32007-06-13 14:37:50 -0300336 enum sn9c102_bridge bridge = sn9c102_get_bridge(cam);
Luca Risoliab9df9782005-06-25 16:30:24 +0200337 int err = 0;
338
339 switch (ctrl->id) {
340 case V4L2_CID_EXPOSURE:
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300341 err += sn9c102_i2c_write(cam, 0x10, ctrl->value);
Luca Risoliab9df9782005-06-25 16:30:24 +0200342 break;
343 case V4L2_CID_RED_BALANCE:
Luca Risolia3770be32007-06-13 14:37:50 -0300344 if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
345 err += sn9c102_write_reg(cam, ctrl->value, 0x05);
346 else
347 err += sn9c102_write_reg(cam, ctrl->value, 0x07);
Luca Risoliab9df9782005-06-25 16:30:24 +0200348 break;
349 case V4L2_CID_BLUE_BALANCE:
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300350 err += sn9c102_write_reg(cam, ctrl->value, 0x06);
351 break;
352 case SN9C102_V4L2_CID_GREEN_BALANCE:
Luca Risolia3770be32007-06-13 14:37:50 -0300353 if (bridge == BRIDGE_SN9C105 || bridge == BRIDGE_SN9C120)
354 err += sn9c102_write_reg(cam, ctrl->value, 0x07);
355 else
356 err += sn9c102_write_reg(cam, ctrl->value, 0x05);
Luca Risoliab9df9782005-06-25 16:30:24 +0200357 break;
358 case V4L2_CID_GAIN:
359 err += sn9c102_i2c_write(cam, 0x00, ctrl->value);
360 break;
Luca Risoliab9df9782005-06-25 16:30:24 +0200361 case V4L2_CID_DO_WHITE_BALANCE:
362 err += sn9c102_i2c_write(cam, 0x0c, ctrl->value);
363 break;
364 case V4L2_CID_WHITENESS:
365 err += sn9c102_i2c_write(cam, 0x0d, ctrl->value);
366 break;
Luca Risoliab9df9782005-06-25 16:30:24 +0200367 case V4L2_CID_AUTOGAIN:
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300368 err += sn9c102_i2c_write(cam, 0x13, ctrl->value |
369 (ctrl->value << 1));
Luca Risoliab9df9782005-06-25 16:30:24 +0200370 break;
371 case V4L2_CID_VFLIP:
372 err += sn9c102_i2c_write(cam, 0x75, 0x0e | (ctrl->value << 7));
373 break;
Luca Risoliab9df9782005-06-25 16:30:24 +0200374 case SN9C102_V4L2_CID_GAMMA:
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300375 err += sn9c102_i2c_write(cam, 0x14, ctrl->value << 2);
Luca Risoliab9df9782005-06-25 16:30:24 +0200376 break;
377 case SN9C102_V4L2_CID_BAND_FILTER:
378 err += sn9c102_i2c_write(cam, 0x2d, ctrl->value << 2);
379 break;
380 default:
381 return -EINVAL;
382 }
383
384 return err ? -EIO : 0;
385}
386
387
Jinqiang Zengcd6ff5c2014-04-19 00:09:47 -0300388static int ov7630_set_crop(struct sn9c102_device *cam,
389 const struct v4l2_rect *rect)
Luca Risoliab9df9782005-06-25 16:30:24 +0200390{
Jinqiang Zengcd6ff5c2014-04-19 00:09:47 -0300391 struct sn9c102_sensor *s = sn9c102_get_sensor(cam);
Luca Risoliab9df9782005-06-25 16:30:24 +0200392 int err = 0;
Luca Risolia3770be32007-06-13 14:37:50 -0300393 u8 h_start = 0, v_start = (u8)(rect->top - s->cropcap.bounds.top) + 1;
394
395 switch (sn9c102_get_bridge(cam)) {
396 case BRIDGE_SN9C101:
397 case BRIDGE_SN9C102:
398 case BRIDGE_SN9C103:
399 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 1;
400 break;
401 case BRIDGE_SN9C105:
402 case BRIDGE_SN9C120:
403 h_start = (u8)(rect->left - s->cropcap.bounds.left) + 4;
404 break;
405 default:
406 break;
407 }
Luca Risoliab9df9782005-06-25 16:30:24 +0200408
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300409 err += sn9c102_write_reg(cam, h_start, 0x12);
Luca Risoliab9df9782005-06-25 16:30:24 +0200410 err += sn9c102_write_reg(cam, v_start, 0x13);
411
412 return err;
413}
414
415
Jinqiang Zengcd6ff5c2014-04-19 00:09:47 -0300416static int ov7630_set_pix_format(struct sn9c102_device *cam,
417 const struct v4l2_pix_format *pix)
Luca Risoliab9df9782005-06-25 16:30:24 +0200418{
419 int err = 0;
420
Luca Risolia3770be32007-06-13 14:37:50 -0300421 switch (sn9c102_get_bridge(cam)) {
422 case BRIDGE_SN9C101:
423 case BRIDGE_SN9C102:
424 case BRIDGE_SN9C103:
425 if (pix->pixelformat == V4L2_PIX_FMT_SBGGR8)
426 err += sn9c102_write_reg(cam, 0x50, 0x19);
427 else
428 err += sn9c102_write_reg(cam, 0x20, 0x19);
429 break;
430 case BRIDGE_SN9C105:
431 case BRIDGE_SN9C120:
432 if (pix->pixelformat == V4L2_PIX_FMT_SBGGR8) {
433 err += sn9c102_write_reg(cam, 0xe5, 0x17);
434 err += sn9c102_i2c_write(cam, 0x11, 0x04);
435 } else {
436 err += sn9c102_write_reg(cam, 0xe2, 0x17);
437 err += sn9c102_i2c_write(cam, 0x11, 0x02);
438 }
439 break;
440 default:
441 break;
442 }
Luca Risoliab9df9782005-06-25 16:30:24 +0200443
444 return err;
445}
446
447
Luca Risolia480b55c22007-05-02 10:04:03 -0300448static const struct sn9c102_sensor ov7630 = {
Luca Risoliab9df9782005-06-25 16:30:24 +0200449 .name = "OV7630",
450 .maintainer = "Luca Risolia <luca.risolia@studio.unibo.it>",
Luca Risolia3770be32007-06-13 14:37:50 -0300451 .supported_bridge = BRIDGE_SN9C101 | BRIDGE_SN9C102 | BRIDGE_SN9C103 |
452 BRIDGE_SN9C105 | BRIDGE_SN9C120,
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300453 .sysfs_ops = SN9C102_I2C_READ | SN9C102_I2C_WRITE,
Luca Risoliab9df9782005-06-25 16:30:24 +0200454 .frequency = SN9C102_I2C_100KHZ,
455 .interface = SN9C102_I2C_2WIRES,
456 .i2c_slave_id = 0x21,
457 .init = &ov7630_init,
458 .qctrl = {
459 {
460 .id = V4L2_CID_GAIN,
461 .type = V4L2_CTRL_TYPE_INTEGER,
462 .name = "global gain",
463 .minimum = 0x00,
464 .maximum = 0x3f,
465 .step = 0x01,
466 .default_value = 0x14,
467 .flags = 0,
468 },
469 {
Luca Risoliab9df9782005-06-25 16:30:24 +0200470 .id = V4L2_CID_EXPOSURE,
471 .type = V4L2_CTRL_TYPE_INTEGER,
472 .name = "exposure",
Luca Risoliab9df9782005-06-25 16:30:24 +0200473 .minimum = 0x00,
474 .maximum = 0xff,
475 .step = 0x01,
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300476 .default_value = 0x60,
Luca Risoliab9df9782005-06-25 16:30:24 +0200477 .flags = 0,
478 },
479 {
480 .id = V4L2_CID_WHITENESS,
481 .type = V4L2_CTRL_TYPE_INTEGER,
482 .name = "white balance background: red",
483 .minimum = 0x00,
484 .maximum = 0x3f,
485 .step = 0x01,
486 .default_value = 0x20,
487 .flags = 0,
488 },
489 {
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300490 .id = V4L2_CID_DO_WHITE_BALANCE,
491 .type = V4L2_CTRL_TYPE_INTEGER,
492 .name = "white balance background: blue",
Luca Risoliab9df9782005-06-25 16:30:24 +0200493 .minimum = 0x00,
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300494 .maximum = 0x3f,
Luca Risoliab9df9782005-06-25 16:30:24 +0200495 .step = 0x01,
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300496 .default_value = 0x20,
497 .flags = 0,
498 },
499 {
500 .id = V4L2_CID_RED_BALANCE,
501 .type = V4L2_CTRL_TYPE_INTEGER,
502 .name = "red balance",
503 .minimum = 0x00,
504 .maximum = 0x7f,
505 .step = 0x01,
506 .default_value = 0x20,
507 .flags = 0,
508 },
509 {
510 .id = V4L2_CID_BLUE_BALANCE,
511 .type = V4L2_CTRL_TYPE_INTEGER,
512 .name = "blue balance",
513 .minimum = 0x00,
514 .maximum = 0x7f,
515 .step = 0x01,
516 .default_value = 0x20,
Luca Risoliab9df9782005-06-25 16:30:24 +0200517 .flags = 0,
518 },
519 {
520 .id = V4L2_CID_AUTOGAIN,
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300521 .type = V4L2_CTRL_TYPE_BOOLEAN,
522 .name = "auto adjust",
Luca Risoliab9df9782005-06-25 16:30:24 +0200523 .minimum = 0x00,
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300524 .maximum = 0x01,
Luca Risoliab9df9782005-06-25 16:30:24 +0200525 .step = 0x01,
526 .default_value = 0x00,
527 .flags = 0,
528 },
529 {
530 .id = V4L2_CID_VFLIP,
531 .type = V4L2_CTRL_TYPE_BOOLEAN,
532 .name = "vertical flip",
533 .minimum = 0x00,
534 .maximum = 0x01,
535 .step = 0x01,
536 .default_value = 0x01,
537 .flags = 0,
538 },
539 {
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300540 .id = SN9C102_V4L2_CID_GREEN_BALANCE,
Luca Risoliab9df9782005-06-25 16:30:24 +0200541 .type = V4L2_CTRL_TYPE_INTEGER,
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300542 .name = "green balance",
543 .minimum = 0x00,
544 .maximum = 0x7f,
Luca Risoliab9df9782005-06-25 16:30:24 +0200545 .step = 0x01,
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300546 .default_value = 0x20,
Luca Risoliab9df9782005-06-25 16:30:24 +0200547 .flags = 0,
548 },
549 {
550 .id = SN9C102_V4L2_CID_BAND_FILTER,
551 .type = V4L2_CTRL_TYPE_BOOLEAN,
552 .name = "band filter",
553 .minimum = 0x00,
554 .maximum = 0x01,
555 .step = 0x01,
556 .default_value = 0x00,
557 .flags = 0,
558 },
559 {
560 .id = SN9C102_V4L2_CID_GAMMA,
561 .type = V4L2_CTRL_TYPE_BOOLEAN,
562 .name = "rgb gamma",
563 .minimum = 0x00,
564 .maximum = 0x01,
565 .step = 0x01,
566 .default_value = 0x00,
567 .flags = 0,
568 },
569 },
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300570 .get_ctrl = &ov7630_get_ctrl,
Luca Risoliab9df9782005-06-25 16:30:24 +0200571 .set_ctrl = &ov7630_set_ctrl,
572 .cropcap = {
573 .bounds = {
574 .left = 0,
575 .top = 0,
576 .width = 640,
577 .height = 480,
578 },
579 .defrect = {
580 .left = 0,
581 .top = 0,
582 .width = 640,
583 .height = 480,
584 },
585 },
586 .set_crop = &ov7630_set_crop,
587 .pix_format = {
588 .width = 640,
589 .height = 480,
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300590 .pixelformat = V4L2_PIX_FMT_SN9C10X,
Luca Risoliab9df9782005-06-25 16:30:24 +0200591 .priv = 8,
592 },
593 .set_pix_format = &ov7630_set_pix_format
594};
595
596
Jinqiang Zengcd6ff5c2014-04-19 00:09:47 -0300597int sn9c102_probe_ov7630(struct sn9c102_device *cam)
Luca Risoliab9df9782005-06-25 16:30:24 +0200598{
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300599 int pid, ver, err = 0;
Luca Risoliab9df9782005-06-25 16:30:24 +0200600
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300601 switch (sn9c102_get_bridge(cam)) {
602 case BRIDGE_SN9C101:
603 case BRIDGE_SN9C102:
Luca Risolia480b55c22007-05-02 10:04:03 -0300604 err = sn9c102_write_const_regs(cam, {0x01, 0x01}, {0x00, 0x01},
605 {0x28, 0x17});
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300606 break;
607 case BRIDGE_SN9C103: /* do _not_ change anything! */
Luca Risolia480b55c22007-05-02 10:04:03 -0300608 err = sn9c102_write_const_regs(cam, {0x09, 0x01}, {0x42, 0x01},
609 {0x28, 0x17}, {0x44, 0x02});
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300610 pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
Luca Risolia480b55c22007-05-02 10:04:03 -0300611 if (err || pid < 0) /* try a different initialization */
612 err += sn9c102_write_const_regs(cam, {0x01, 0x01},
613 {0x00, 0x01});
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300614 break;
Luca Risolia3770be32007-06-13 14:37:50 -0300615 case BRIDGE_SN9C105:
616 case BRIDGE_SN9C120:
617 err = sn9c102_write_const_regs(cam, {0x01, 0xf1}, {0x00, 0xf1},
618 {0x29, 0x01}, {0x74, 0x02},
619 {0x0e, 0x01}, {0x44, 0x01});
620 break;
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300621 default:
622 break;
623 }
624
625 pid = sn9c102_i2c_try_read(cam, &ov7630, 0x0a);
626 ver = sn9c102_i2c_try_read(cam, &ov7630, 0x0b);
627 if (err || pid < 0 || ver < 0)
Luca Risoliab9df9782005-06-25 16:30:24 +0200628 return -EIO;
Luca Risoliaf327ebb2007-01-08 10:43:56 -0300629 if (pid != 0x76 || ver != 0x31)
Luca Risoliab9df9782005-06-25 16:30:24 +0200630 return -ENODEV;
Luca Risolia2ffab022006-02-25 06:50:47 +0000631 sn9c102_attach_sensor(cam, &ov7630);
632
Luca Risoliab9df9782005-06-25 16:30:24 +0200633 return 0;
634}