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Albert Herranz7657c3a2009-12-17 15:27:20 -08001/*
2 * Freescale eSDHC controller driver.
3 *
Xu leie51cbc92011-09-09 20:05:46 +08004 * Copyright (c) 2007, 2010 Freescale Semiconductor, Inc.
Albert Herranz7657c3a2009-12-17 15:27:20 -08005 * Copyright (c) 2009 MontaVista Software, Inc.
6 *
7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 */
15
16#include <linux/io.h>
17#include <linux/delay.h>
Paul Gortmaker88b47672011-07-03 15:15:51 -040018#include <linux/module.h>
Albert Herranz7657c3a2009-12-17 15:27:20 -080019#include <linux/mmc/host.h>
Shawn Guo38576af2011-05-27 23:48:14 +080020#include "sdhci-pltfm.h"
Wolfram Sang80872e22010-10-15 12:21:03 +020021#include "sdhci-esdhc.h"
Albert Herranz7657c3a2009-12-17 15:27:20 -080022
23static u16 esdhc_readw(struct sdhci_host *host, int reg)
24{
25 u16 ret;
Xu leie51cbc92011-09-09 20:05:46 +080026 int base = reg & ~0x3;
27 int shift = (reg & 0x2) * 8;
Albert Herranz7657c3a2009-12-17 15:27:20 -080028
29 if (unlikely(reg == SDHCI_HOST_VERSION))
Xu leie51cbc92011-09-09 20:05:46 +080030 ret = in_be32(host->ioaddr + base) & 0xffff;
Albert Herranz7657c3a2009-12-17 15:27:20 -080031 else
Xu leie51cbc92011-09-09 20:05:46 +080032 ret = (in_be32(host->ioaddr + base) >> shift) & 0xffff;
33 return ret;
34}
35
36static u8 esdhc_readb(struct sdhci_host *host, int reg)
37{
38 int base = reg & ~0x3;
39 int shift = (reg & 0x3) * 8;
40 u8 ret = (in_be32(host->ioaddr + base) >> shift) & 0xff;
Albert Herranz7657c3a2009-12-17 15:27:20 -080041 return ret;
42}
43
44static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
45{
46 if (reg == SDHCI_BLOCK_SIZE) {
47 /*
48 * Two last DMA bits are reserved, and first one is used for
49 * non-standard blksz of 4096 bytes that we don't support
50 * yet. So clear the DMA boundary bits.
51 */
52 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
53 }
54 sdhci_be32bs_writew(host, val, reg);
55}
56
57static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
58{
59 /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
60 if (reg == SDHCI_HOST_CONTROL)
61 val &= ~ESDHC_HOST_CONTROL_RES;
62 sdhci_be32bs_writeb(host, val, reg);
63}
64
Wolfram Sang80872e22010-10-15 12:21:03 +020065static int esdhc_of_enable_dma(struct sdhci_host *host)
Albert Herranz7657c3a2009-12-17 15:27:20 -080066{
67 setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
68 return 0;
69}
70
Wolfram Sang80872e22010-10-15 12:21:03 +020071static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host)
Albert Herranz7657c3a2009-12-17 15:27:20 -080072{
Shawn Guoe3071482011-07-20 17:13:36 -040073 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
Albert Herranz7657c3a2009-12-17 15:27:20 -080074
Shawn Guoe3071482011-07-20 17:13:36 -040075 return pltfm_host->clock;
Albert Herranz7657c3a2009-12-17 15:27:20 -080076}
77
Wolfram Sang80872e22010-10-15 12:21:03 +020078static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
Albert Herranz7657c3a2009-12-17 15:27:20 -080079{
Shawn Guoe3071482011-07-20 17:13:36 -040080 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
Albert Herranz7657c3a2009-12-17 15:27:20 -080081
Shawn Guoe3071482011-07-20 17:13:36 -040082 return pltfm_host->clock / 256 / 16;
Albert Herranz7657c3a2009-12-17 15:27:20 -080083}
84
Shawn Guoe3071482011-07-20 17:13:36 -040085static struct sdhci_ops sdhci_esdhc_ops = {
86 .read_l = sdhci_be32bs_readl,
87 .read_w = esdhc_readw,
Xu leie51cbc92011-09-09 20:05:46 +080088 .read_b = esdhc_readb,
Shawn Guoe3071482011-07-20 17:13:36 -040089 .write_l = sdhci_be32bs_writel,
90 .write_w = esdhc_writew,
91 .write_b = esdhc_writeb,
92 .set_clock = esdhc_set_clock,
93 .enable_dma = esdhc_of_enable_dma,
94 .get_max_clock = esdhc_of_get_max_clock,
95 .get_min_clock = esdhc_of_get_min_clock,
96};
97
Shawn Guo38576af2011-05-27 23:48:14 +080098static struct sdhci_pltfm_data sdhci_esdhc_pdata = {
Wolfram Sang3bb2a9f2011-02-26 14:44:40 +010099 /* card detection could be handled via GPIO */
Richard Zhue481e452011-03-21 13:22:13 +0800100 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION
101 | SDHCI_QUIRK_NO_CARD_NO_RESET,
Shawn Guoe3071482011-07-20 17:13:36 -0400102 .ops = &sdhci_esdhc_ops,
Albert Herranz7657c3a2009-12-17 15:27:20 -0800103};
Shawn Guo38576af2011-05-27 23:48:14 +0800104
105static int __devinit sdhci_esdhc_probe(struct platform_device *pdev)
106{
107 return sdhci_pltfm_register(pdev, &sdhci_esdhc_pdata);
108}
109
110static int __devexit sdhci_esdhc_remove(struct platform_device *pdev)
111{
112 return sdhci_pltfm_unregister(pdev);
113}
114
115static const struct of_device_id sdhci_esdhc_of_match[] = {
116 { .compatible = "fsl,mpc8379-esdhc" },
117 { .compatible = "fsl,mpc8536-esdhc" },
118 { .compatible = "fsl,esdhc" },
119 { }
120};
121MODULE_DEVICE_TABLE(of, sdhci_esdhc_of_match);
122
123static struct platform_driver sdhci_esdhc_driver = {
124 .driver = {
125 .name = "sdhci-esdhc",
126 .owner = THIS_MODULE,
127 .of_match_table = sdhci_esdhc_of_match,
Manuel Lauss29495aa2011-11-03 11:09:45 +0100128 .pm = SDHCI_PLTFM_PMOPS,
Shawn Guo38576af2011-05-27 23:48:14 +0800129 },
130 .probe = sdhci_esdhc_probe,
131 .remove = __devexit_p(sdhci_esdhc_remove),
Shawn Guo38576af2011-05-27 23:48:14 +0800132};
133
Axel Lind1f81a62011-11-26 12:55:43 +0800134module_platform_driver(sdhci_esdhc_driver);
Shawn Guo38576af2011-05-27 23:48:14 +0800135
136MODULE_DESCRIPTION("SDHCI OF driver for Freescale MPC eSDHC");
137MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
138 "Anton Vorontsov <avorontsov@ru.mvista.com>");
139MODULE_LICENSE("GPL v2");