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Mikael Starvik51533b62005-07-27 11:44:44 -07001#ifndef _ASM_CRIS_ARCH_CACHE_H
2#define _ASM_CRIS_ARCH_CACHE_H
3
Jesper Nilsson738af382007-11-30 10:11:43 +01004#include <asm/arch/hwregs/dma.h>
5
Mikael Starvik51533b62005-07-27 11:44:44 -07006/* A cache-line is 32 bytes. */
7#define L1_CACHE_BYTES 32
8#define L1_CACHE_SHIFT 5
Mikael Starvik51533b62005-07-27 11:44:44 -07009
Jesper Nilsson738af382007-11-30 10:11:43 +010010void flush_dma_list(dma_descr_data *descr);
11void flush_dma_descr(dma_descr_data *descr, int flush_buf);
12
13#define flush_dma_context(c) \
14 flush_dma_list(phys_to_virt((c)->saved_data));
15
16void cris_flush_cache_range(void *buf, unsigned long len);
17void cris_flush_cache(void);
18
Mikael Starvik51533b62005-07-27 11:44:44 -070019#endif /* _ASM_CRIS_ARCH_CACHE_H */