blob: 3206f76f300b727a91d5566c92bbc64cddd82be0 [file] [log] [blame]
Ralf Baechle832348f2007-10-18 01:10:12 +01001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * This program is free software; you can redistribute it and/or modify it
3 * under the terms of the GNU General Public License as published by the
4 * Free Software Foundation; either version 2 of the License, or (at your
5 * option) any later version.
6 *
7 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
8 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
9 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
10 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
11 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
12 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
13 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
14 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
15 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
16 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
Ralf Baechle832348f2007-10-18 01:10:12 +010022 * Copyright 2001 MontaVista Software Inc.
23 * Author: MontaVista Software, Inc.
24 * ahennessy@mvista.com
25 *
26 * Copyright (C) 2000-2001 Toshiba Corporation
27 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
Linus Torvalds1da177e2005-04-16 15:20:36 -070028 */
29
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <linux/init.h>
31#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032#include <linux/types.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <linux/ioport.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <linux/delay.h>
Atsushi Nemotoa0574e042007-03-01 00:40:21 +090035#include <linux/platform_device.h>
Atsushi Nemoto1bd09622008-04-05 00:56:27 +090036#include <linux/gpio.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <asm/reboot.h>
Atsushi Nemotof6727fb2008-07-24 00:25:19 +090038#include <asm/txx9pio.h>
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +090039#include <asm/txx9/generic.h>
Atsushi Nemoto89d63fe2008-07-11 00:33:08 +090040#include <asm/txx9/pci.h>
Atsushi Nemoto22b1d702008-07-11 00:31:36 +090041#include <asm/txx9/jmr3927.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070042#include <asm/mipsregs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
Atsushi Nemotoa49297e2008-07-24 00:25:17 +090044static void jmr3927_machine_restart(char *command)
Linus Torvalds1da177e2005-04-16 15:20:36 -070045{
Atsushi Nemotoa49297e2008-07-24 00:25:17 +090046 local_irq_disable();
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#if 1 /* Resetting PCI bus */
48 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
49 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
50 (void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR); /* flush WB */
51 mdelay(1);
52 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
53#endif
54 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
Atsushi Nemotoa49297e2008-07-24 00:25:17 +090055 /* fallback */
56 (*_machine_halt)();
Linus Torvalds1da177e2005-04-16 15:20:36 -070057}
58
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +090059static void __init jmr3927_time_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070060{
Atsushi Nemotof6727fb2008-07-24 00:25:19 +090061 tx3927_time_init(0, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -070062}
63
Linus Torvalds1da177e2005-04-16 15:20:36 -070064#define DO_WRITE_THROUGH
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
Linus Torvalds1da177e2005-04-16 15:20:36 -070066static void jmr3927_board_init(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070067
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +090068static void __init jmr3927_mem_setup(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070069{
Linus Torvalds1da177e2005-04-16 15:20:36 -070070 set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
71
Linus Torvalds1da177e2005-04-16 15:20:36 -070072 _machine_restart = jmr3927_machine_restart;
Linus Torvalds1da177e2005-04-16 15:20:36 -070073
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 /* cache setup */
75 {
76 unsigned int conf;
Linus Torvalds1da177e2005-04-16 15:20:36 -070077#ifdef DO_WRITE_THROUGH
78 int mips_config_cwfon = 0;
79 int mips_config_wbon = 0;
80#else
81 int mips_config_cwfon = 1;
82 int mips_config_wbon = 1;
83#endif
84
85 conf = read_c0_conf();
Atsushi Nemotod10e0252008-08-19 22:55:09 +090086 conf &= ~(TX39_CONF_WBON | TX39_CONF_CWFON);
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
88 conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
89
90 write_c0_conf(conf);
91 write_c0_cache(0);
92 }
Linus Torvalds1da177e2005-04-16 15:20:36 -070093
94 /* initialize board */
95 jmr3927_board_init();
96
Atsushi Nemoto7779a5e2008-07-25 23:08:06 +090097 tx3927_sio_init(0, 1 << 1); /* ch1: noCTS */
Linus Torvalds1da177e2005-04-16 15:20:36 -070098}
99
Atsushi Nemoto89d63fe2008-07-11 00:33:08 +0900100static void __init jmr3927_pci_setup(void)
101{
102#ifdef CONFIG_PCI
103 int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
104 struct pci_controller *c;
105
106 c = txx9_alloc_pci_controller(&txx9_primary_pcic,
107 JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
108 JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
109 register_pci_controller(c);
110 if (!extarb) {
111 /* Reset PCI Bus */
112 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
113 udelay(100);
114 jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
115 JMR3927_IOC_RESET_ADDR);
116 udelay(100);
117 jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
118 }
119 tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
Atsushi Nemoto455cc252008-07-25 23:01:35 +0900120 tx3927_setup_pcierr_irq();
Atsushi Nemoto89d63fe2008-07-11 00:33:08 +0900121#endif /* CONFIG_PCI */
122}
123
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124static void __init jmr3927_board_init(void)
125{
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900126 txx9_cpu_clock = JMR3927_CORECLK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700127 /* SDRAMC are configured by PROM */
128
129 /* ROMC */
130 tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
131 tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
132 tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
133 tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
134
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135 /* Pin selection */
136 tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
137 tx3927_ccfgptr->pcfg |=
138 TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
139 (TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
140
Atsushi Nemotof6727fb2008-07-24 00:25:19 +0900141 tx3927_setup();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142
Linus Torvalds1da177e2005-04-16 15:20:36 -0700143 /* PIO[15:12] connected to LEDs */
Atsushi Nemoto1bd09622008-04-05 00:56:27 +0900144 __raw_writel(0x0000f000, &tx3927_pioptr->dir);
Atsushi Nemoto1bd09622008-04-05 00:56:27 +0900145 gpio_request(11, "dipsw1");
146 gpio_request(10, "dipsw2");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147
Atsushi Nemotof6727fb2008-07-24 00:25:19 +0900148 jmr3927_pci_setup();
149
150 /* SIO0 DTR on */
151 jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
152
153 jmr3927_led_set(0);
154
155 printk(KERN_INFO
156 "JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
157 jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
158 jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
159 jmr3927_dipsw1(), jmr3927_dipsw2(),
160 jmr3927_dipsw3(), jmr3927_dipsw4());
Linus Torvalds1da177e2005-04-16 15:20:36 -0700161}
Atsushi Nemotoa0574e042007-03-01 00:40:21 +0900162
163/* This trick makes rtc-ds1742 driver usable as is. */
Atsushi Nemoto4c642f32008-07-13 23:37:56 +0900164static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
Atsushi Nemotoa0574e042007-03-01 00:40:21 +0900165{
166 if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
167 return port;
168 port = (port & 0xffff0000) | (port & 0x7fff << 1);
169#ifdef __BIG_ENDIAN
170 return port;
171#else
172 return port | 1;
173#endif
174}
Atsushi Nemotoa0574e042007-03-01 00:40:21 +0900175
Atsushi Nemotobb72f1f2008-07-24 00:25:21 +0900176static void __init jmr3927_rtc_init(void)
Atsushi Nemotoa0574e042007-03-01 00:40:21 +0900177{
Atsushi Nemoto4614c322007-05-01 01:49:20 +0900178 static struct resource __initdata res = {
Atsushi Nemotoa0574e042007-03-01 00:40:21 +0900179 .start = JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
180 .end = JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
181 .flags = IORESOURCE_MEM,
182 };
Atsushi Nemotobb72f1f2008-07-24 00:25:21 +0900183 platform_device_register_simple("rtc-ds1742", -1, &res, 1);
Atsushi Nemotoa0574e042007-03-01 00:40:21 +0900184}
Atsushi Nemoto2064ba22007-11-24 01:20:27 +0900185
Atsushi Nemoto51f607c2008-08-19 22:55:11 +0900186static void __init jmr3927_mtd_init(void)
187{
188 int i;
189
190 for (i = 0; i < 2; i++)
191 tx3927_mtd_init(i);
192}
193
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900194static void __init jmr3927_device_init(void)
Atsushi Nemoto2064ba22007-11-24 01:20:27 +0900195{
Atsushi Nemotoae027ea2008-09-01 22:22:38 +0900196 unsigned long iocled_base = JMR3927_IOC_LED_ADDR - IO_BASE;
197#ifdef __LITTLE_ENDIAN
198 iocled_base |= 1;
199#endif
Atsushi Nemoto4c642f32008-07-13 23:37:56 +0900200 __swizzle_addr_b = jmr3927_swizzle_addr_b;
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900201 jmr3927_rtc_init();
Atsushi Nemoto68314722008-07-24 00:25:18 +0900202 tx3927_wdt_init();
Atsushi Nemoto51f607c2008-08-19 22:55:11 +0900203 jmr3927_mtd_init();
Atsushi Nemotoae027ea2008-09-01 22:22:38 +0900204 txx9_iocled_init(iocled_base, -1, 8, 1, "green", NULL);
Atsushi Nemoto2064ba22007-11-24 01:20:27 +0900205}
Atsushi Nemoto2064ba22007-11-24 01:20:27 +0900206
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900207struct txx9_board_vec jmr3927_vec __initdata = {
Atsushi Nemotoedcaf1a2008-07-11 23:27:54 +0900208 .system = "Toshiba JMR_TX3927",
209 .prom_init = jmr3927_prom_init,
210 .mem_setup = jmr3927_mem_setup,
211 .irq_setup = jmr3927_irq_setup,
212 .time_init = jmr3927_time_init,
213 .device_init = jmr3927_device_init,
214#ifdef CONFIG_PCI
215 .pci_map_irq = jmr3927_pci_map_irq,
216#endif
217};