blob: 9513f7ab1eaabc933b0276205b748d7e4f102dd0 [file] [log] [blame]
Pramod Kumar4484f732016-06-10 11:03:51 +05301/*
2 * Copyright (C) 2016 Broadcom
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/device.h>
15#include <linux/module.h>
16#include <linux/of_mdio.h>
17#include <linux/mdio.h>
18#include <linux/phy.h>
19#include <linux/phy/phy.h>
20
21struct ns2_pci_phy {
22 struct mdio_device *mdiodev;
23 struct phy *phy;
24};
25
26#define BLK_ADDR_REG_OFFSET 0x1f
27#define PLL_AFE1_100MHZ_BLK 0x2100
28#define PLL_CLK_AMP_OFFSET 0x03
29#define PLL_CLK_AMP_2P05V 0x2b18
30
31static int ns2_pci_phy_init(struct phy *p)
32{
33 struct ns2_pci_phy *phy = phy_get_drvdata(p);
34 int rc;
35
36 /* select the AFE 100MHz block page */
37 rc = mdiobus_write(phy->mdiodev->bus, phy->mdiodev->addr,
38 BLK_ADDR_REG_OFFSET, PLL_AFE1_100MHZ_BLK);
39 if (rc)
40 goto err;
41
42 /* set the 100 MHz reference clock amplitude to 2.05 v */
43 rc = mdiobus_write(phy->mdiodev->bus, phy->mdiodev->addr,
44 PLL_CLK_AMP_OFFSET, PLL_CLK_AMP_2P05V);
45 if (rc)
46 goto err;
47
48 return 0;
49
50err:
51 dev_err(&phy->mdiodev->dev, "Error %d writing to phy\n", rc);
52 return rc;
53}
54
55static struct phy_ops ns2_pci_phy_ops = {
56 .init = ns2_pci_phy_init,
57};
58
59static int ns2_pci_phy_probe(struct mdio_device *mdiodev)
60{
61 struct device *dev = &mdiodev->dev;
62 struct phy_provider *provider;
63 struct ns2_pci_phy *p;
64 struct phy *phy;
65
66 phy = devm_phy_create(dev, dev->of_node, &ns2_pci_phy_ops);
67 if (IS_ERR(phy)) {
68 dev_err(dev, "failed to create Phy\n");
69 return PTR_ERR(phy);
70 }
71
72 p = devm_kmalloc(dev, sizeof(struct ns2_pci_phy),
73 GFP_KERNEL);
74 if (!p)
75 return -ENOMEM;
76
77 p->mdiodev = mdiodev;
78 dev_set_drvdata(dev, p);
79
80 p->phy = phy;
81 phy_set_drvdata(phy, p);
82
83 provider = devm_of_phy_provider_register(&phy->dev,
84 of_phy_simple_xlate);
85 if (IS_ERR(provider)) {
86 dev_err(dev, "failed to register Phy provider\n");
87 return PTR_ERR(provider);
88 }
89
90 dev_info(dev, "%s PHY registered\n", dev_name(dev));
91
92 return 0;
93}
94
95static const struct of_device_id ns2_pci_phy_of_match[] = {
96 { .compatible = "brcm,ns2-pcie-phy", },
97 { /* sentinel */ },
98};
99MODULE_DEVICE_TABLE(of, ns2_pci_phy_of_match);
100
101static struct mdio_driver ns2_pci_phy_driver = {
102 .mdiodrv = {
103 .driver = {
104 .name = "phy-bcm-ns2-pci",
105 .of_match_table = ns2_pci_phy_of_match,
106 },
107 },
108 .probe = ns2_pci_phy_probe,
109};
110mdio_module_driver(ns2_pci_phy_driver);
111
112MODULE_AUTHOR("Broadcom");
113MODULE_DESCRIPTION("Broadcom Northstar2 PCI Phy driver");
114MODULE_LICENSE("GPL v2");
115MODULE_ALIAS("platform:phy-bcm-ns2-pci");