Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 1d3bb996481e116f5f2b127cbd29b83365d2cf62 / . / drivers / net / ibm_newemac / debug.c
blob: 170524ee0f1927a72a93d9740c4d654c7bde25a9 [file] [log] [blame]
David Gibson1d3bb992007-08-23 13:56:01 +1000[diff] [blame^]1/*
2 * drivers/net/ibm_newemac/debug.c
3 *
4 * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines.
5 *
6 * Copyright (c) 2004, 2005 Zultys Technologies
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/netdevice.h>
19#include <linux/sysrq.h>
20#include <asm/io.h>
21
22#include "core.h"
23
24static spinlock_t emac_dbg_lock = SPIN_LOCK_UNLOCKED;
25
26static void emac_desc_dump(struct emac_instance *p)
27{
28 int i;
29 printk("** EMAC %s TX BDs **\n"
30 " tx_cnt = %d tx_slot = %d ack_slot = %d\n",
31 p->ofdev->node->full_name,
32 p->tx_cnt, p->tx_slot, p->ack_slot);
33 for (i = 0; i < NUM_TX_BUFF / 2; ++i)
34 printk
35 ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
36 i, p->tx_desc[i].data_ptr, p->tx_skb[i] ? 'V' : ' ',
37 p->tx_desc[i].ctrl, p->tx_desc[i].data_len,
38 NUM_TX_BUFF / 2 + i,
39 p->tx_desc[NUM_TX_BUFF / 2 + i].data_ptr,
40 p->tx_skb[NUM_TX_BUFF / 2 + i] ? 'V' : ' ',
41 p->tx_desc[NUM_TX_BUFF / 2 + i].ctrl,
42 p->tx_desc[NUM_TX_BUFF / 2 + i].data_len);
43
44 printk("** EMAC %s RX BDs **\n"
45 " rx_slot = %d flags = 0x%lx rx_skb_size = %d rx_sync_size = %d\n"
46 " rx_sg_skb = 0x%p\n",
47 p->ofdev->node->full_name,
48 p->rx_slot, p->commac.flags, p->rx_skb_size,
49 p->rx_sync_size, p->rx_sg_skb);
50 for (i = 0; i < NUM_RX_BUFF / 2; ++i)
51 printk
52 ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
53 i, p->rx_desc[i].data_ptr, p->rx_skb[i] ? 'V' : ' ',
54 p->rx_desc[i].ctrl, p->rx_desc[i].data_len,
55 NUM_RX_BUFF / 2 + i,
56 p->rx_desc[NUM_RX_BUFF / 2 + i].data_ptr,
57 p->rx_skb[NUM_RX_BUFF / 2 + i] ? 'V' : ' ',
58 p->rx_desc[NUM_RX_BUFF / 2 + i].ctrl,
59 p->rx_desc[NUM_RX_BUFF / 2 + i].data_len);
60}
61
62static void emac_mac_dump(struct emac_instance *dev)
63{
64 struct emac_regs __iomem *p = dev->emacp;
65
66 printk("** EMAC %s registers **\n"
67 "MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n"
68 "RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x\n"
69 "IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n"
70 "IAHT: 0x%04x 0x%04x 0x%04x 0x%04x "
71 "GAHT: 0x%04x 0x%04x 0x%04x 0x%04x\n"
72 "LSA = %04x%08x IPGVR = 0x%04x\n"
73 "STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
74 "OCTX = 0x%08x OCRX = 0x%08x IPCR = 0x%08x\n",
75 dev->ofdev->node->full_name, in_be32(&p->mr0), in_be32(&p->mr1),
76 in_be32(&p->tmr0), in_be32(&p->tmr1),
77 in_be32(&p->rmr), in_be32(&p->isr), in_be32(&p->iser),
78 in_be32(&p->iahr), in_be32(&p->ialr), in_be32(&p->vtpid),
79 in_be32(&p->vtci),
80 in_be32(&p->iaht1), in_be32(&p->iaht2), in_be32(&p->iaht3),
81 in_be32(&p->iaht4),
82 in_be32(&p->gaht1), in_be32(&p->gaht2), in_be32(&p->gaht3),
83 in_be32(&p->gaht4),
84 in_be32(&p->lsah), in_be32(&p->lsal), in_be32(&p->ipgvr),
85 in_be32(&p->stacr), in_be32(&p->trtr), in_be32(&p->rwmr),
86 in_be32(&p->octx), in_be32(&p->ocrx), in_be32(&p->ipcr)
87 );
88
89 emac_desc_dump(dev);
90}
91
92static void emac_mal_dump(struct mal_instance *mal)
93{
94 int i;
95
96 printk("** MAL %s Registers **\n"
97 "CFG = 0x%08x ESR = 0x%08x IER = 0x%08x\n"
98 "TX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n"
99 "RX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n",
100 mal->ofdev->node->full_name,
101 get_mal_dcrn(mal, MAL_CFG), get_mal_dcrn(mal, MAL_ESR),
102 get_mal_dcrn(mal, MAL_IER),
103 get_mal_dcrn(mal, MAL_TXCASR), get_mal_dcrn(mal, MAL_TXCARR),
104 get_mal_dcrn(mal, MAL_TXEOBISR), get_mal_dcrn(mal, MAL_TXDEIR),
105 get_mal_dcrn(mal, MAL_RXCASR), get_mal_dcrn(mal, MAL_RXCARR),
106 get_mal_dcrn(mal, MAL_RXEOBISR), get_mal_dcrn(mal, MAL_RXDEIR)
107 );
108
109 printk("TX|");
110 for (i = 0; i < mal->num_tx_chans; ++i) {
111 if (i && !(i % 4))
112 printk("\n ");
113 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_TXCTPR(i)));
114 }
115 printk("\nRX|");
116 for (i = 0; i < mal->num_rx_chans; ++i) {
117 if (i && !(i % 4))
118 printk("\n ");
119 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_RXCTPR(i)));
120 }
121 printk("\n ");
122 for (i = 0; i < mal->num_rx_chans; ++i) {
123 u32 r = get_mal_dcrn(mal, MAL_RCBS(i));
124 if (i && !(i % 3))
125 printk("\n ");
126 printk("RCBS%d = 0x%08x (%d) ", i, r, r * 16);
127 }
128 printk("\n");
129}
130
131static struct emac_instance *__emacs[4];
132static struct mal_instance *__mals[1];
133
134void emac_dbg_register(struct emac_instance *dev)
135{
136 unsigned long flags;
137 int i;
138
139 spin_lock_irqsave(&emac_dbg_lock, flags);
140 for (i = 0; i < ARRAY_SIZE(__emacs); i++)
141 if (__emacs[i] == NULL) {
142 __emacs[i] = dev;
143 break;
144 }
145 spin_unlock_irqrestore(&emac_dbg_lock, flags);
146}
147
148void emac_dbg_unregister(struct emac_instance *dev)
149{
150 unsigned long flags;
151 int i;
152
153 spin_lock_irqsave(&emac_dbg_lock, flags);
154 for (i = 0; i < ARRAY_SIZE(__emacs); i++)
155 if (__emacs[i] == dev) {
156 __emacs[i] = NULL;
157 break;
158 }
159 spin_unlock_irqrestore(&emac_dbg_lock, flags);
160}
161
162void mal_dbg_register(struct mal_instance *mal)
163{
164 unsigned long flags;
165 int i;
166
167 spin_lock_irqsave(&emac_dbg_lock, flags);
168 for (i = 0; i < ARRAY_SIZE(__mals); i++)
169 if (__mals[i] == NULL) {
170 __mals[i] = mal;
171 break;
172 }
173 spin_unlock_irqrestore(&emac_dbg_lock, flags);
174}
175
176void mal_dbg_unregister(struct mal_instance *mal)
177{
178 unsigned long flags;
179 int i;
180
181 spin_lock_irqsave(&emac_dbg_lock, flags);
182 for (i = 0; i < ARRAY_SIZE(__mals); i++)
183 if (__mals[i] == mal) {
184 __mals[i] = NULL;
185 break;
186 }
187 spin_unlock_irqrestore(&emac_dbg_lock, flags);
188}
189
190void emac_dbg_dump_all(void)
191{
192 unsigned int i;
193 unsigned long flags;
194
195 spin_lock_irqsave(&emac_dbg_lock, flags);
196
197 for (i = 0; i < ARRAY_SIZE(__mals); ++i)
198 if (__mals[i])
199 emac_mal_dump(__mals[i]);
200
201 for (i = 0; i < ARRAY_SIZE(__emacs); ++i)
202 if (__emacs[i])
203 emac_mac_dump(__emacs[i]);
204
205 spin_unlock_irqrestore(&emac_dbg_lock, flags);
206}
207
208#if defined(CONFIG_MAGIC_SYSRQ)
209static void emac_sysrq_handler(int key, struct tty_struct *tty)
210{
211 emac_dbg_dump_all();
212}
213
214static struct sysrq_key_op emac_sysrq_op = {
215 .handler = emac_sysrq_handler,
216 .help_msg = "emaC",
217 .action_msg = "Show EMAC(s) status",
218};
219
220int __init emac_init_debug(void)
221{
222 return register_sysrq_key('c', &emac_sysrq_op);
223}
224
225void __exit emac_fini_debug(void)
226{
227 unregister_sysrq_key('c', &emac_sysrq_op);
228}
229
230#else
231int __init emac_init_debug(void)
232{
233 return 0;
234}
235void __exit emac_fini_debug(void)
236{
237}
238#endif /* CONFIG_MAGIC_SYSRQ */